d4e598d57a
git-svn-id: http://webrtc.googlecode.com/svn/trunk@6799 4adac7df-926f-26a2-2b94-8c16560cd09d
75 lines
3.2 KiB
C++
75 lines
3.2 KiB
C++
/*
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* libjingle
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* Copyright 2011 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
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* EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "talk/media/base/cpuid.h"
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#include <iostream>
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#include "webrtc/base/basictypes.h"
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#include "webrtc/base/gunit.h"
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#include "webrtc/base/systeminfo.h"
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TEST(CpuInfoTest, CpuId) {
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LOG(LS_INFO) << "ARM: "
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<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasARM);
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LOG(LS_INFO) << "NEON: "
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<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasNEON);
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LOG(LS_INFO) << "X86: "
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<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasX86);
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LOG(LS_INFO) << "SSE2: "
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<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE2);
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LOG(LS_INFO) << "SSSE3: "
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<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSSE3);
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LOG(LS_INFO) << "SSE41: "
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<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41);
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LOG(LS_INFO) << "SSE42: "
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<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE42);
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LOG(LS_INFO) << "AVX: "
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<< cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasAVX);
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bool has_arm = cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasARM);
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bool has_x86 = cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasX86);
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EXPECT_FALSE(has_arm && has_x86);
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}
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TEST(CpuInfoTest, IsCoreIOrBetter) {
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bool core_i_or_better = cricket::IsCoreIOrBetter();
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// Tests the function is callable. Run on known hardware to confirm.
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LOG(LS_INFO) << "IsCoreIOrBetter: " << core_i_or_better;
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// All Core I CPUs have SSE 4.1.
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if (core_i_or_better) {
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EXPECT_TRUE(cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41));
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EXPECT_TRUE(cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSSE3));
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}
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// All CPUs that lack SSE 4.1 are not Core I CPUs.
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if (!cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41)) {
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EXPECT_FALSE(core_i_or_better);
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}
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}
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