From bdb151ee8072189ac0c18b880e009228f39307bf Mon Sep 17 00:00:00 2001
From: James Zern <jzern@google.com>
Date: Fri, 16 May 2014 18:43:11 -0700
Subject: [PATCH] dsp/cpu: add AVX2 detection

currently unused.
https://software.intel.com/en-us/articles/how-to-detect-new-instruction-support-in-the-4th-generation-intel-core-processor-family
http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf

Change-Id: I314200f890c58b9a587b902b214f90deb95f0579
---
 src/dsp/cpu.c | 8 ++++++++
 src/dsp/dsp.h | 1 +
 2 files changed, 9 insertions(+)

diff --git a/src/dsp/cpu.c b/src/dsp/cpu.c
index 0dccf5b3..dd800a3b 100644
--- a/src/dsp/cpu.c
+++ b/src/dsp/cpu.c
@@ -38,6 +38,8 @@ static WEBP_INLINE void GetCPUInfo(int cpu_info[4], int info_type) {
     : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
     : "a"(info_type));
 }
+#elif defined(_MSC_VER) && _MSC_VER >= 1500  // >= VS2008
+#define GetCPUInfo(info, type) __cpuidex(info, type, 0)  // set ecx=0
 #elif defined(WEBP_MSC_SSE2)
 #define GetCPUInfo __cpuid
 #endif
@@ -87,6 +89,12 @@ static int x86CPUInfo(CPUFeature feature) {
       return (xgetbv() & 0x6) == 0x6;
     }
   }
+  if (feature == kAVX2) {
+    if (x86CPUInfo(kAVX)) {
+      GetCPUInfo(cpu_info, 7);
+      return ((cpu_info[1] & 0x00000020) == 0x00000020);
+    }
+  }
   return 0;
 }
 VP8CPUInfo VP8GetCPUInfo = x86CPUInfo;
diff --git a/src/dsp/dsp.h b/src/dsp/dsp.h
index 7938d97f..ca235622 100644
--- a/src/dsp/dsp.h
+++ b/src/dsp/dsp.h
@@ -56,6 +56,7 @@ typedef enum {
   kSSE2,
   kSSE3,
   kAVX,
+  kAVX2,
   kNEON,
   kMIPS32
 } CPUFeature;