0c481f4d18
About 11% overall encoder speedup with the sbsegment experiment enabled. Change-Id: Iffb1bdba6932d9f11a6c791cda8697ccf9327183
230 lines
7.0 KiB
NASM
230 lines
7.0 KiB
NASM
;
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; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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%include "third_party/x86inc/x86inc.asm"
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SECTION .text
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; PROCESS_4x2x4 first, off_{first,second}_{src,ref}, advance_at_end
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%macro PROCESS_4x2x4 5-6 0
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movd m0, [srcq +%2]
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%if %1 == 1
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movd m6, [ref1q+%3]
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movd m4, [ref2q+%3]
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movd m7, [ref3q+%3]
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movd m5, [ref4q+%3]
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punpckldq m0, [srcq +%4]
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punpckldq m6, [ref1q+%5]
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punpckldq m4, [ref2q+%5]
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punpckldq m7, [ref3q+%5]
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punpckldq m5, [ref4q+%5]
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psadbw m6, m0
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psadbw m4, m0
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psadbw m7, m0
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psadbw m5, m0
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punpckldq m6, m4
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punpckldq m7, m5
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%else
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movd m1, [ref1q+%3]
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movd m2, [ref2q+%3]
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movd m3, [ref3q+%3]
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movd m4, [ref4q+%3]
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punpckldq m0, [srcq +%4]
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punpckldq m1, [ref1q+%5]
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punpckldq m2, [ref2q+%5]
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punpckldq m3, [ref3q+%5]
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punpckldq m4, [ref4q+%5]
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psadbw m1, m0
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psadbw m2, m0
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psadbw m3, m0
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psadbw m4, m0
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punpckldq m1, m2
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punpckldq m3, m4
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paddd m6, m1
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paddd m7, m3
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%endif
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%if %6 == 1
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lea srcq, [srcq +src_strideq*2]
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lea ref1q, [ref1q+ref_strideq*2]
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lea ref2q, [ref2q+ref_strideq*2]
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lea ref3q, [ref3q+ref_strideq*2]
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lea ref4q, [ref4q+ref_strideq*2]
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%endif
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%endmacro
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; PROCESS_8x2x4 first, off_{first,second}_{src,ref}, advance_at_end
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%macro PROCESS_8x2x4 5-6 0
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movh m0, [srcq +%2]
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%if %1 == 1
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movh m4, [ref1q+%3]
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movh m5, [ref2q+%3]
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movh m6, [ref3q+%3]
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movh m7, [ref4q+%3]
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movhps m0, [srcq +%4]
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movhps m4, [ref1q+%5]
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movhps m5, [ref2q+%5]
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movhps m6, [ref3q+%5]
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movhps m7, [ref4q+%5]
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psadbw m4, m0
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psadbw m5, m0
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psadbw m6, m0
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psadbw m7, m0
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%else
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movh m1, [ref1q+%3]
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movh m2, [ref2q+%3]
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movh m3, [ref3q+%3]
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movhps m0, [srcq +%4]
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movhps m1, [ref1q+%5]
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movhps m2, [ref2q+%5]
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movhps m3, [ref3q+%5]
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psadbw m1, m0
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psadbw m2, m0
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psadbw m3, m0
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paddd m4, m1
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movh m1, [ref4q+%3]
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movhps m1, [ref4q+%5]
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paddd m5, m2
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paddd m6, m3
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psadbw m1, m0
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paddd m7, m1
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%endif
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%if %6 == 1
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lea srcq, [srcq +src_strideq*2]
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lea ref1q, [ref1q+ref_strideq*2]
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lea ref2q, [ref2q+ref_strideq*2]
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lea ref3q, [ref3q+ref_strideq*2]
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lea ref4q, [ref4q+ref_strideq*2]
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%endif
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%endmacro
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; PROCESS_16x2x4 first, off_{first,second}_{src,ref}, advance_at_end
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%macro PROCESS_16x2x4 5-6 0
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; 1st 16 px
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mova m0, [srcq +%2]
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%if %1 == 1
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movu m4, [ref1q+%3]
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movu m5, [ref2q+%3]
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movu m6, [ref3q+%3]
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movu m7, [ref4q+%3]
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psadbw m4, m0
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psadbw m5, m0
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psadbw m6, m0
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psadbw m7, m0
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%else
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movu m1, [ref1q+%3]
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movu m2, [ref2q+%3]
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movu m3, [ref3q+%3]
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psadbw m1, m0
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psadbw m2, m0
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psadbw m3, m0
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paddd m4, m1
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movu m1, [ref4q+%3]
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paddd m5, m2
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paddd m6, m3
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psadbw m1, m0
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paddd m7, m1
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%endif
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; 2nd 16 px
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mova m0, [srcq +%4]
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movu m1, [ref1q+%5]
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movu m2, [ref2q+%5]
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movu m3, [ref3q+%5]
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psadbw m1, m0
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psadbw m2, m0
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psadbw m3, m0
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paddd m4, m1
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movu m1, [ref4q+%5]
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paddd m5, m2
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paddd m6, m3
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%if %6 == 1
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lea srcq, [srcq +src_strideq*2]
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lea ref1q, [ref1q+ref_strideq*2]
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lea ref2q, [ref2q+ref_strideq*2]
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lea ref3q, [ref3q+ref_strideq*2]
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lea ref4q, [ref4q+ref_strideq*2]
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%endif
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psadbw m1, m0
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paddd m7, m1
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%endmacro
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; PROCESS_32x2x4 first, off_{first,second}_{src,ref}, advance_at_end
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%macro PROCESS_32x2x4 5-6 0
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PROCESS_16x2x4 %1, %2, %3, %2 + 16, %3 + 16
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PROCESS_16x2x4 0, %4, %5, %4 + 16, %5 + 16, %6
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%endmacro
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; PROCESS_64x2x4 first, off_{first,second}_{src,ref}, advance_at_end
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%macro PROCESS_64x2x4 5-6 0
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PROCESS_32x2x4 %1, %2, %3, %2 + 32, %3 + 32
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PROCESS_32x2x4 0, %4, %5, %4 + 32, %5 + 32, %6
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%endmacro
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; void vp9_sadNxNx4d_sse2(uint8_t *src, int src_stride,
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; uint8_t *ref[4], int ref_stride,
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; unsigned int res[4]);
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; where NxN = 64x64, 32x32, 16x16, 16x8, 8x16 or 8x8
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%macro SADNXN4D 2
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%if UNIX64
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cglobal sad%1x%2x4d, 5, 8, 8, src, src_stride, ref1, ref_stride, \
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res, ref2, ref3, ref4
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%else
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cglobal sad%1x%2x4d, 4, 7, 8, src, src_stride, ref1, ref_stride, \
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ref2, ref3, ref4
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%endif
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movsxdifnidn src_strideq, src_strided
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movsxdifnidn ref_strideq, ref_strided
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mov ref2q, [ref1q+gprsize*1]
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mov ref3q, [ref1q+gprsize*2]
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mov ref4q, [ref1q+gprsize*3]
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mov ref1q, [ref1q+gprsize*0]
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PROCESS_%1x2x4 1, 0, 0, src_strideq, ref_strideq, 1
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%rep (%2-4)/2
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PROCESS_%1x2x4 0, 0, 0, src_strideq, ref_strideq, 1
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%endrep
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PROCESS_%1x2x4 0, 0, 0, src_strideq, ref_strideq, 0
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%if mmsize == 16
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pslldq m5, 4
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pslldq m7, 4
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por m4, m5
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por m6, m7
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mova m5, m4
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mova m7, m6
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punpcklqdq m4, m6
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punpckhqdq m5, m7
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movifnidn r4, r4mp
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paddd m4, m5
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movu [r4], m4
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RET
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%else
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movifnidn r4, r4mp
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movq [r4+0], m6
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movq [r4+8], m7
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RET
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%endif
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%endmacro
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INIT_XMM sse2
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SADNXN4D 64, 64
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SADNXN4D 64, 32
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SADNXN4D 32, 64
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SADNXN4D 32, 32
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SADNXN4D 32, 16
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SADNXN4D 16, 32
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SADNXN4D 16, 16
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SADNXN4D 16, 8
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SADNXN4D 8, 16
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SADNXN4D 8, 8
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INIT_MMX sse
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SADNXN4D 4, 4
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