7361ef732b
In 32-bit build with --enable-shared, there is a lot of register pressure and register src_strideq is reused. The code needs to use the stack based version of src_stride, but this doesn't compile when used in an lea instruction. This patch also fixes a related segmentation fault caused by the implementation using src_strideq even though it has been reused. This patch also fixes the HBD subpel variance tests that fail when compiled without disable-optimizations. These failures were caused by local variables in the assembler routines colliding with the caller's stack frame. Change-Id: Ice9d4dafdcbdc6038ad5ee7c1c09a8f06deca362
1038 lines
31 KiB
NASM
1038 lines
31 KiB
NASM
;
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; Copyright (c) 2014 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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%include "third_party/x86inc/x86inc.asm"
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SECTION_RODATA
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pw_8: times 8 dw 8
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bilin_filter_m_sse2: times 8 dw 16
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times 8 dw 0
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times 8 dw 14
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times 8 dw 2
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times 8 dw 12
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times 8 dw 4
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times 8 dw 10
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times 8 dw 6
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times 16 dw 8
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times 8 dw 6
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times 8 dw 10
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times 8 dw 4
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times 8 dw 12
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times 8 dw 2
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times 8 dw 14
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SECTION .text
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; int vpx_sub_pixel_varianceNxh(const uint8_t *src, ptrdiff_t src_stride,
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; int x_offset, int y_offset,
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; const uint8_t *dst, ptrdiff_t dst_stride,
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; int height, unsigned int *sse);
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;
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; This function returns the SE and stores SSE in the given pointer.
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%macro SUM_SSE 6 ; src1, dst1, src2, dst2, sum, sse
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psubw %3, %4
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psubw %1, %2
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mova %4, %3 ; make copies to manipulate to calc sum
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mova %2, %1 ; use originals for calc sse
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pmaddwd %3, %3
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paddw %4, %2
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pmaddwd %1, %1
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movhlps %2, %4
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paddd %6, %3
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paddw %4, %2
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pxor %2, %2
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pcmpgtw %2, %4 ; mask for 0 > %4 (sum)
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punpcklwd %4, %2 ; sign-extend word to dword
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paddd %6, %1
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paddd %5, %4
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%endmacro
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%macro STORE_AND_RET 0
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%if mmsize == 16
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; if H=64 and W=16, we have 8 words of each 2(1bit)x64(6bit)x9bit=16bit
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; in m6, i.e. it _exactly_ fits in a signed word per word in the xmm reg.
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; We have to sign-extend it before adding the words within the register
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; and outputing to a dword.
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movhlps m3, m7
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movhlps m4, m6
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paddd m7, m3
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paddd m6, m4
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pshufd m3, m7, 0x1
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pshufd m4, m6, 0x1
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paddd m7, m3
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paddd m6, m4
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mov r1, ssem ; r1 = unsigned int *sse
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movd [r1], m7 ; store sse
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movd rax, m6 ; store sum as return value
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%endif
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RET
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%endmacro
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%macro INC_SRC_BY_SRC_STRIDE 0
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%if ARCH_X86=1 && CONFIG_PIC=1
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add srcq, src_stridemp
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add srcq, src_stridemp
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%else
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lea srcq, [srcq + src_strideq*2]
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%endif
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%endmacro
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%macro SUBPEL_VARIANCE 1-2 0 ; W
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%define bilin_filter_m bilin_filter_m_sse2
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%define filter_idx_shift 5
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%ifdef PIC ; 64bit PIC
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%if %2 == 1 ; avg
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cglobal highbd_sub_pixel_avg_variance%1xh, 9, 10, 13, src, src_stride, \
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x_offset, y_offset, \
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dst, dst_stride, \
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sec, sec_stride, height, sse
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%define sec_str sec_strideq
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%else
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cglobal highbd_sub_pixel_variance%1xh, 7, 8, 13, src, src_stride, x_offset, \
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y_offset, dst, dst_stride, height, sse
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%endif
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%define block_height heightd
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%define bilin_filter sseq
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%else
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%if ARCH_X86=1 && CONFIG_PIC=1
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%if %2 == 1 ; avg
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cglobal highbd_sub_pixel_avg_variance%1xh, 7, 7, 13, src, src_stride, \
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x_offset, y_offset, \
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dst, dst_stride, \
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sec, sec_stride, \
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height, sse, g_bilin_filter, g_pw_8
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%define block_height dword heightm
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%define sec_str sec_stridemp
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; Store bilin_filter and pw_8 location in stack
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%if GET_GOT_DEFINED == 1
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GET_GOT eax
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add esp, 4 ; restore esp
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%endif
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lea ecx, [GLOBAL(bilin_filter_m)]
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mov g_bilin_filterm, ecx
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lea ecx, [GLOBAL(pw_8)]
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mov g_pw_8m, ecx
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LOAD_IF_USED 0, 1 ; load eax, ecx back
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%else
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cglobal highbd_sub_pixel_variance%1xh, 7, 7, 13, src, src_stride, \
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x_offset, y_offset, dst, dst_stride, height, \
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sse, g_bilin_filter, g_pw_8
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%define block_height heightd
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; Store bilin_filter and pw_8 location in stack
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%if GET_GOT_DEFINED == 1
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GET_GOT eax
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add esp, 4 ; restore esp
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%endif
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lea ecx, [GLOBAL(bilin_filter_m)]
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mov g_bilin_filterm, ecx
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lea ecx, [GLOBAL(pw_8)]
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mov g_pw_8m, ecx
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LOAD_IF_USED 0, 1 ; load eax, ecx back
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%endif
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%else
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%if %2 == 1 ; avg
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cglobal highbd_sub_pixel_avg_variance%1xh, 7 + 2 * ARCH_X86_64, \
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7 + 2 * ARCH_X86_64, 13, src, src_stride, \
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x_offset, y_offset, \
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dst, dst_stride, \
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sec, sec_stride, \
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height, sse
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%if ARCH_X86_64
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%define block_height heightd
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%define sec_str sec_strideq
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%else
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%define block_height dword heightm
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%define sec_str sec_stridemp
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%endif
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%else
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cglobal highbd_sub_pixel_variance%1xh, 7, 7, 13, src, src_stride, \
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x_offset, y_offset, dst, dst_stride, height, sse
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%define block_height heightd
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%endif
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%define bilin_filter bilin_filter_m
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%endif
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%endif
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ASSERT %1 <= 16 ; m6 overflows if w > 16
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pxor m6, m6 ; sum
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pxor m7, m7 ; sse
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%if %1 < 16
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sar block_height, 1
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%endif
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%if %2 == 1 ; avg
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shl sec_str, 1
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%endif
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; FIXME(rbultje) replace by jumptable?
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test x_offsetd, x_offsetd
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jnz .x_nonzero
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; x_offset == 0
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test y_offsetd, y_offsetd
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jnz .x_zero_y_nonzero
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; x_offset == 0 && y_offset == 0
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.x_zero_y_zero_loop:
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%if %1 == 16
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movu m0, [srcq]
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movu m2, [srcq + 16]
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mova m1, [dstq]
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mova m3, [dstq + 16]
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%if %2 == 1 ; avg
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pavgw m0, [secq]
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pavgw m2, [secq+16]
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%endif
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SUM_SSE m0, m1, m2, m3, m6, m7
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lea srcq, [srcq + src_strideq*2]
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lea dstq, [dstq + dst_strideq*2]
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%if %2 == 1 ; avg
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add secq, sec_str
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%endif
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%else ; %1 < 16
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movu m0, [srcq]
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movu m2, [srcq + src_strideq*2]
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mova m1, [dstq]
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mova m3, [dstq + dst_strideq*2]
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%if %2 == 1 ; avg
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pavgw m0, [secq]
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add secq, sec_str
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pavgw m2, [secq]
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%endif
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SUM_SSE m0, m1, m2, m3, m6, m7
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lea srcq, [srcq + src_strideq*4]
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lea dstq, [dstq + dst_strideq*4]
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%if %2 == 1 ; avg
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add secq, sec_str
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%endif
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%endif
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dec block_height
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jg .x_zero_y_zero_loop
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STORE_AND_RET
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.x_zero_y_nonzero:
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cmp y_offsetd, 8
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jne .x_zero_y_nonhalf
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; x_offset == 0 && y_offset == 0.5
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.x_zero_y_half_loop:
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%if %1 == 16
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movu m0, [srcq]
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movu m1, [srcq+16]
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movu m4, [srcq+src_strideq*2]
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movu m5, [srcq+src_strideq*2+16]
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mova m2, [dstq]
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mova m3, [dstq+16]
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pavgw m0, m4
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pavgw m1, m5
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%if %2 == 1 ; avg
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pavgw m0, [secq]
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pavgw m1, [secq+16]
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%endif
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SUM_SSE m0, m2, m1, m3, m6, m7
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lea srcq, [srcq + src_strideq*2]
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lea dstq, [dstq + dst_strideq*2]
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%if %2 == 1 ; avg
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add secq, sec_str
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%endif
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%else ; %1 < 16
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movu m0, [srcq]
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movu m1, [srcq+src_strideq*2]
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movu m5, [srcq+src_strideq*4]
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mova m2, [dstq]
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mova m3, [dstq+dst_strideq*2]
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pavgw m0, m1
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pavgw m1, m5
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%if %2 == 1 ; avg
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pavgw m0, [secq]
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add secq, sec_str
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pavgw m1, [secq]
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%endif
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SUM_SSE m0, m2, m1, m3, m6, m7
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lea srcq, [srcq + src_strideq*4]
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lea dstq, [dstq + dst_strideq*4]
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%if %2 == 1 ; avg
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add secq, sec_str
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%endif
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%endif
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dec block_height
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jg .x_zero_y_half_loop
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STORE_AND_RET
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.x_zero_y_nonhalf:
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; x_offset == 0 && y_offset == bilin interpolation
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%ifdef PIC
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lea bilin_filter, [bilin_filter_m]
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%endif
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shl y_offsetd, filter_idx_shift
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%if ARCH_X86_64 && mmsize == 16
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mova m8, [bilin_filter+y_offsetq]
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mova m9, [bilin_filter+y_offsetq+16]
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mova m10, [pw_8]
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%define filter_y_a m8
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%define filter_y_b m9
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%define filter_rnd m10
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%else ; x86-32 or mmx
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%if ARCH_X86=1 && CONFIG_PIC=1
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; x_offset == 0, reuse x_offset reg
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%define tempq x_offsetq
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add y_offsetq, g_bilin_filterm
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%define filter_y_a [y_offsetq]
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%define filter_y_b [y_offsetq+16]
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mov tempq, g_pw_8m
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%define filter_rnd [tempq]
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%else
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add y_offsetq, bilin_filter
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%define filter_y_a [y_offsetq]
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%define filter_y_b [y_offsetq+16]
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%define filter_rnd [pw_8]
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%endif
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%endif
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.x_zero_y_other_loop:
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%if %1 == 16
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movu m0, [srcq]
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movu m1, [srcq + 16]
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movu m4, [srcq+src_strideq*2]
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movu m5, [srcq+src_strideq*2+16]
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mova m2, [dstq]
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mova m3, [dstq+16]
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; FIXME(rbultje) instead of out=((num-x)*in1+x*in2+rnd)>>log2(num), we can
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; also do out=in1+(((num-x)*(in2-in1)+rnd)>>log2(num)). Total number of
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; instructions is the same (5), but it is 1 mul instead of 2, so might be
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; slightly faster because of pmullw latency. It would also cut our rodata
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; tables in half for this function, and save 1-2 registers on x86-64.
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pmullw m1, filter_y_a
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pmullw m5, filter_y_b
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paddw m1, filter_rnd
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pmullw m0, filter_y_a
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pmullw m4, filter_y_b
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paddw m0, filter_rnd
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paddw m1, m5
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paddw m0, m4
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psrlw m1, 4
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psrlw m0, 4
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%if %2 == 1 ; avg
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pavgw m0, [secq]
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pavgw m1, [secq+16]
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%endif
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SUM_SSE m0, m2, m1, m3, m6, m7
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lea srcq, [srcq + src_strideq*2]
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lea dstq, [dstq + dst_strideq*2]
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%if %2 == 1 ; avg
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add secq, sec_str
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%endif
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%else ; %1 < 16
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movu m0, [srcq]
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movu m1, [srcq+src_strideq*2]
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movu m5, [srcq+src_strideq*4]
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mova m4, m1
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mova m2, [dstq]
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mova m3, [dstq+dst_strideq*2]
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pmullw m1, filter_y_a
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pmullw m5, filter_y_b
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paddw m1, filter_rnd
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pmullw m0, filter_y_a
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pmullw m4, filter_y_b
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paddw m0, filter_rnd
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paddw m1, m5
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paddw m0, m4
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psrlw m1, 4
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psrlw m0, 4
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%if %2 == 1 ; avg
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pavgw m0, [secq]
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add secq, sec_str
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pavgw m1, [secq]
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%endif
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SUM_SSE m0, m2, m1, m3, m6, m7
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lea srcq, [srcq + src_strideq*4]
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lea dstq, [dstq + dst_strideq*4]
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%if %2 == 1 ; avg
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add secq, sec_str
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%endif
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%endif
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dec block_height
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jg .x_zero_y_other_loop
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%undef filter_y_a
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%undef filter_y_b
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%undef filter_rnd
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STORE_AND_RET
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.x_nonzero:
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cmp x_offsetd, 8
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jne .x_nonhalf
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; x_offset == 0.5
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test y_offsetd, y_offsetd
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jnz .x_half_y_nonzero
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; x_offset == 0.5 && y_offset == 0
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.x_half_y_zero_loop:
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%if %1 == 16
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movu m0, [srcq]
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movu m1, [srcq + 16]
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movu m4, [srcq + 2]
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movu m5, [srcq + 18]
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mova m2, [dstq]
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mova m3, [dstq + 16]
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pavgw m0, m4
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pavgw m1, m5
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%if %2 == 1 ; avg
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pavgw m0, [secq]
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pavgw m1, [secq+16]
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%endif
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SUM_SSE m0, m2, m1, m3, m6, m7
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lea srcq, [srcq + src_strideq*2]
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lea dstq, [dstq + dst_strideq*2]
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%if %2 == 1 ; avg
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add secq, sec_str
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%endif
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%else ; %1 < 16
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movu m0, [srcq]
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movu m1, [srcq + src_strideq*2]
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movu m4, [srcq + 2]
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movu m5, [srcq + src_strideq*2 + 2]
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mova m2, [dstq]
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mova m3, [dstq + dst_strideq*2]
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pavgw m0, m4
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pavgw m1, m5
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%if %2 == 1 ; avg
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pavgw m0, [secq]
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add secq, sec_str
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pavgw m1, [secq]
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%endif
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SUM_SSE m0, m2, m1, m3, m6, m7
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lea srcq, [srcq + src_strideq*4]
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lea dstq, [dstq + dst_strideq*4]
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%if %2 == 1 ; avg
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add secq, sec_str
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%endif
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%endif
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dec block_height
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jg .x_half_y_zero_loop
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STORE_AND_RET
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.x_half_y_nonzero:
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cmp y_offsetd, 8
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jne .x_half_y_nonhalf
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; x_offset == 0.5 && y_offset == 0.5
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%if %1 == 16
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movu m0, [srcq]
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movu m1, [srcq+16]
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movu m2, [srcq+2]
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movu m3, [srcq+18]
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lea srcq, [srcq + src_strideq*2]
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pavgw m0, m2
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pavgw m1, m3
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.x_half_y_half_loop:
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movu m2, [srcq]
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movu m3, [srcq + 16]
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movu m4, [srcq + 2]
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movu m5, [srcq + 18]
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pavgw m2, m4
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pavgw m3, m5
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pavgw m0, m2
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pavgw m1, m3
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mova m4, [dstq]
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mova m5, [dstq + 16]
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%if %2 == 1 ; avg
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pavgw m0, [secq]
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pavgw m1, [secq+16]
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%endif
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SUM_SSE m0, m4, m1, m5, m6, m7
|
|
mova m0, m2
|
|
mova m1, m3
|
|
|
|
lea srcq, [srcq + src_strideq*2]
|
|
lea dstq, [dstq + dst_strideq*2]
|
|
%if %2 == 1 ; avg
|
|
add secq, sec_str
|
|
%endif
|
|
%else ; %1 < 16
|
|
movu m0, [srcq]
|
|
movu m2, [srcq+2]
|
|
lea srcq, [srcq + src_strideq*2]
|
|
pavgw m0, m2
|
|
.x_half_y_half_loop:
|
|
movu m2, [srcq]
|
|
movu m3, [srcq + src_strideq*2]
|
|
movu m4, [srcq + 2]
|
|
movu m5, [srcq + src_strideq*2 + 2]
|
|
pavgw m2, m4
|
|
pavgw m3, m5
|
|
pavgw m0, m2
|
|
pavgw m2, m3
|
|
mova m4, [dstq]
|
|
mova m5, [dstq + dst_strideq*2]
|
|
%if %2 == 1 ; avg
|
|
pavgw m0, [secq]
|
|
add secq, sec_str
|
|
pavgw m2, [secq]
|
|
%endif
|
|
SUM_SSE m0, m4, m2, m5, m6, m7
|
|
mova m0, m3
|
|
|
|
lea srcq, [srcq + src_strideq*4]
|
|
lea dstq, [dstq + dst_strideq*4]
|
|
%if %2 == 1 ; avg
|
|
add secq, sec_str
|
|
%endif
|
|
%endif
|
|
dec block_height
|
|
jg .x_half_y_half_loop
|
|
STORE_AND_RET
|
|
|
|
.x_half_y_nonhalf:
|
|
; x_offset == 0.5 && y_offset == bilin interpolation
|
|
%ifdef PIC
|
|
lea bilin_filter, [bilin_filter_m]
|
|
%endif
|
|
shl y_offsetd, filter_idx_shift
|
|
%if ARCH_X86_64 && mmsize == 16
|
|
mova m8, [bilin_filter+y_offsetq]
|
|
mova m9, [bilin_filter+y_offsetq+16]
|
|
mova m10, [pw_8]
|
|
%define filter_y_a m8
|
|
%define filter_y_b m9
|
|
%define filter_rnd m10
|
|
%else ; x86_32
|
|
%if ARCH_X86=1 && CONFIG_PIC=1
|
|
; x_offset == 0.5. We can reuse x_offset reg
|
|
%define tempq x_offsetq
|
|
add y_offsetq, g_bilin_filterm
|
|
%define filter_y_a [y_offsetq]
|
|
%define filter_y_b [y_offsetq+16]
|
|
mov tempq, g_pw_8m
|
|
%define filter_rnd [tempq]
|
|
%else
|
|
add y_offsetq, bilin_filter
|
|
%define filter_y_a [y_offsetq]
|
|
%define filter_y_b [y_offsetq+16]
|
|
%define filter_rnd [pw_8]
|
|
%endif
|
|
%endif
|
|
|
|
%if %1 == 16
|
|
movu m0, [srcq]
|
|
movu m1, [srcq+16]
|
|
movu m2, [srcq+2]
|
|
movu m3, [srcq+18]
|
|
lea srcq, [srcq + src_strideq*2]
|
|
pavgw m0, m2
|
|
pavgw m1, m3
|
|
.x_half_y_other_loop:
|
|
movu m2, [srcq]
|
|
movu m3, [srcq+16]
|
|
movu m4, [srcq+2]
|
|
movu m5, [srcq+18]
|
|
pavgw m2, m4
|
|
pavgw m3, m5
|
|
mova m4, m2
|
|
mova m5, m3
|
|
pmullw m1, filter_y_a
|
|
pmullw m3, filter_y_b
|
|
paddw m1, filter_rnd
|
|
paddw m1, m3
|
|
pmullw m0, filter_y_a
|
|
pmullw m2, filter_y_b
|
|
paddw m0, filter_rnd
|
|
psrlw m1, 4
|
|
paddw m0, m2
|
|
mova m2, [dstq]
|
|
psrlw m0, 4
|
|
mova m3, [dstq+16]
|
|
%if %2 == 1 ; avg
|
|
pavgw m0, [secq]
|
|
pavgw m1, [secq+16]
|
|
%endif
|
|
SUM_SSE m0, m2, m1, m3, m6, m7
|
|
mova m0, m4
|
|
mova m1, m5
|
|
|
|
lea srcq, [srcq + src_strideq*2]
|
|
lea dstq, [dstq + dst_strideq*2]
|
|
%if %2 == 1 ; avg
|
|
add secq, sec_str
|
|
%endif
|
|
%else ; %1 < 16
|
|
movu m0, [srcq]
|
|
movu m2, [srcq+2]
|
|
lea srcq, [srcq + src_strideq*2]
|
|
pavgw m0, m2
|
|
.x_half_y_other_loop:
|
|
movu m2, [srcq]
|
|
movu m3, [srcq+src_strideq*2]
|
|
movu m4, [srcq+2]
|
|
movu m5, [srcq+src_strideq*2+2]
|
|
pavgw m2, m4
|
|
pavgw m3, m5
|
|
mova m4, m2
|
|
mova m5, m3
|
|
pmullw m4, filter_y_a
|
|
pmullw m3, filter_y_b
|
|
paddw m4, filter_rnd
|
|
paddw m4, m3
|
|
pmullw m0, filter_y_a
|
|
pmullw m2, filter_y_b
|
|
paddw m0, filter_rnd
|
|
psrlw m4, 4
|
|
paddw m0, m2
|
|
mova m2, [dstq]
|
|
psrlw m0, 4
|
|
mova m3, [dstq+dst_strideq*2]
|
|
%if %2 == 1 ; avg
|
|
pavgw m0, [secq]
|
|
add secq, sec_str
|
|
pavgw m4, [secq]
|
|
%endif
|
|
SUM_SSE m0, m2, m4, m3, m6, m7
|
|
mova m0, m5
|
|
|
|
lea srcq, [srcq + src_strideq*4]
|
|
lea dstq, [dstq + dst_strideq*4]
|
|
%if %2 == 1 ; avg
|
|
add secq, sec_str
|
|
%endif
|
|
%endif
|
|
dec block_height
|
|
jg .x_half_y_other_loop
|
|
%undef filter_y_a
|
|
%undef filter_y_b
|
|
%undef filter_rnd
|
|
STORE_AND_RET
|
|
|
|
.x_nonhalf:
|
|
test y_offsetd, y_offsetd
|
|
jnz .x_nonhalf_y_nonzero
|
|
|
|
; x_offset == bilin interpolation && y_offset == 0
|
|
%ifdef PIC
|
|
lea bilin_filter, [bilin_filter_m]
|
|
%endif
|
|
shl x_offsetd, filter_idx_shift
|
|
%if ARCH_X86_64 && mmsize == 16
|
|
mova m8, [bilin_filter+x_offsetq]
|
|
mova m9, [bilin_filter+x_offsetq+16]
|
|
mova m10, [pw_8]
|
|
%define filter_x_a m8
|
|
%define filter_x_b m9
|
|
%define filter_rnd m10
|
|
%else ; x86-32
|
|
%if ARCH_X86=1 && CONFIG_PIC=1
|
|
; y_offset == 0. We can reuse y_offset reg.
|
|
%define tempq y_offsetq
|
|
add x_offsetq, g_bilin_filterm
|
|
%define filter_x_a [x_offsetq]
|
|
%define filter_x_b [x_offsetq+16]
|
|
mov tempq, g_pw_8m
|
|
%define filter_rnd [tempq]
|
|
%else
|
|
add x_offsetq, bilin_filter
|
|
%define filter_x_a [x_offsetq]
|
|
%define filter_x_b [x_offsetq+16]
|
|
%define filter_rnd [pw_8]
|
|
%endif
|
|
%endif
|
|
|
|
.x_other_y_zero_loop:
|
|
%if %1 == 16
|
|
movu m0, [srcq]
|
|
movu m1, [srcq+16]
|
|
movu m2, [srcq+2]
|
|
movu m3, [srcq+18]
|
|
mova m4, [dstq]
|
|
mova m5, [dstq+16]
|
|
pmullw m1, filter_x_a
|
|
pmullw m3, filter_x_b
|
|
paddw m1, filter_rnd
|
|
pmullw m0, filter_x_a
|
|
pmullw m2, filter_x_b
|
|
paddw m0, filter_rnd
|
|
paddw m1, m3
|
|
paddw m0, m2
|
|
psrlw m1, 4
|
|
psrlw m0, 4
|
|
%if %2 == 1 ; avg
|
|
pavgw m0, [secq]
|
|
pavgw m1, [secq+16]
|
|
%endif
|
|
SUM_SSE m0, m4, m1, m5, m6, m7
|
|
|
|
lea srcq, [srcq+src_strideq*2]
|
|
lea dstq, [dstq+dst_strideq*2]
|
|
%if %2 == 1 ; avg
|
|
add secq, sec_str
|
|
%endif
|
|
%else ; %1 < 16
|
|
movu m0, [srcq]
|
|
movu m1, [srcq+src_strideq*2]
|
|
movu m2, [srcq+2]
|
|
movu m3, [srcq+src_strideq*2+2]
|
|
mova m4, [dstq]
|
|
mova m5, [dstq+dst_strideq*2]
|
|
pmullw m1, filter_x_a
|
|
pmullw m3, filter_x_b
|
|
paddw m1, filter_rnd
|
|
pmullw m0, filter_x_a
|
|
pmullw m2, filter_x_b
|
|
paddw m0, filter_rnd
|
|
paddw m1, m3
|
|
paddw m0, m2
|
|
psrlw m1, 4
|
|
psrlw m0, 4
|
|
%if %2 == 1 ; avg
|
|
pavgw m0, [secq]
|
|
add secq, sec_str
|
|
pavgw m1, [secq]
|
|
%endif
|
|
SUM_SSE m0, m4, m1, m5, m6, m7
|
|
|
|
lea srcq, [srcq+src_strideq*4]
|
|
lea dstq, [dstq+dst_strideq*4]
|
|
%if %2 == 1 ; avg
|
|
add secq, sec_str
|
|
%endif
|
|
%endif
|
|
dec block_height
|
|
jg .x_other_y_zero_loop
|
|
%undef filter_x_a
|
|
%undef filter_x_b
|
|
%undef filter_rnd
|
|
STORE_AND_RET
|
|
|
|
.x_nonhalf_y_nonzero:
|
|
cmp y_offsetd, 8
|
|
jne .x_nonhalf_y_nonhalf
|
|
|
|
; x_offset == bilin interpolation && y_offset == 0.5
|
|
%ifdef PIC
|
|
lea bilin_filter, [bilin_filter_m]
|
|
%endif
|
|
shl x_offsetd, filter_idx_shift
|
|
%if ARCH_X86_64 && mmsize == 16
|
|
mova m8, [bilin_filter+x_offsetq]
|
|
mova m9, [bilin_filter+x_offsetq+16]
|
|
mova m10, [pw_8]
|
|
%define filter_x_a m8
|
|
%define filter_x_b m9
|
|
%define filter_rnd m10
|
|
%else ; x86-32
|
|
%if ARCH_X86=1 && CONFIG_PIC=1
|
|
; y_offset == 0.5. We can reuse y_offset reg.
|
|
%define tempq y_offsetq
|
|
add x_offsetq, g_bilin_filterm
|
|
%define filter_x_a [x_offsetq]
|
|
%define filter_x_b [x_offsetq+16]
|
|
mov tempq, g_pw_8m
|
|
%define filter_rnd [tempq]
|
|
%else
|
|
add x_offsetq, bilin_filter
|
|
%define filter_x_a [x_offsetq]
|
|
%define filter_x_b [x_offsetq+16]
|
|
%define filter_rnd [pw_8]
|
|
%endif
|
|
%endif
|
|
|
|
%if %1 == 16
|
|
movu m0, [srcq]
|
|
movu m1, [srcq+16]
|
|
movu m2, [srcq+2]
|
|
movu m3, [srcq+18]
|
|
pmullw m0, filter_x_a
|
|
pmullw m2, filter_x_b
|
|
paddw m0, filter_rnd
|
|
pmullw m1, filter_x_a
|
|
pmullw m3, filter_x_b
|
|
paddw m1, filter_rnd
|
|
paddw m0, m2
|
|
paddw m1, m3
|
|
psrlw m0, 4
|
|
psrlw m1, 4
|
|
lea srcq, [srcq+src_strideq*2]
|
|
.x_other_y_half_loop:
|
|
movu m2, [srcq]
|
|
movu m3, [srcq+16]
|
|
movu m4, [srcq+2]
|
|
movu m5, [srcq+18]
|
|
pmullw m2, filter_x_a
|
|
pmullw m4, filter_x_b
|
|
paddw m2, filter_rnd
|
|
pmullw m3, filter_x_a
|
|
pmullw m5, filter_x_b
|
|
paddw m3, filter_rnd
|
|
paddw m2, m4
|
|
paddw m3, m5
|
|
mova m4, [dstq]
|
|
mova m5, [dstq+16]
|
|
psrlw m2, 4
|
|
psrlw m3, 4
|
|
pavgw m0, m2
|
|
pavgw m1, m3
|
|
%if %2 == 1 ; avg
|
|
pavgw m0, [secq]
|
|
pavgw m1, [secq+16]
|
|
%endif
|
|
SUM_SSE m0, m4, m1, m5, m6, m7
|
|
mova m0, m2
|
|
mova m1, m3
|
|
|
|
lea srcq, [srcq+src_strideq*2]
|
|
lea dstq, [dstq+dst_strideq*2]
|
|
%if %2 == 1 ; avg
|
|
add secq, sec_str
|
|
%endif
|
|
%else ; %1 < 16
|
|
movu m0, [srcq]
|
|
movu m2, [srcq+2]
|
|
pmullw m0, filter_x_a
|
|
pmullw m2, filter_x_b
|
|
paddw m0, filter_rnd
|
|
paddw m0, m2
|
|
psrlw m0, 4
|
|
lea srcq, [srcq+src_strideq*2]
|
|
.x_other_y_half_loop:
|
|
movu m2, [srcq]
|
|
movu m3, [srcq+src_strideq*2]
|
|
movu m4, [srcq+2]
|
|
movu m5, [srcq+src_strideq*2+2]
|
|
pmullw m2, filter_x_a
|
|
pmullw m4, filter_x_b
|
|
paddw m2, filter_rnd
|
|
pmullw m3, filter_x_a
|
|
pmullw m5, filter_x_b
|
|
paddw m3, filter_rnd
|
|
paddw m2, m4
|
|
paddw m3, m5
|
|
mova m4, [dstq]
|
|
mova m5, [dstq+dst_strideq*2]
|
|
psrlw m2, 4
|
|
psrlw m3, 4
|
|
pavgw m0, m2
|
|
pavgw m2, m3
|
|
%if %2 == 1 ; avg
|
|
pavgw m0, [secq]
|
|
add secq, sec_str
|
|
pavgw m2, [secq]
|
|
%endif
|
|
SUM_SSE m0, m4, m2, m5, m6, m7
|
|
mova m0, m3
|
|
|
|
lea srcq, [srcq+src_strideq*4]
|
|
lea dstq, [dstq+dst_strideq*4]
|
|
%if %2 == 1 ; avg
|
|
add secq, sec_str
|
|
%endif
|
|
%endif
|
|
dec block_height
|
|
jg .x_other_y_half_loop
|
|
%undef filter_x_a
|
|
%undef filter_x_b
|
|
%undef filter_rnd
|
|
STORE_AND_RET
|
|
|
|
.x_nonhalf_y_nonhalf:
|
|
; loading filter - this is same as in 8-bit depth
|
|
%ifdef PIC
|
|
lea bilin_filter, [bilin_filter_m]
|
|
%endif
|
|
shl x_offsetd, filter_idx_shift ; filter_idx_shift = 5
|
|
shl y_offsetd, filter_idx_shift
|
|
%if ARCH_X86_64 && mmsize == 16
|
|
mova m8, [bilin_filter+x_offsetq]
|
|
mova m9, [bilin_filter+x_offsetq+16]
|
|
mova m10, [bilin_filter+y_offsetq]
|
|
mova m11, [bilin_filter+y_offsetq+16]
|
|
mova m12, [pw_8]
|
|
%define filter_x_a m8
|
|
%define filter_x_b m9
|
|
%define filter_y_a m10
|
|
%define filter_y_b m11
|
|
%define filter_rnd m12
|
|
%else ; x86-32
|
|
%if ARCH_X86=1 && CONFIG_PIC=1
|
|
; In this case, there is NO unused register. Used src_stride register. Later,
|
|
; src_stride has to be loaded from stack when it is needed.
|
|
%define tempq src_strideq
|
|
mov tempq, g_bilin_filterm
|
|
add x_offsetq, tempq
|
|
add y_offsetq, tempq
|
|
%define filter_x_a [x_offsetq]
|
|
%define filter_x_b [x_offsetq+16]
|
|
%define filter_y_a [y_offsetq]
|
|
%define filter_y_b [y_offsetq+16]
|
|
|
|
mov tempq, g_pw_8m
|
|
%define filter_rnd [tempq]
|
|
%else
|
|
add x_offsetq, bilin_filter
|
|
add y_offsetq, bilin_filter
|
|
%define filter_x_a [x_offsetq]
|
|
%define filter_x_b [x_offsetq+16]
|
|
%define filter_y_a [y_offsetq]
|
|
%define filter_y_b [y_offsetq+16]
|
|
%define filter_rnd [pw_8]
|
|
%endif
|
|
%endif
|
|
; end of load filter
|
|
|
|
; x_offset == bilin interpolation && y_offset == bilin interpolation
|
|
%if %1 == 16
|
|
movu m0, [srcq]
|
|
movu m2, [srcq+2]
|
|
movu m1, [srcq+16]
|
|
movu m3, [srcq+18]
|
|
pmullw m0, filter_x_a
|
|
pmullw m2, filter_x_b
|
|
paddw m0, filter_rnd
|
|
pmullw m1, filter_x_a
|
|
pmullw m3, filter_x_b
|
|
paddw m1, filter_rnd
|
|
paddw m0, m2
|
|
paddw m1, m3
|
|
psrlw m0, 4
|
|
psrlw m1, 4
|
|
|
|
INC_SRC_BY_SRC_STRIDE
|
|
|
|
.x_other_y_other_loop:
|
|
movu m2, [srcq]
|
|
movu m4, [srcq+2]
|
|
movu m3, [srcq+16]
|
|
movu m5, [srcq+18]
|
|
pmullw m2, filter_x_a
|
|
pmullw m4, filter_x_b
|
|
paddw m2, filter_rnd
|
|
pmullw m3, filter_x_a
|
|
pmullw m5, filter_x_b
|
|
paddw m3, filter_rnd
|
|
paddw m2, m4
|
|
paddw m3, m5
|
|
psrlw m2, 4
|
|
psrlw m3, 4
|
|
mova m4, m2
|
|
mova m5, m3
|
|
pmullw m0, filter_y_a
|
|
pmullw m2, filter_y_b
|
|
paddw m0, filter_rnd
|
|
pmullw m1, filter_y_a
|
|
pmullw m3, filter_y_b
|
|
paddw m0, m2
|
|
paddw m1, filter_rnd
|
|
mova m2, [dstq]
|
|
paddw m1, m3
|
|
psrlw m0, 4
|
|
psrlw m1, 4
|
|
mova m3, [dstq+16]
|
|
%if %2 == 1 ; avg
|
|
pavgw m0, [secq]
|
|
pavgw m1, [secq+16]
|
|
%endif
|
|
SUM_SSE m0, m2, m1, m3, m6, m7
|
|
mova m0, m4
|
|
mova m1, m5
|
|
|
|
INC_SRC_BY_SRC_STRIDE
|
|
lea dstq, [dstq + dst_strideq * 2]
|
|
%if %2 == 1 ; avg
|
|
add secq, sec_str
|
|
%endif
|
|
%else ; %1 < 16
|
|
movu m0, [srcq]
|
|
movu m2, [srcq+2]
|
|
pmullw m0, filter_x_a
|
|
pmullw m2, filter_x_b
|
|
paddw m0, filter_rnd
|
|
paddw m0, m2
|
|
psrlw m0, 4
|
|
|
|
INC_SRC_BY_SRC_STRIDE
|
|
|
|
.x_other_y_other_loop:
|
|
movu m2, [srcq]
|
|
movu m4, [srcq+2]
|
|
INC_SRC_BY_SRC_STRIDE
|
|
movu m3, [srcq]
|
|
movu m5, [srcq+2]
|
|
pmullw m2, filter_x_a
|
|
pmullw m4, filter_x_b
|
|
paddw m2, filter_rnd
|
|
pmullw m3, filter_x_a
|
|
pmullw m5, filter_x_b
|
|
paddw m3, filter_rnd
|
|
paddw m2, m4
|
|
paddw m3, m5
|
|
psrlw m2, 4
|
|
psrlw m3, 4
|
|
mova m4, m2
|
|
mova m5, m3
|
|
pmullw m0, filter_y_a
|
|
pmullw m2, filter_y_b
|
|
paddw m0, filter_rnd
|
|
pmullw m4, filter_y_a
|
|
pmullw m3, filter_y_b
|
|
paddw m0, m2
|
|
paddw m4, filter_rnd
|
|
mova m2, [dstq]
|
|
paddw m4, m3
|
|
psrlw m0, 4
|
|
psrlw m4, 4
|
|
mova m3, [dstq+dst_strideq*2]
|
|
%if %2 == 1 ; avg
|
|
pavgw m0, [secq]
|
|
add secq, sec_str
|
|
pavgw m4, [secq]
|
|
%endif
|
|
SUM_SSE m0, m2, m4, m3, m6, m7
|
|
mova m0, m5
|
|
|
|
INC_SRC_BY_SRC_STRIDE
|
|
lea dstq, [dstq + dst_strideq * 4]
|
|
%if %2 == 1 ; avg
|
|
add secq, sec_str
|
|
%endif
|
|
%endif
|
|
dec block_height
|
|
jg .x_other_y_other_loop
|
|
%undef filter_x_a
|
|
%undef filter_x_b
|
|
%undef filter_y_a
|
|
%undef filter_y_b
|
|
%undef filter_rnd
|
|
STORE_AND_RET
|
|
%endmacro
|
|
|
|
INIT_XMM sse2
|
|
SUBPEL_VARIANCE 8
|
|
SUBPEL_VARIANCE 16
|
|
|
|
INIT_XMM sse2
|
|
SUBPEL_VARIANCE 8, 1
|
|
SUBPEL_VARIANCE 16, 1
|