122 lines
3.2 KiB
C
122 lines
3.2 KiB
C
/*
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* Copyright (c) 2012 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include "vpx_config.h"
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#include "vp8_rtcd.h"
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#include "vpx/vpx_integer.h"
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#if HAVE_DSPR2
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inline void prefetch_load_int(unsigned char *src)
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{
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__asm__ __volatile__ (
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"pref 0, 0(%[src]) \n\t"
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:
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: [src] "r" (src)
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);
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}
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__inline void vp8_copy_mem16x16_dspr2(
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unsigned char *RESTRICT src,
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int src_stride,
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unsigned char *RESTRICT dst,
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int dst_stride)
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{
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int r;
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unsigned int a0, a1, a2, a3;
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for (r = 16; r--;)
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{
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/* load src data in cache memory */
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prefetch_load_int(src + src_stride);
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/* use unaligned memory load and store */
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__asm__ __volatile__ (
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"ulw %[a0], 0(%[src]) \n\t"
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"ulw %[a1], 4(%[src]) \n\t"
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"ulw %[a2], 8(%[src]) \n\t"
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"ulw %[a3], 12(%[src]) \n\t"
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"sw %[a0], 0(%[dst]) \n\t"
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"sw %[a1], 4(%[dst]) \n\t"
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"sw %[a2], 8(%[dst]) \n\t"
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"sw %[a3], 12(%[dst]) \n\t"
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: [a0] "=&r" (a0), [a1] "=&r" (a1),
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[a2] "=&r" (a2), [a3] "=&r" (a3)
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: [src] "r" (src), [dst] "r" (dst)
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);
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src += src_stride;
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dst += dst_stride;
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}
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}
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__inline void vp8_copy_mem8x8_dspr2(
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unsigned char *RESTRICT src,
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int src_stride,
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unsigned char *RESTRICT dst,
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int dst_stride)
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{
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int r;
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unsigned int a0, a1;
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/* load src data in cache memory */
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prefetch_load_int(src + src_stride);
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for (r = 8; r--;)
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{
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/* use unaligned memory load and store */
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__asm__ __volatile__ (
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"ulw %[a0], 0(%[src]) \n\t"
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"ulw %[a1], 4(%[src]) \n\t"
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"sw %[a0], 0(%[dst]) \n\t"
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"sw %[a1], 4(%[dst]) \n\t"
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: [a0] "=&r" (a0), [a1] "=&r" (a1)
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: [src] "r" (src), [dst] "r" (dst)
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);
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src += src_stride;
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dst += dst_stride;
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}
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}
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__inline void vp8_copy_mem8x4_dspr2(
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unsigned char *RESTRICT src,
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int src_stride,
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unsigned char *RESTRICT dst,
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int dst_stride)
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{
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int r;
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unsigned int a0, a1;
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/* load src data in cache memory */
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prefetch_load_int(src + src_stride);
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for (r = 4; r--;)
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{
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/* use unaligned memory load and store */
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__asm__ __volatile__ (
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"ulw %[a0], 0(%[src]) \n\t"
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"ulw %[a1], 4(%[src]) \n\t"
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"sw %[a0], 0(%[dst]) \n\t"
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"sw %[a1], 4(%[dst]) \n\t"
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: [a0] "=&r" (a0), [a1] "=&r" (a1)
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: [src] "r" (src), [dst] "r" (dst)
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);
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src += src_stride;
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dst += dst_stride;
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}
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}
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#endif
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