60cb39da86
This patch introduces the concept of dual inter16x16 prediction. A
16x16 inter-predicted macroblock can use 2 references instead of 1,
where both references use the same mvmode (new, near/est, zero). In the
case of newmv, this means that two MVs are coded instead of one. The
frame can be encoded in 3 ways: all MBs single-prediction, all MBs dual
prediction, or per-MB single/dual prediction selection ("hybrid"), in
which case a single bit is coded per-MB to indicate whether the MB uses
single or dual inter prediction.
In the future, we can (maybe?) get further gains by mixing this with
Adrian's 32x32 work, per-segment dual prediction settings, or adding
support for dual splitmv/8x8mv inter prediction.
Gain (on derf-set, CQ mode) is ~2.8% (SSIM) or ~3.6% (glb PSNR). Most
gain is at medium/high bitrates, but there's minor gains at low bitrates
also. Output was confirmed to match between encoder and decoder.
Note for optimization people: this patch introduces a 2nd version of
16x16/8x8 sixtap/bilin functions, which does an avg instead of a
store. They may want to look and make sure this is implemented to
their satisfaction so we can optimize it best in the future.
Change-ID: I59dc84b07cbb3ccf073ac0f756d03d294cb19281
179 lines
5.9 KiB
C
179 lines
5.9 KiB
C
/*
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* Copyright (c) 2010 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include "vpx_ports/config.h"
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#include "vp8/common/g_common.h"
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#include "vp8/common/subpixel.h"
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#include "vp8/common/loopfilter.h"
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#include "vp8/common/recon.h"
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#include "vp8/common/idct.h"
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#include "vp8/common/onyxc_int.h"
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#if CONFIG_MULTITHREAD
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#if HAVE_UNISTD_H
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#include <unistd.h>
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#elif defined(_WIN32)
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#include <windows.h>
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typedef void (WINAPI *PGNSI)(LPSYSTEM_INFO);
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#endif
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#endif
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extern void vp8_arch_x86_common_init(VP8_COMMON *ctx);
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extern void vp8_arch_arm_common_init(VP8_COMMON *ctx);
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#if CONFIG_MULTITHREAD
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static int get_cpu_count()
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{
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int core_count = 16;
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#if HAVE_UNISTD_H
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#if defined(_SC_NPROCESSORS_ONLN)
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core_count = sysconf(_SC_NPROCESSORS_ONLN);
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#elif defined(_SC_NPROC_ONLN)
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core_count = sysconf(_SC_NPROC_ONLN);
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#endif
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#elif defined(_WIN32)
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{
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PGNSI pGNSI;
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SYSTEM_INFO sysinfo;
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/* Call GetNativeSystemInfo if supported or
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* GetSystemInfo otherwise. */
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pGNSI = (PGNSI) GetProcAddress(
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GetModuleHandle(TEXT("kernel32.dll")), "GetNativeSystemInfo");
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if (pGNSI != NULL)
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pGNSI(&sysinfo);
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else
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GetSystemInfo(&sysinfo);
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core_count = sysinfo.dwNumberOfProcessors;
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}
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#else
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/* other platforms */
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#endif
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return core_count > 0 ? core_count : 1;
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}
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#endif
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void vp8_machine_specific_config(VP8_COMMON *ctx)
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{
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#if CONFIG_RUNTIME_CPU_DETECT
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VP8_COMMON_RTCD *rtcd = &ctx->rtcd;
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rtcd->idct.idct1 = vp8_short_idct4x4llm_1_c;
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rtcd->idct.idct16 = vp8_short_idct4x4llm_c;
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rtcd->idct.idct1_scalar_add = vp8_dc_only_idct_add_c;
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rtcd->idct.iwalsh1 = vp8_short_inv_walsh4x4_1_c;
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rtcd->idct.iwalsh16 = vp8_short_inv_walsh4x4_c;
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#if CONFIG_T8X8
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rtcd->idct.idct8 = vp8_short_idct8x8_c;
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rtcd->idct.idct8_1 = vp8_short_idct8x8_1_c;
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rtcd->idct.idct1_scalar_add_8x8 = vp8_dc_only_idct_add_8x8_c;
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rtcd->idct.ihaar2 = vp8_short_ihaar2x2_c;
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rtcd->idct.ihaar2_1 = vp8_short_ihaar2x2_1_c;
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#endif
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rtcd->recon.copy16x16 = vp8_copy_mem16x16_c;
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rtcd->recon.copy8x8 = vp8_copy_mem8x8_c;
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#if CONFIG_DUALPRED
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rtcd->recon.avg16x16 = vp8_avg_mem16x16_c;
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rtcd->recon.avg8x8 = vp8_avg_mem8x8_c;
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#endif /* CONFIG_DUALPRED */
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rtcd->recon.copy8x4 = vp8_copy_mem8x4_c;
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rtcd->recon.recon = vp8_recon_b_c;
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#if CONFIG_I8X8
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rtcd->recon.recon_uv = vp8_recon_uv_b_c;
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#endif
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rtcd->recon.recon2 = vp8_recon2b_c;
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rtcd->recon.recon4 = vp8_recon4b_c;
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rtcd->recon.recon_mb = vp8_recon_mb_c;
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rtcd->recon.recon_mby = vp8_recon_mby_c;
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rtcd->recon.build_intra_predictors_mby =
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vp8_build_intra_predictors_mby;
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rtcd->recon.build_intra_predictors_mby_s =
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vp8_build_intra_predictors_mby_s;
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rtcd->recon.build_intra_predictors_mbuv =
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vp8_build_intra_predictors_mbuv;
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rtcd->recon.build_intra_predictors_mbuv_s =
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vp8_build_intra_predictors_mbuv_s;
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rtcd->recon.intra4x4_predict =
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vp8_intra4x4_predict;
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#if CONFIG_I8X8
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rtcd->recon.intra8x8_predict =
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vp8_intra8x8_predict;
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rtcd->recon.intra_uv4x4_predict =
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vp8_intra_uv4x4_predict;
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#endif
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rtcd->subpix.sixtap16x16 = vp8_sixtap_predict16x16_c;
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rtcd->subpix.sixtap8x8 = vp8_sixtap_predict8x8_c;
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#if CONFIG_DUALPRED
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rtcd->subpix.sixtap_avg16x16 = vp8_sixtap_predict_avg16x16_c;
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rtcd->subpix.sixtap_avg8x8 = vp8_sixtap_predict_avg8x8_c;
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#endif /* CONFIG_DUALPRED */
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rtcd->subpix.sixtap8x4 = vp8_sixtap_predict8x4_c;
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rtcd->subpix.sixtap4x4 = vp8_sixtap_predict_c;
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rtcd->subpix.bilinear16x16 = vp8_bilinear_predict16x16_c;
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rtcd->subpix.bilinear8x8 = vp8_bilinear_predict8x8_c;
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#if CONFIG_DUALPRED
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rtcd->subpix.bilinear_avg16x16 = vp8_bilinear_predict_avg16x16_c;
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rtcd->subpix.bilinear_avg8x8 = vp8_bilinear_predict_avg8x8_c;
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#endif /* CONFIG_DUALPRED */
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rtcd->subpix.bilinear8x4 = vp8_bilinear_predict8x4_c;
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rtcd->subpix.bilinear4x4 = vp8_bilinear_predict4x4_c;
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rtcd->loopfilter.normal_mb_v = vp8_loop_filter_mbv_c;
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rtcd->loopfilter.normal_b_v = vp8_loop_filter_bv_c;
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rtcd->loopfilter.normal_mb_h = vp8_loop_filter_mbh_c;
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rtcd->loopfilter.normal_b_h = vp8_loop_filter_bh_c;
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rtcd->loopfilter.simple_mb_v = vp8_loop_filter_simple_vertical_edge_c;
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rtcd->loopfilter.simple_b_v = vp8_loop_filter_bvs_c;
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rtcd->loopfilter.simple_mb_h = vp8_loop_filter_simple_horizontal_edge_c;
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rtcd->loopfilter.simple_b_h = vp8_loop_filter_bhs_c;
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#if CONFIG_POSTPROC || (CONFIG_VP8_ENCODER && CONFIG_INTERNAL_STATS)
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rtcd->postproc.down = vp8_mbpost_proc_down_c;
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rtcd->postproc.across = vp8_mbpost_proc_across_ip_c;
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rtcd->postproc.downacross = vp8_post_proc_down_and_across_c;
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rtcd->postproc.addnoise = vp8_plane_add_noise_c;
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rtcd->postproc.blend_mb_inner = vp8_blend_mb_inner_c;
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rtcd->postproc.blend_mb_outer = vp8_blend_mb_outer_c;
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rtcd->postproc.blend_b = vp8_blend_b_c;
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#endif
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#endif
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#if ARCH_X86 || ARCH_X86_64
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vp8_arch_x86_common_init(ctx);
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#endif
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#if ARCH_ARM
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vp8_arch_arm_common_init(ctx);
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#endif
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#if CONFIG_EXTEND_QRANGE
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rtcd->idct.idct1 = vp8_short_idct4x4llm_1_c;
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rtcd->idct.idct16 = vp8_short_idct4x4llm_c;
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rtcd->idct.idct1_scalar_add = vp8_dc_only_idct_add_c;
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rtcd->idct.iwalsh1 = vp8_short_inv_walsh4x4_1_c;
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rtcd->idct.iwalsh16 = vp8_short_inv_walsh4x4_c;
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#endif
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#if CONFIG_MULTITHREAD
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ctx->processor_core_count = get_cpu_count();
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#endif /* CONFIG_MULTITHREAD */
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}
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