b383a17fa4
The added AVX-512 support requires the subset of AVX-512 added in Skylake-X. Change-Id: I39666b00d10bf96d06c709823663eb09b89265b7
84 lines
3.1 KiB
C
84 lines
3.1 KiB
C
/*
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* Copyright (c) 2017 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <immintrin.h> // AVX512
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#include "./vpx_dsp_rtcd.h"
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#include "vpx/vpx_integer.h"
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void vpx_sad64x64x4d_avx512(const uint8_t *src, int src_stride,
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const uint8_t *const ref[4], int ref_stride,
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uint32_t res[4]) {
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__m512i src_reg, ref0_reg, ref1_reg, ref2_reg, ref3_reg;
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__m512i sum_ref0, sum_ref1, sum_ref2, sum_ref3;
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__m512i sum_mlow, sum_mhigh;
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int i;
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const uint8_t *ref0, *ref1, *ref2, *ref3;
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ref0 = ref[0];
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ref1 = ref[1];
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ref2 = ref[2];
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ref3 = ref[3];
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sum_ref0 = _mm512_set1_epi16(0);
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sum_ref1 = _mm512_set1_epi16(0);
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sum_ref2 = _mm512_set1_epi16(0);
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sum_ref3 = _mm512_set1_epi16(0);
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for (i = 0; i < 64; i++) {
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// load src and all refs
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src_reg = _mm512_loadu_si512((const __m512i *)src);
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ref0_reg = _mm512_loadu_si512((const __m512i *)ref0);
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ref1_reg = _mm512_loadu_si512((const __m512i *)ref1);
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ref2_reg = _mm512_loadu_si512((const __m512i *)ref2);
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ref3_reg = _mm512_loadu_si512((const __m512i *)ref3);
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// sum of the absolute differences between every ref-i to src
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ref0_reg = _mm512_sad_epu8(ref0_reg, src_reg);
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ref1_reg = _mm512_sad_epu8(ref1_reg, src_reg);
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ref2_reg = _mm512_sad_epu8(ref2_reg, src_reg);
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ref3_reg = _mm512_sad_epu8(ref3_reg, src_reg);
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// sum every ref-i
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sum_ref0 = _mm512_add_epi32(sum_ref0, ref0_reg);
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sum_ref1 = _mm512_add_epi32(sum_ref1, ref1_reg);
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sum_ref2 = _mm512_add_epi32(sum_ref2, ref2_reg);
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sum_ref3 = _mm512_add_epi32(sum_ref3, ref3_reg);
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src += src_stride;
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ref0 += ref_stride;
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ref1 += ref_stride;
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ref2 += ref_stride;
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ref3 += ref_stride;
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}
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{
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__m256i sum256;
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__m128i sum128;
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// in sum_ref-i the result is saved in the first 4 bytes
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// the other 4 bytes are zeroed.
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// sum_ref1 and sum_ref3 are shifted left by 4 bytes
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sum_ref1 = _mm512_bslli_epi128(sum_ref1, 4);
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sum_ref3 = _mm512_bslli_epi128(sum_ref3, 4);
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// merge sum_ref0 and sum_ref1 also sum_ref2 and sum_ref3
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sum_ref0 = _mm512_or_si512(sum_ref0, sum_ref1);
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sum_ref2 = _mm512_or_si512(sum_ref2, sum_ref3);
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// merge every 64 bit from each sum_ref-i
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sum_mlow = _mm512_unpacklo_epi64(sum_ref0, sum_ref2);
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sum_mhigh = _mm512_unpackhi_epi64(sum_ref0, sum_ref2);
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// add the low 64 bit to the high 64 bit
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sum_mlow = _mm512_add_epi32(sum_mlow, sum_mhigh);
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// add the low 128 bit to the high 128 bit
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sum256 = _mm256_add_epi32(_mm512_castsi512_si256(sum_mlow),
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_mm512_extracti32x8_epi32(sum_mlow, 1));
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sum128 = _mm_add_epi32(_mm256_castsi256_si128(sum256),
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_mm256_extractf128_si256(sum256, 1));
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_mm_storeu_si128((__m128i *)(res), sum128);
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}
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}
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