7e40a55ef9
Also removes some spurious changes in common/vp9_blockd.h which was introduced by a rebase issue between nextgen and master branches. Change-Id: If359f0e9a71bca9c2ba685a87a355873536bb282 (cherry picked from commit005d80cd05) (cherry picked from commit08d2f54800) (cherry picked from commit4230c2306c)
537 lines
18 KiB
C++
537 lines
18 KiB
C++
/*
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* Copyright (c) 2012 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <math.h>
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#include <stdlib.h>
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#include <string.h>
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#include "third_party/googletest/src/include/gtest/gtest.h"
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#include "test/acm_random.h"
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#include "test/clear_system_state.h"
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#include "test/register_state_check.h"
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#include "test/util.h"
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#include "./vp9_rtcd.h"
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#include "vp9/common/vp9_entropy.h"
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#include "vpx/vpx_codec.h"
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#include "vpx/vpx_integer.h"
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using libvpx_test::ACMRandom;
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namespace {
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const int kNumCoeffs = 16;
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typedef void (*FdctFunc)(const int16_t *in, tran_low_t *out, int stride);
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typedef void (*IdctFunc)(const tran_low_t *in, uint8_t *out, int stride);
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typedef void (*FhtFunc)(const int16_t *in, tran_low_t *out, int stride,
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int tx_type);
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typedef void (*IhtFunc)(const tran_low_t *in, uint8_t *out, int stride,
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int tx_type);
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typedef std::tr1::tuple<FdctFunc, IdctFunc, int, vpx_bit_depth_t> Dct4x4Param;
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typedef std::tr1::tuple<FhtFunc, IhtFunc, int, vpx_bit_depth_t> Ht4x4Param;
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void fdct4x4_ref(const int16_t *in, tran_low_t *out, int stride,
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int tx_type) {
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vp9_fdct4x4_c(in, out, stride);
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}
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void fht4x4_ref(const int16_t *in, tran_low_t *out, int stride, int tx_type) {
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vp9_fht4x4_c(in, out, stride, tx_type);
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}
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void fwht4x4_ref(const int16_t *in, tran_low_t *out, int stride,
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int tx_type) {
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vp9_fwht4x4_c(in, out, stride);
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}
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#if CONFIG_VP9_HIGHBITDEPTH
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void idct4x4_10(const tran_low_t *in, uint8_t *out, int stride) {
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vp9_highbd_idct4x4_16_add_c(in, out, stride, 10);
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}
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void idct4x4_12(const tran_low_t *in, uint8_t *out, int stride) {
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vp9_highbd_idct4x4_16_add_c(in, out, stride, 12);
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}
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void iht4x4_10(const tran_low_t *in, uint8_t *out, int stride, int tx_type) {
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vp9_highbd_iht4x4_16_add_c(in, out, stride, tx_type, 10);
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}
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void iht4x4_12(const tran_low_t *in, uint8_t *out, int stride, int tx_type) {
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vp9_highbd_iht4x4_16_add_c(in, out, stride, tx_type, 12);
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}
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void iwht4x4_10(const tran_low_t *in, uint8_t *out, int stride) {
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vp9_highbd_iwht4x4_16_add_c(in, out, stride, 10);
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}
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void iwht4x4_12(const tran_low_t *in, uint8_t *out, int stride) {
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vp9_highbd_iwht4x4_16_add_c(in, out, stride, 12);
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}
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#if HAVE_SSE2
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void idct4x4_10_sse2(const tran_low_t *in, uint8_t *out, int stride) {
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vp9_highbd_idct4x4_16_add_sse2(in, out, stride, 10);
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}
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void idct4x4_12_sse2(const tran_low_t *in, uint8_t *out, int stride) {
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vp9_highbd_idct4x4_16_add_sse2(in, out, stride, 12);
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}
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#endif // HAVE_SSE2
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#endif // CONFIG_VP9_HIGHBITDEPTH
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class Trans4x4TestBase {
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public:
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virtual ~Trans4x4TestBase() {}
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protected:
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virtual void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) = 0;
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virtual void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) = 0;
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void RunAccuracyCheck(int limit) {
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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uint32_t max_error = 0;
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int64_t total_error = 0;
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const int count_test_block = 10000;
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for (int i = 0; i < count_test_block; ++i) {
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DECLARE_ALIGNED_ARRAY(16, int16_t, test_input_block, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, tran_low_t, test_temp_block, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, uint8_t, dst, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, uint8_t, src, kNumCoeffs);
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#if CONFIG_VP9_HIGHBITDEPTH
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DECLARE_ALIGNED_ARRAY(16, uint16_t, dst16, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, uint16_t, src16, kNumCoeffs);
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#endif
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// Initialize a test block with input range [-255, 255].
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for (int j = 0; j < kNumCoeffs; ++j) {
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if (bit_depth_ == VPX_BITS_8) {
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src[j] = rnd.Rand8();
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dst[j] = rnd.Rand8();
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test_input_block[j] = src[j] - dst[j];
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#if CONFIG_VP9_HIGHBITDEPTH
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} else {
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src16[j] = rnd.Rand16() & mask_;
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dst16[j] = rnd.Rand16() & mask_;
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test_input_block[j] = src16[j] - dst16[j];
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#endif
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}
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}
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ASM_REGISTER_STATE_CHECK(RunFwdTxfm(test_input_block,
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test_temp_block, pitch_));
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if (bit_depth_ == VPX_BITS_8) {
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ASM_REGISTER_STATE_CHECK(RunInvTxfm(test_temp_block, dst, pitch_));
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#if CONFIG_VP9_HIGHBITDEPTH
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} else {
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ASM_REGISTER_STATE_CHECK(RunInvTxfm(test_temp_block,
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CONVERT_TO_BYTEPTR(dst16), pitch_));
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#endif
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}
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for (int j = 0; j < kNumCoeffs; ++j) {
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#if CONFIG_VP9_HIGHBITDEPTH
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const uint32_t diff =
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bit_depth_ == VPX_BITS_8 ? dst[j] - src[j] : dst16[j] - src16[j];
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#else
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const uint32_t diff = dst[j] - src[j];
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#endif
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const uint32_t error = diff * diff;
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if (max_error < error)
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max_error = error;
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total_error += error;
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}
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}
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EXPECT_GE(static_cast<uint32_t>(limit), max_error)
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<< "Error: 4x4 FHT/IHT has an individual round trip error > "
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<< limit;
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EXPECT_GE(count_test_block * limit, total_error)
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<< "Error: 4x4 FHT/IHT has average round trip error > " << limit
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<< " per block";
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}
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void RunCoeffCheck() {
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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const int count_test_block = 5000;
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DECLARE_ALIGNED_ARRAY(16, int16_t, input_block, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, tran_low_t, output_ref_block, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, tran_low_t, output_block, kNumCoeffs);
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for (int i = 0; i < count_test_block; ++i) {
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// Initialize a test block with input range [-mask_, mask_].
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for (int j = 0; j < kNumCoeffs; ++j)
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input_block[j] = (rnd.Rand16() & mask_) - (rnd.Rand16() & mask_);
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fwd_txfm_ref(input_block, output_ref_block, pitch_, tx_type_);
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ASM_REGISTER_STATE_CHECK(RunFwdTxfm(input_block, output_block, pitch_));
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// The minimum quant value is 4.
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for (int j = 0; j < kNumCoeffs; ++j)
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EXPECT_EQ(output_block[j], output_ref_block[j]);
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}
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}
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void RunMemCheck() {
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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const int count_test_block = 5000;
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DECLARE_ALIGNED_ARRAY(16, int16_t, input_block, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, int16_t, input_extreme_block, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, tran_low_t, output_ref_block, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, tran_low_t, output_block, kNumCoeffs);
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for (int i = 0; i < count_test_block; ++i) {
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// Initialize a test block with input range [-mask_, mask_].
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for (int j = 0; j < kNumCoeffs; ++j) {
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input_block[j] = (rnd.Rand16() & mask_) - (rnd.Rand16() & mask_);
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input_extreme_block[j] = rnd.Rand8() % 2 ? mask_ : -mask_;
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}
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if (i == 0) {
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for (int j = 0; j < kNumCoeffs; ++j)
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input_extreme_block[j] = mask_;
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} else if (i == 1) {
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for (int j = 0; j < kNumCoeffs; ++j)
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input_extreme_block[j] = -mask_;
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}
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fwd_txfm_ref(input_extreme_block, output_ref_block, pitch_, tx_type_);
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ASM_REGISTER_STATE_CHECK(RunFwdTxfm(input_extreme_block,
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output_block, pitch_));
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// The minimum quant value is 4.
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for (int j = 0; j < kNumCoeffs; ++j) {
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EXPECT_EQ(output_block[j], output_ref_block[j]);
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EXPECT_GE(4 * DCT_MAX_VALUE << (bit_depth_ - 8), abs(output_block[j]))
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<< "Error: 4x4 FDCT has coefficient larger than 4*DCT_MAX_VALUE";
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}
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}
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}
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void RunInvAccuracyCheck(int limit) {
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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const int count_test_block = 1000;
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DECLARE_ALIGNED_ARRAY(16, int16_t, in, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, tran_low_t, coeff, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, uint8_t, dst, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, uint8_t, src, kNumCoeffs);
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#if CONFIG_VP9_HIGHBITDEPTH
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DECLARE_ALIGNED_ARRAY(16, uint16_t, dst16, kNumCoeffs);
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DECLARE_ALIGNED_ARRAY(16, uint16_t, src16, kNumCoeffs);
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#endif
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for (int i = 0; i < count_test_block; ++i) {
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// Initialize a test block with input range [-mask_, mask_].
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for (int j = 0; j < kNumCoeffs; ++j) {
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if (bit_depth_ == VPX_BITS_8) {
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src[j] = rnd.Rand8();
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dst[j] = rnd.Rand8();
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in[j] = src[j] - dst[j];
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#if CONFIG_VP9_HIGHBITDEPTH
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} else {
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src16[j] = rnd.Rand16() & mask_;
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dst16[j] = rnd.Rand16() & mask_;
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in[j] = src16[j] - dst16[j];
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#endif
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}
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}
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fwd_txfm_ref(in, coeff, pitch_, tx_type_);
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if (bit_depth_ == VPX_BITS_8) {
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ASM_REGISTER_STATE_CHECK(RunInvTxfm(coeff, dst, pitch_));
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#if CONFIG_VP9_HIGHBITDEPTH
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} else {
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ASM_REGISTER_STATE_CHECK(RunInvTxfm(coeff, CONVERT_TO_BYTEPTR(dst16),
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pitch_));
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#endif
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}
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for (int j = 0; j < kNumCoeffs; ++j) {
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#if CONFIG_VP9_HIGHBITDEPTH
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const uint32_t diff =
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bit_depth_ == VPX_BITS_8 ? dst[j] - src[j] : dst16[j] - src16[j];
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#else
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const uint32_t diff = dst[j] - src[j];
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#endif
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const uint32_t error = diff * diff;
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EXPECT_GE(static_cast<uint32_t>(limit), error)
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<< "Error: 4x4 IDCT has error " << error
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<< " at index " << j;
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}
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}
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}
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int pitch_;
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int tx_type_;
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FhtFunc fwd_txfm_ref;
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vpx_bit_depth_t bit_depth_;
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int mask_;
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};
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class Trans4x4DCT
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: public Trans4x4TestBase,
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public ::testing::TestWithParam<Dct4x4Param> {
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public:
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virtual ~Trans4x4DCT() {}
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virtual void SetUp() {
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fwd_txfm_ = GET_PARAM(0);
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inv_txfm_ = GET_PARAM(1);
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tx_type_ = GET_PARAM(2);
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pitch_ = 4;
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fwd_txfm_ref = fdct4x4_ref;
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bit_depth_ = GET_PARAM(3);
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mask_ = (1 << bit_depth_) - 1;
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}
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virtual void TearDown() { libvpx_test::ClearSystemState(); }
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protected:
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void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) {
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fwd_txfm_(in, out, stride);
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}
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void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) {
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inv_txfm_(out, dst, stride);
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}
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FdctFunc fwd_txfm_;
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IdctFunc inv_txfm_;
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};
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TEST_P(Trans4x4DCT, AccuracyCheck) {
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RunAccuracyCheck(1);
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}
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TEST_P(Trans4x4DCT, CoeffCheck) {
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RunCoeffCheck();
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}
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TEST_P(Trans4x4DCT, MemCheck) {
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RunMemCheck();
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}
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TEST_P(Trans4x4DCT, InvAccuracyCheck) {
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RunInvAccuracyCheck(1);
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}
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class Trans4x4HT
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: public Trans4x4TestBase,
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public ::testing::TestWithParam<Ht4x4Param> {
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public:
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virtual ~Trans4x4HT() {}
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virtual void SetUp() {
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fwd_txfm_ = GET_PARAM(0);
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inv_txfm_ = GET_PARAM(1);
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tx_type_ = GET_PARAM(2);
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pitch_ = 4;
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fwd_txfm_ref = fht4x4_ref;
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bit_depth_ = GET_PARAM(3);
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mask_ = (1 << bit_depth_) - 1;
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}
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virtual void TearDown() { libvpx_test::ClearSystemState(); }
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protected:
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void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) {
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fwd_txfm_(in, out, stride, tx_type_);
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}
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void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) {
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inv_txfm_(out, dst, stride, tx_type_);
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}
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FhtFunc fwd_txfm_;
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IhtFunc inv_txfm_;
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};
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TEST_P(Trans4x4HT, AccuracyCheck) {
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RunAccuracyCheck(1);
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}
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TEST_P(Trans4x4HT, CoeffCheck) {
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RunCoeffCheck();
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}
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TEST_P(Trans4x4HT, MemCheck) {
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RunMemCheck();
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}
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TEST_P(Trans4x4HT, InvAccuracyCheck) {
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RunInvAccuracyCheck(1);
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}
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class Trans4x4WHT
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: public Trans4x4TestBase,
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public ::testing::TestWithParam<Dct4x4Param> {
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public:
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virtual ~Trans4x4WHT() {}
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virtual void SetUp() {
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fwd_txfm_ = GET_PARAM(0);
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inv_txfm_ = GET_PARAM(1);
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tx_type_ = GET_PARAM(2);
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pitch_ = 4;
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fwd_txfm_ref = fwht4x4_ref;
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bit_depth_ = GET_PARAM(3);
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mask_ = (1 << bit_depth_) - 1;
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}
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virtual void TearDown() { libvpx_test::ClearSystemState(); }
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protected:
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void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) {
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fwd_txfm_(in, out, stride);
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}
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void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) {
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inv_txfm_(out, dst, stride);
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}
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FdctFunc fwd_txfm_;
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IdctFunc inv_txfm_;
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};
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TEST_P(Trans4x4WHT, AccuracyCheck) {
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RunAccuracyCheck(0);
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}
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TEST_P(Trans4x4WHT, CoeffCheck) {
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RunCoeffCheck();
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}
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TEST_P(Trans4x4WHT, MemCheck) {
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RunMemCheck();
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}
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TEST_P(Trans4x4WHT, InvAccuracyCheck) {
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RunInvAccuracyCheck(0);
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}
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using std::tr1::make_tuple;
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#if CONFIG_VP9_HIGHBITDEPTH
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INSTANTIATE_TEST_CASE_P(
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C, Trans4x4DCT,
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::testing::Values(
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make_tuple(&vp9_highbd_fdct4x4_c, &idct4x4_10, 0, VPX_BITS_10),
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make_tuple(&vp9_highbd_fdct4x4_c, &idct4x4_12, 0, VPX_BITS_12),
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make_tuple(&vp9_fdct4x4_c, &vp9_idct4x4_16_add_c, 0, VPX_BITS_8)));
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#else
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INSTANTIATE_TEST_CASE_P(
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C, Trans4x4DCT,
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::testing::Values(
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make_tuple(&vp9_fdct4x4_c, &vp9_idct4x4_16_add_c, 0, VPX_BITS_8)));
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#endif // CONFIG_VP9_HIGHBITDEPTH
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#if CONFIG_VP9_HIGHBITDEPTH
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INSTANTIATE_TEST_CASE_P(
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C, Trans4x4HT,
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::testing::Values(
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make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 0, VPX_BITS_10),
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make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 1, VPX_BITS_10),
|
|
make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 2, VPX_BITS_10),
|
|
make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 3, VPX_BITS_10),
|
|
make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 0, VPX_BITS_12),
|
|
make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 1, VPX_BITS_12),
|
|
make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 2, VPX_BITS_12),
|
|
make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 3, VPX_BITS_12),
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 0, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 1, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 2, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 3, VPX_BITS_8)));
|
|
#else
|
|
INSTANTIATE_TEST_CASE_P(
|
|
C, Trans4x4HT,
|
|
::testing::Values(
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 0, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 1, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 2, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 3, VPX_BITS_8)));
|
|
#endif // CONFIG_VP9_HIGHBITDEPTH
|
|
|
|
#if CONFIG_VP9_HIGHBITDEPTH
|
|
INSTANTIATE_TEST_CASE_P(
|
|
C, Trans4x4WHT,
|
|
::testing::Values(
|
|
make_tuple(&vp9_highbd_fwht4x4_c, &iwht4x4_10, 0, VPX_BITS_10),
|
|
make_tuple(&vp9_highbd_fwht4x4_c, &iwht4x4_12, 0, VPX_BITS_12),
|
|
make_tuple(&vp9_fwht4x4_c, &vp9_iwht4x4_16_add_c, 0, VPX_BITS_8)));
|
|
#else
|
|
INSTANTIATE_TEST_CASE_P(
|
|
C, Trans4x4WHT,
|
|
::testing::Values(
|
|
make_tuple(&vp9_fwht4x4_c, &vp9_iwht4x4_16_add_c, 0, VPX_BITS_8)));
|
|
#endif // CONFIG_VP9_HIGHBITDEPTH
|
|
|
|
#if HAVE_NEON_ASM && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
INSTANTIATE_TEST_CASE_P(
|
|
NEON, Trans4x4DCT,
|
|
::testing::Values(
|
|
make_tuple(&vp9_fdct4x4_c,
|
|
&vp9_idct4x4_16_add_neon, 0, VPX_BITS_8)));
|
|
INSTANTIATE_TEST_CASE_P(
|
|
DISABLED_NEON, Trans4x4HT,
|
|
::testing::Values(
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 0, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 1, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 2, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 3, VPX_BITS_8)));
|
|
#endif // HAVE_NEON_ASM && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
|
|
#if CONFIG_USE_X86INC && HAVE_MMX && !CONFIG_VP9_HIGHBITDEPTH && \
|
|
!CONFIG_EMULATE_HARDWARE
|
|
INSTANTIATE_TEST_CASE_P(
|
|
MMX, Trans4x4WHT,
|
|
::testing::Values(
|
|
make_tuple(&vp9_fwht4x4_mmx, &vp9_iwht4x4_16_add_c, 0, VPX_BITS_8)));
|
|
#endif
|
|
|
|
#if HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
INSTANTIATE_TEST_CASE_P(
|
|
SSE2, Trans4x4DCT,
|
|
::testing::Values(
|
|
make_tuple(&vp9_fdct4x4_sse2,
|
|
&vp9_idct4x4_16_add_sse2, 0, VPX_BITS_8)));
|
|
INSTANTIATE_TEST_CASE_P(
|
|
SSE2, Trans4x4HT,
|
|
::testing::Values(
|
|
make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 0, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 1, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 2, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 3, VPX_BITS_8)));
|
|
#endif // HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
|
|
#if HAVE_SSE2 && CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
INSTANTIATE_TEST_CASE_P(
|
|
SSE2, Trans4x4DCT,
|
|
::testing::Values(
|
|
make_tuple(&vp9_highbd_fdct4x4_c, &idct4x4_10_sse2, 0, VPX_BITS_10),
|
|
make_tuple(&vp9_highbd_fdct4x4_sse2, &idct4x4_10_sse2, 0, VPX_BITS_10),
|
|
make_tuple(&vp9_highbd_fdct4x4_c, &idct4x4_12_sse2, 0, VPX_BITS_12),
|
|
make_tuple(&vp9_highbd_fdct4x4_sse2, &idct4x4_12_sse2, 0, VPX_BITS_12),
|
|
make_tuple(&vp9_fdct4x4_sse2, &vp9_idct4x4_16_add_c, 0,
|
|
VPX_BITS_8)));
|
|
|
|
INSTANTIATE_TEST_CASE_P(
|
|
SSE2, Trans4x4HT,
|
|
::testing::Values(
|
|
make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_10, 0, VPX_BITS_10),
|
|
make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_10, 1, VPX_BITS_10),
|
|
make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_10, 2, VPX_BITS_10),
|
|
make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_10, 3, VPX_BITS_10),
|
|
make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_12, 0, VPX_BITS_12),
|
|
make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_12, 1, VPX_BITS_12),
|
|
make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_12, 2, VPX_BITS_12),
|
|
make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_12, 3, VPX_BITS_12),
|
|
make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 0, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 1, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 2, VPX_BITS_8),
|
|
make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 3, VPX_BITS_8)));
|
|
#endif // HAVE_SSE2 && CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
|
|
} // namespace
|