79afb5eb41
When building x86 assembly use lrand48 instead of the undocumented inlined _rand function. Android now supports rand() https://android-review.googlesource.com/97731 but only for new versions. Original workaround: https://gerrit.chromium.org/gerrit/15744 Change-Id: I130566837d5bfc9e54187ebe9807350d1a7dab2a
316 lines
9.0 KiB
NASM
316 lines
9.0 KiB
NASM
;
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; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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%include "vpx_ports/x86_abi_support.asm"
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%define VP8_FILTER_WEIGHT 128
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%define VP8_FILTER_SHIFT 7
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;void vp8_mbpost_proc_down_mmx(unsigned char *dst,
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; int pitch, int rows, int cols,int flimit)
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extern sym(vp8_rv)
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global sym(vp8_mbpost_proc_down_mmx) PRIVATE
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sym(vp8_mbpost_proc_down_mmx):
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 5
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GET_GOT rbx
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push rsi
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push rdi
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; end prolog
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ALIGN_STACK 16, rax
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sub rsp, 136
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; unsigned char d[16][8] at [rsp]
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; create flimit2 at [rsp+128]
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mov eax, dword ptr arg(4) ;flimit
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mov [rsp+128], eax
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mov [rsp+128+4], eax
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%define flimit2 [rsp+128]
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%if ABI_IS_32BIT=0
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lea r8, [GLOBAL(sym(vp8_rv))]
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%endif
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;rows +=8;
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add dword ptr arg(2), 8
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;for(c=0; c<cols; c+=4)
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.loop_col:
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mov rsi, arg(0) ;s
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pxor mm0, mm0 ;
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movsxd rax, dword ptr arg(1) ;pitch ;
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; this copies the last row down into the border 8 rows
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mov rdi, rsi
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mov rdx, arg(2)
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sub rdx, 9
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imul rdx, rax
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lea rdi, [rdi+rdx]
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movq mm1, QWORD ptr[rdi] ; first row
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mov rcx, 8
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.init_borderd ; initialize borders
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lea rdi, [rdi + rax]
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movq [rdi], mm1
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dec rcx
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jne .init_borderd
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neg rax ; rax = -pitch
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; this copies the first row up into the border 8 rows
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mov rdi, rsi
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movq mm1, QWORD ptr[rdi] ; first row
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mov rcx, 8
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.init_border ; initialize borders
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lea rdi, [rdi + rax]
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movq [rdi], mm1
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dec rcx
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jne .init_border
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lea rsi, [rsi + rax*8]; ; rdi = s[-pitch*8]
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neg rax
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pxor mm5, mm5
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pxor mm6, mm6 ;
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pxor mm7, mm7 ;
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mov rdi, rsi
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mov rcx, 15 ;
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.loop_initvar:
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movd mm1, DWORD PTR [rdi];
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punpcklbw mm1, mm0 ;
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paddw mm5, mm1 ;
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pmullw mm1, mm1 ;
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movq mm2, mm1 ;
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punpcklwd mm1, mm0 ;
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punpckhwd mm2, mm0 ;
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paddd mm6, mm1 ;
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paddd mm7, mm2 ;
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lea rdi, [rdi+rax] ;
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dec rcx
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jne .loop_initvar
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;save the var and sum
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xor rdx, rdx
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.loop_row:
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movd mm1, DWORD PTR [rsi] ; [s-pitch*8]
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movd mm2, DWORD PTR [rdi] ; [s+pitch*7]
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punpcklbw mm1, mm0
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punpcklbw mm2, mm0
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paddw mm5, mm2
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psubw mm5, mm1
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pmullw mm2, mm2
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movq mm4, mm2
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punpcklwd mm2, mm0
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punpckhwd mm4, mm0
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paddd mm6, mm2
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paddd mm7, mm4
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pmullw mm1, mm1
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movq mm2, mm1
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punpcklwd mm1, mm0
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psubd mm6, mm1
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punpckhwd mm2, mm0
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psubd mm7, mm2
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movq mm3, mm6
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pslld mm3, 4
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psubd mm3, mm6
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movq mm1, mm5
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movq mm4, mm5
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pmullw mm1, mm1
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pmulhw mm4, mm4
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movq mm2, mm1
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punpcklwd mm1, mm4
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punpckhwd mm2, mm4
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movq mm4, mm7
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pslld mm4, 4
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psubd mm4, mm7
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psubd mm3, mm1
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psubd mm4, mm2
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psubd mm3, flimit2
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psubd mm4, flimit2
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psrad mm3, 31
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psrad mm4, 31
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packssdw mm3, mm4
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packsswb mm3, mm0
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movd mm1, DWORD PTR [rsi+rax*8]
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movq mm2, mm1
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punpcklbw mm1, mm0
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paddw mm1, mm5
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mov rcx, rdx
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and rcx, 127
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%if ABI_IS_32BIT=1 && CONFIG_PIC=1
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push rax
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lea rax, [GLOBAL(sym(vp8_rv))]
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movq mm4, [rax + rcx*2] ;vp8_rv[rcx*2]
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pop rax
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%elif ABI_IS_32BIT=0
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movq mm4, [r8 + rcx*2] ;vp8_rv[rcx*2]
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%else
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movq mm4, [sym(vp8_rv) + rcx*2]
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%endif
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paddw mm1, mm4
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psraw mm1, 4
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packuswb mm1, mm0
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pand mm1, mm3
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pandn mm3, mm2
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por mm1, mm3
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and rcx, 15
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movd DWORD PTR [rsp+rcx*4], mm1 ;d[rcx*4]
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cmp edx, 8
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jl .skip_assignment
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mov rcx, rdx
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sub rcx, 8
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and rcx, 15
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movd mm1, DWORD PTR [rsp+rcx*4] ;d[rcx*4]
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movd [rsi], mm1
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.skip_assignment
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lea rsi, [rsi+rax]
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lea rdi, [rdi+rax]
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add rdx, 1
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cmp edx, dword arg(2) ;rows
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jl .loop_row
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add dword arg(0), 4 ; s += 4
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sub dword arg(3), 4 ; cols -= 4
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cmp dword arg(3), 0
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jg .loop_col
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add rsp, 136
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pop rsp
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; begin epilog
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pop rdi
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pop rsi
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RESTORE_GOT
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UNSHADOW_ARGS
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pop rbp
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ret
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%undef flimit2
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;void vp8_plane_add_noise_mmx (unsigned char *Start, unsigned char *noise,
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; unsigned char blackclamp[16],
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; unsigned char whiteclamp[16],
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; unsigned char bothclamp[16],
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; unsigned int Width, unsigned int Height, int Pitch)
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global sym(vp8_plane_add_noise_mmx) PRIVATE
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sym(vp8_plane_add_noise_mmx):
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 8
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GET_GOT rbx
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push rsi
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push rdi
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; end prolog
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.addnoise_loop:
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call sym(LIBVPX_RAND) WRT_PLT
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mov rcx, arg(1) ;noise
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and rax, 0xff
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add rcx, rax
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; we rely on the fact that the clamping vectors are stored contiguously
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; in black/white/both order. Note that we have to reload this here because
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; rdx could be trashed by rand()
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mov rdx, arg(2) ; blackclamp
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mov rdi, rcx
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movsxd rcx, dword arg(5) ;[Width]
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mov rsi, arg(0) ;Pos
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xor rax,rax
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.addnoise_nextset:
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movq mm1,[rsi+rax] ; get the source
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psubusb mm1, [rdx] ;blackclamp ; clamp both sides so we don't outrange adding noise
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paddusb mm1, [rdx+32] ;bothclamp
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psubusb mm1, [rdx+16] ;whiteclamp
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movq mm2,[rdi+rax] ; get the noise for this line
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paddb mm1,mm2 ; add it in
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movq [rsi+rax],mm1 ; store the result
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add rax,8 ; move to the next line
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cmp rax, rcx
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jl .addnoise_nextset
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movsxd rax, dword arg(7) ; Pitch
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add arg(0), rax ; Start += Pitch
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sub dword arg(6), 1 ; Height -= 1
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jg .addnoise_loop
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; begin epilog
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pop rdi
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pop rsi
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RESTORE_GOT
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UNSHADOW_ARGS
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pop rbp
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ret
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SECTION_RODATA
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align 16
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Blur:
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times 16 dw 16
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times 8 dw 64
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times 16 dw 16
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times 8 dw 0
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rd:
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times 4 dw 0x40
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