7b8dfcb5a2
Creates a merge between the master and experimental branches. Fixes a number of conflicts in the build system to allow *either* VP8 or VP9 to be built. Specifically either: $ configure --disable-vp9 $ configure --disable-vp8 --disable-unit-tests VP9 still exports its symbols and files as VP8, so that will be resolved in the next commit. Unit tests are broken in VP9, but this isn't a new issue. They are fixed upstream on origin/experimental as of this writing, but rebasing this merge proved difficult, so will tackle that in a second merge commit. Change-Id: I2b7d852c18efd58d1ebc621b8041fe0260442c21
139 lines
3.3 KiB
NASM
139 lines
3.3 KiB
NASM
;
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; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license and patent
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; grant that can be found in the LICENSE file in the root of the source
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; tree. All contributing project authors may be found in the AUTHORS
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; file in the root of the source tree.
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;
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%include "vpx_ports/x86_abi_support.asm"
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%include "vp9_asm_enc_offsets.asm"
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; void vp9_fast_quantize_b_ssse3 | arg
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; (BLOCK *b, | 0
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; BLOCKD *d) | 1
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;
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global sym(vp9_fast_quantize_b_ssse3)
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sym(vp9_fast_quantize_b_ssse3):
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push rbp
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mov rbp, rsp
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GET_GOT rbx
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%if ABI_IS_32BIT
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push rdi
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push rsi
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%else
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%ifidn __OUTPUT_FORMAT__,x64
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push rdi
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push rsi
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%endif
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%endif
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; end prolog
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%if ABI_IS_32BIT
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mov rdi, arg(0) ; BLOCK *b
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mov rsi, arg(1) ; BLOCKD *d
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%else
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%ifidn __OUTPUT_FORMAT__,x64
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mov rdi, rcx ; BLOCK *b
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mov rsi, rdx ; BLOCKD *d
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%else
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;mov rdi, rdi ; BLOCK *b
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;mov rsi, rsi ; BLOCKD *d
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%endif
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%endif
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mov rax, [rdi + vp9_block_coeff]
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mov rcx, [rdi + vp9_block_round]
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mov rdx, [rdi + vp9_block_quant_fast]
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; coeff
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movdqa xmm0, [rax]
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movdqa xmm4, [rax + 16]
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; round
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movdqa xmm2, [rcx]
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movdqa xmm3, [rcx + 16]
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movdqa xmm1, xmm0
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movdqa xmm5, xmm4
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; sz = z >> 15
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psraw xmm0, 15
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psraw xmm4, 15
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pabsw xmm1, xmm1
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pabsw xmm5, xmm5
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paddw xmm1, xmm2
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paddw xmm5, xmm3
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; quant_fast
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pmulhw xmm1, [rdx]
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pmulhw xmm5, [rdx + 16]
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mov rax, [rsi + vp9_blockd_qcoeff]
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mov rdi, [rsi + vp9_blockd_dequant]
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mov rcx, [rsi + vp9_blockd_dqcoeff]
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pxor xmm1, xmm0
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pxor xmm5, xmm4
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psubw xmm1, xmm0
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psubw xmm5, xmm4
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movdqa [rax], xmm1
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movdqa [rax + 16], xmm5
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movdqa xmm2, [rdi]
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movdqa xmm3, [rdi + 16]
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pxor xmm4, xmm4
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pmullw xmm2, xmm1
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pmullw xmm3, xmm5
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pcmpeqw xmm1, xmm4 ;non zero mask
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pcmpeqw xmm5, xmm4 ;non zero mask
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packsswb xmm1, xmm5
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pshufb xmm1, [GLOBAL(zz_shuf)]
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pmovmskb edx, xmm1
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xor rdi, rdi
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mov eax, -1
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xor dx, ax ;flip the bits for bsr
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bsr eax, edx
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movdqa [rcx], xmm2 ;store dqcoeff
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movdqa [rcx + 16], xmm3 ;store dqcoeff
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sub edi, edx ;check for all zeros in bit mask
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sar edi, 31 ;0 or -1
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add eax, 1
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and eax, edi ;if the bit mask was all zero,
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;then eob = 0
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mov [rsi + vp9_blockd_eob], eax
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; begin epilog
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%if ABI_IS_32BIT
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pop rsi
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pop rdi
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%else
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%ifidn __OUTPUT_FORMAT__,x64
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pop rsi
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pop rdi
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%endif
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%endif
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RESTORE_GOT
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pop rbp
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ret
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SECTION_RODATA
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align 16
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zz_shuf:
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db 0, 1, 4, 8, 5, 2, 3, 6, 9, 12, 13, 10, 7, 11, 14, 15
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