200 lines
6.9 KiB
C
200 lines
6.9 KiB
C
/*
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* Copyright (c) 2015 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <arm_neon.h>
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#include <assert.h>
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#include "./vpx_dsp_rtcd.h"
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#include "./vpx_config.h"
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#include "vpx/vpx_integer.h"
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static INLINE unsigned int horizontal_add_u16x8(const uint16x8_t v_16x8) {
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const uint32x4_t a = vpaddlq_u16(v_16x8);
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const uint64x2_t b = vpaddlq_u32(a);
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const uint32x2_t c = vadd_u32(vreinterpret_u32_u64(vget_low_u64(b)),
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vreinterpret_u32_u64(vget_high_u64(b)));
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return vget_lane_u32(c, 0);
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}
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unsigned int vpx_avg_4x4_neon(const uint8_t *s, int p) {
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uint16x8_t v_sum;
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uint32x2_t v_s0 = vdup_n_u32(0);
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uint32x2_t v_s1 = vdup_n_u32(0);
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v_s0 = vld1_lane_u32((const uint32_t *)s, v_s0, 0);
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v_s0 = vld1_lane_u32((const uint32_t *)(s + p), v_s0, 1);
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v_s1 = vld1_lane_u32((const uint32_t *)(s + 2 * p), v_s1, 0);
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v_s1 = vld1_lane_u32((const uint32_t *)(s + 3 * p), v_s1, 1);
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v_sum = vaddl_u8(vreinterpret_u8_u32(v_s0), vreinterpret_u8_u32(v_s1));
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return (horizontal_add_u16x8(v_sum) + 8) >> 4;
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}
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unsigned int vpx_avg_8x8_neon(const uint8_t *s, int p) {
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uint8x8_t v_s0 = vld1_u8(s);
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const uint8x8_t v_s1 = vld1_u8(s + p);
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uint16x8_t v_sum = vaddl_u8(v_s0, v_s1);
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v_s0 = vld1_u8(s + 2 * p);
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v_sum = vaddw_u8(v_sum, v_s0);
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v_s0 = vld1_u8(s + 3 * p);
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v_sum = vaddw_u8(v_sum, v_s0);
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v_s0 = vld1_u8(s + 4 * p);
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v_sum = vaddw_u8(v_sum, v_s0);
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v_s0 = vld1_u8(s + 5 * p);
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v_sum = vaddw_u8(v_sum, v_s0);
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v_s0 = vld1_u8(s + 6 * p);
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v_sum = vaddw_u8(v_sum, v_s0);
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v_s0 = vld1_u8(s + 7 * p);
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v_sum = vaddw_u8(v_sum, v_s0);
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return (horizontal_add_u16x8(v_sum) + 32) >> 6;
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}
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// coeff: 16 bits, dynamic range [-32640, 32640].
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// length: value range {16, 64, 256, 1024}.
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int vpx_satd_neon(const int16_t *coeff, int length) {
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const int16x4_t zero = vdup_n_s16(0);
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int32x4_t accum = vdupq_n_s32(0);
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do {
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const int16x8_t src0 = vld1q_s16(coeff);
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const int16x8_t src8 = vld1q_s16(coeff + 8);
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accum = vabal_s16(accum, vget_low_s16(src0), zero);
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accum = vabal_s16(accum, vget_high_s16(src0), zero);
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accum = vabal_s16(accum, vget_low_s16(src8), zero);
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accum = vabal_s16(accum, vget_high_s16(src8), zero);
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length -= 16;
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coeff += 16;
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} while (length != 0);
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{
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// satd: 26 bits, dynamic range [-32640 * 1024, 32640 * 1024]
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const int64x2_t s0 = vpaddlq_s32(accum); // cascading summation of 'accum'.
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const int32x2_t s1 = vadd_s32(vreinterpret_s32_s64(vget_low_s64(s0)),
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vreinterpret_s32_s64(vget_high_s64(s0)));
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const int satd = vget_lane_s32(s1, 0);
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return satd;
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}
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}
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void vpx_int_pro_row_neon(int16_t hbuf[16], uint8_t const *ref,
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const int ref_stride, const int height) {
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int i;
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uint16x8_t vec_sum_lo = vdupq_n_u16(0);
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uint16x8_t vec_sum_hi = vdupq_n_u16(0);
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const int shift_factor = ((height >> 5) + 3) * -1;
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const int16x8_t vec_shift = vdupq_n_s16(shift_factor);
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for (i = 0; i < height; i += 8) {
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const uint8x16_t vec_row1 = vld1q_u8(ref);
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const uint8x16_t vec_row2 = vld1q_u8(ref + ref_stride);
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const uint8x16_t vec_row3 = vld1q_u8(ref + ref_stride * 2);
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const uint8x16_t vec_row4 = vld1q_u8(ref + ref_stride * 3);
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const uint8x16_t vec_row5 = vld1q_u8(ref + ref_stride * 4);
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const uint8x16_t vec_row6 = vld1q_u8(ref + ref_stride * 5);
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const uint8x16_t vec_row7 = vld1q_u8(ref + ref_stride * 6);
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const uint8x16_t vec_row8 = vld1q_u8(ref + ref_stride * 7);
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vec_sum_lo = vaddw_u8(vec_sum_lo, vget_low_u8(vec_row1));
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vec_sum_hi = vaddw_u8(vec_sum_hi, vget_high_u8(vec_row1));
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vec_sum_lo = vaddw_u8(vec_sum_lo, vget_low_u8(vec_row2));
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vec_sum_hi = vaddw_u8(vec_sum_hi, vget_high_u8(vec_row2));
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vec_sum_lo = vaddw_u8(vec_sum_lo, vget_low_u8(vec_row3));
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vec_sum_hi = vaddw_u8(vec_sum_hi, vget_high_u8(vec_row3));
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vec_sum_lo = vaddw_u8(vec_sum_lo, vget_low_u8(vec_row4));
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vec_sum_hi = vaddw_u8(vec_sum_hi, vget_high_u8(vec_row4));
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vec_sum_lo = vaddw_u8(vec_sum_lo, vget_low_u8(vec_row5));
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vec_sum_hi = vaddw_u8(vec_sum_hi, vget_high_u8(vec_row5));
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vec_sum_lo = vaddw_u8(vec_sum_lo, vget_low_u8(vec_row6));
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vec_sum_hi = vaddw_u8(vec_sum_hi, vget_high_u8(vec_row6));
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vec_sum_lo = vaddw_u8(vec_sum_lo, vget_low_u8(vec_row7));
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vec_sum_hi = vaddw_u8(vec_sum_hi, vget_high_u8(vec_row7));
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vec_sum_lo = vaddw_u8(vec_sum_lo, vget_low_u8(vec_row8));
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vec_sum_hi = vaddw_u8(vec_sum_hi, vget_high_u8(vec_row8));
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ref += ref_stride * 8;
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}
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vec_sum_lo = vshlq_u16(vec_sum_lo, vec_shift);
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vec_sum_hi = vshlq_u16(vec_sum_hi, vec_shift);
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vst1q_s16(hbuf, vreinterpretq_s16_u16(vec_sum_lo));
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hbuf += 8;
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vst1q_s16(hbuf, vreinterpretq_s16_u16(vec_sum_hi));
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}
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int16_t vpx_int_pro_col_neon(uint8_t const *ref, const int width) {
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int i;
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uint16x8_t vec_sum = vdupq_n_u16(0);
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for (i = 0; i < width; i += 16) {
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const uint8x16_t vec_row = vld1q_u8(ref);
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vec_sum = vaddw_u8(vec_sum, vget_low_u8(vec_row));
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vec_sum = vaddw_u8(vec_sum, vget_high_u8(vec_row));
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ref += 16;
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}
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return horizontal_add_u16x8(vec_sum);
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}
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// ref, src = [0, 510] - max diff = 16-bits
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// bwl = {2, 3, 4}, width = {16, 32, 64}
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int vpx_vector_var_neon(int16_t const *ref, int16_t const *src, const int bwl) {
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int width = 4 << bwl;
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int32x4_t sse = vdupq_n_s32(0);
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int16x8_t total = vdupq_n_s16(0);
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assert(width >= 8);
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assert((width % 8) == 0);
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do {
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const int16x8_t r = vld1q_s16(ref);
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const int16x8_t s = vld1q_s16(src);
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const int16x8_t diff = vsubq_s16(r, s); // [-510, 510], 10 bits.
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const int16x4_t diff_lo = vget_low_s16(diff);
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const int16x4_t diff_hi = vget_high_s16(diff);
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sse = vmlal_s16(sse, diff_lo, diff_lo); // dynamic range 26 bits.
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sse = vmlal_s16(sse, diff_hi, diff_hi);
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total = vaddq_s16(total, diff); // dynamic range 16 bits.
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ref += 8;
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src += 8;
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width -= 8;
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} while (width != 0);
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{
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// Note: 'total''s pairwise addition could be implemented similarly to
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// horizontal_add_u16x8(), but one less vpaddl with 'total' when paired
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// with the summation of 'sse' performed better on a Cortex-A15.
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const int32x4_t t0 = vpaddlq_s16(total); // cascading summation of 'total'
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const int32x2_t t1 = vadd_s32(vget_low_s32(t0), vget_high_s32(t0));
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const int32x2_t t2 = vpadd_s32(t1, t1);
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const int t = vget_lane_s32(t2, 0);
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const int64x2_t s0 = vpaddlq_s32(sse); // cascading summation of 'sse'.
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const int32x2_t s1 = vadd_s32(vreinterpret_s32_s64(vget_low_s64(s0)),
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vreinterpret_s32_s64(vget_high_s64(s0)));
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const int s = vget_lane_s32(s1, 0);
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const int shift_factor = bwl + 2;
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return s - ((t * t) >> shift_factor);
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}
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}
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