124 lines
3.5 KiB
NASM
124 lines
3.5 KiB
NASM
;
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; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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EXPORT |vpx_yv12_copy_y_neon|
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ARM
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REQUIRE8
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PRESERVE8
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INCLUDE vpx_scale_asm_offsets.asm
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AREA ||.text||, CODE, READONLY, ALIGN=2
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;void vpx_yv12_copy_y_neon(const YV12_BUFFER_CONFIG *src_ybc,
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; YV12_BUFFER_CONFIG *dst_ybc)
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|vpx_yv12_copy_y_neon| PROC
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push {r4 - r11, lr}
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vpush {d8-d15}
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ldr r4, [r0, #yv12_buffer_config_y_height]
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ldr r5, [r0, #yv12_buffer_config_y_width]
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ldr r6, [r0, #yv12_buffer_config_y_stride]
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ldr r7, [r1, #yv12_buffer_config_y_stride]
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ldr r2, [r0, #yv12_buffer_config_y_buffer] ;srcptr1
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ldr r3, [r1, #yv12_buffer_config_y_buffer] ;dstptr1
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; copy two rows at one time
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mov lr, r4, lsr #1
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cp_src_to_dst_height_loop1
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mov r8, r2
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mov r9, r3
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add r10, r2, r6
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add r11, r3, r7
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movs r12, r5, lsr #7
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ble extra_copy_needed ; y_width < 128
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cp_src_to_dst_width_loop1
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vld1.8 {q0, q1}, [r8]!
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vld1.8 {q8, q9}, [r10]!
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vld1.8 {q2, q3}, [r8]!
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vld1.8 {q10, q11}, [r10]!
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vld1.8 {q4, q5}, [r8]!
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vld1.8 {q12, q13}, [r10]!
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vld1.8 {q6, q7}, [r8]!
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vld1.8 {q14, q15}, [r10]!
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subs r12, r12, #1
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vst1.8 {q0, q1}, [r9]!
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vst1.8 {q8, q9}, [r11]!
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vst1.8 {q2, q3}, [r9]!
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vst1.8 {q10, q11}, [r11]!
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vst1.8 {q4, q5}, [r9]!
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vst1.8 {q12, q13}, [r11]!
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vst1.8 {q6, q7}, [r9]!
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vst1.8 {q14, q15}, [r11]!
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bne cp_src_to_dst_width_loop1
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subs lr, lr, #1
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add r2, r2, r6, lsl #1
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add r3, r3, r7, lsl #1
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bne cp_src_to_dst_height_loop1
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extra_copy_needed
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ands r10, r5, #0x7f ;check to see if extra copy is needed
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sub r11, r5, r10
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ldr r2, [r0, #yv12_buffer_config_y_buffer] ;srcptr1
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ldr r3, [r1, #yv12_buffer_config_y_buffer] ;dstptr1
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bne extra_cp_src_to_dst_width1
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end_of_cp_src_to_dst1
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vpop {d8 - d15}
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pop {r4-r11, pc}
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;=============================
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extra_cp_src_to_dst_width1
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add r2, r2, r11
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add r3, r3, r11
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add r0, r8, r6
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add r11, r9, r7
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mov lr, r4, lsr #1
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extra_cp_src_to_dst_height_loop1
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mov r8, r2
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mov r9, r3
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add r0, r8, r6
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add r11, r9, r7
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mov r12, r10
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extra_cp_src_to_dst_width_loop1
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vld1.8 {q0}, [r8]!
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vld1.8 {q1}, [r0]!
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subs r12, r12, #16
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vst1.8 {q0}, [r9]!
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vst1.8 {q1}, [r11]!
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bne extra_cp_src_to_dst_width_loop1
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subs lr, lr, #1
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add r2, r2, r6, lsl #1
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add r3, r3, r7, lsl #1
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bne extra_cp_src_to_dst_height_loop1
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b end_of_cp_src_to_dst1
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ENDP
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END
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