59e065b6ed
Change-Id: I2c782d18d9004414ba61b77238e0caf3e022d8f2
147 lines
6.4 KiB
C
147 lines
6.4 KiB
C
/*
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* Copyright (c) 2017 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include "./vpx_dsp_rtcd.h"
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#include "vpx_ports/mem.h"
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#include "vpx/vpx_integer.h"
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#include "vpx_ports/asmdefs_mmi.h"
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#define VARIANCE_SSE_8 \
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"gsldlc1 %[ftmp1], 0x07(%[a]) \n\t" \
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"gsldrc1 %[ftmp1], 0x00(%[a]) \n\t" \
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"gsldlc1 %[ftmp2], 0x07(%[b]) \n\t" \
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"gsldrc1 %[ftmp2], 0x00(%[b]) \n\t" \
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"pasubub %[ftmp3], %[ftmp1], %[ftmp2] \n\t" \
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"punpcklbh %[ftmp4], %[ftmp3], %[ftmp0] \n\t" \
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"punpckhbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" \
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"pmaddhw %[ftmp6], %[ftmp4], %[ftmp4] \n\t" \
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"pmaddhw %[ftmp7], %[ftmp5], %[ftmp5] \n\t" \
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"paddw %[ftmp8], %[ftmp8], %[ftmp6] \n\t" \
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"paddw %[ftmp8], %[ftmp8], %[ftmp7] \n\t"
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#define VARIANCE_SSE_16 \
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VARIANCE_SSE_8 \
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"gsldlc1 %[ftmp1], 0x0f(%[a]) \n\t" \
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"gsldrc1 %[ftmp1], 0x08(%[a]) \n\t" \
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"gsldlc1 %[ftmp2], 0x0f(%[b]) \n\t" \
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"gsldrc1 %[ftmp2], 0x08(%[b]) \n\t" \
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"pasubub %[ftmp3], %[ftmp1], %[ftmp2] \n\t" \
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"punpcklbh %[ftmp4], %[ftmp3], %[ftmp0] \n\t" \
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"punpckhbh %[ftmp5], %[ftmp3], %[ftmp0] \n\t" \
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"pmaddhw %[ftmp6], %[ftmp4], %[ftmp4] \n\t" \
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"pmaddhw %[ftmp7], %[ftmp5], %[ftmp5] \n\t" \
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"paddw %[ftmp8], %[ftmp8], %[ftmp6] \n\t" \
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"paddw %[ftmp8], %[ftmp8], %[ftmp7] \n\t"
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static inline uint32_t vpx_mse16x(const uint8_t *a, int a_stride,
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const uint8_t *b, int b_stride, uint32_t *sse,
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uint64_t high) {
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double ftmp[12];
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uint32_t tmp[1];
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*sse = 0;
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__asm__ volatile (
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"li %[tmp0], 0x20 \n\t"
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"mtc1 %[tmp0], %[ftmp11] \n\t"
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MMI_L(%[tmp0], %[high], 0x00)
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"xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
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"xor %[ftmp8], %[ftmp8], %[ftmp8] \n\t"
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"xor %[ftmp9], %[ftmp9], %[ftmp9] \n\t"
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"1: \n\t"
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VARIANCE_SSE_16
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"addiu %[tmp0], %[tmp0], -0x01 \n\t"
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MMI_ADDU(%[a], %[a], %[a_stride])
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MMI_ADDU(%[b], %[b], %[b_stride])
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"bnez %[tmp0], 1b \n\t"
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"dsrl %[ftmp9], %[ftmp8], %[ftmp11] \n\t"
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"paddw %[ftmp9], %[ftmp9], %[ftmp8] \n\t"
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"swc1 %[ftmp9], 0x00(%[sse]) \n\t"
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
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[ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
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[ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]),
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[ftmp10]"=&f"(ftmp[10]), [ftmp11]"=&f"(ftmp[11]),
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[tmp0]"=&r"(tmp[0]),
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[a]"+&r"(a), [b]"+&r"(b)
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: [a_stride]"r"((mips_reg)a_stride),[b_stride]"r"((mips_reg)b_stride),
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[high]"r"(&high), [sse]"r"(sse)
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: "memory"
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);
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return *sse;
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}
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#define vpx_mse16xN(n) \
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uint32_t vpx_mse16x##n##_mmi(const uint8_t *a, int a_stride, \
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const uint8_t *b, int b_stride, \
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uint32_t *sse) { \
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return vpx_mse16x(a, a_stride, b, b_stride, sse, n); \
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}
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vpx_mse16xN(16);
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vpx_mse16xN(8);
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static inline uint32_t vpx_mse8x(const uint8_t *a, int a_stride,
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const uint8_t *b, int b_stride, uint32_t *sse,
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uint64_t high) {
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double ftmp[12];
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uint32_t tmp[1];
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*sse = 0;
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__asm__ volatile (
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"li %[tmp0], 0x20 \n\t"
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"mtc1 %[tmp0], %[ftmp11] \n\t"
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MMI_L(%[tmp0], %[high], 0x00)
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"xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
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"xor %[ftmp8], %[ftmp8], %[ftmp8] \n\t"
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"xor %[ftmp9], %[ftmp9], %[ftmp9] \n\t"
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"1: \n\t"
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VARIANCE_SSE_8
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"addiu %[tmp0], %[tmp0], -0x01 \n\t"
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MMI_ADDU(%[a], %[a], %[a_stride])
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MMI_ADDU(%[b], %[b], %[b_stride])
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"bnez %[tmp0], 1b \n\t"
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"dsrl %[ftmp9], %[ftmp8], %[ftmp11] \n\t"
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"paddw %[ftmp9], %[ftmp9], %[ftmp8] \n\t"
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"swc1 %[ftmp9], 0x00(%[sse]) \n\t"
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
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[ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
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[ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]),
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[ftmp10]"=&f"(ftmp[10]), [ftmp11]"=&f"(ftmp[11]),
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[tmp0]"=&r"(tmp[0]),
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[a]"+&r"(a), [b]"+&r"(b)
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: [a_stride]"r"((mips_reg)a_stride),[b_stride]"r"((mips_reg)b_stride),
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[high]"r"(&high), [sse]"r"(sse)
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: "memory"
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);
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return *sse;
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}
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#define vpx_mse8xN(n) \
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uint32_t vpx_mse8x##n##_mmi(const uint8_t *a, int a_stride, \
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const uint8_t *b, int b_stride, uint32_t *sse) { \
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return vpx_mse8x(a, a_stride, b, b_stride, sse, n); \
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}
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vpx_mse8xN(16);
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vpx_mse8xN(8);
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