7186a2dd86
It in essence refactors the code for both the interpolation filtering and the convolution. This change includes the moving of all the files as well as the changing of the code from vp9_ prefix to vpx_ prefix accordingly, for underneath architectures: (1) x86; (2) arm/neon; and (3) mips/msa. The work on mips/drsp2 will be done in a separate change list. Change-Id: Ic3ce7fb7f81210db7628b373c73553db68793c46
120 lines
6.7 KiB
C
120 lines
6.7 KiB
C
/*
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* Copyright (c) 2015 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#ifndef VPX_DSP_MIPS_VPX_CONVOLVE_MSA_H_
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#define VPX_DSP_MIPS_VPX_CONVOLVE_MSA_H_
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#include "vpx_dsp/mips/macros_msa.h"
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#include "vpx_dsp/vpx_filter.h"
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extern const uint8_t mc_filt_mask_arr[16 * 3];
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#define FILT_8TAP_DPADD_S_H(vec0, vec1, vec2, vec3, \
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filt0, filt1, filt2, filt3) ({ \
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v8i16 tmp0, tmp1; \
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\
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tmp0 = __msa_dotp_s_h((v16i8)vec0, (v16i8)filt0); \
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tmp0 = __msa_dpadd_s_h(tmp0, (v16i8)vec1, (v16i8)filt1); \
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tmp1 = __msa_dotp_s_h((v16i8)vec2, (v16i8)filt2); \
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tmp1 = __msa_dpadd_s_h(tmp1, (v16i8)vec3, (v16i8)filt3); \
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tmp0 = __msa_adds_s_h(tmp0, tmp1); \
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\
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tmp0; \
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})
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#define HORIZ_8TAP_FILT(src0, src1, mask0, mask1, mask2, mask3, \
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filt_h0, filt_h1, filt_h2, filt_h3) ({ \
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v16i8 vec0_m, vec1_m, vec2_m, vec3_m; \
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v8i16 hz_out_m; \
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\
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VSHF_B4_SB(src0, src1, mask0, mask1, mask2, mask3, \
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vec0_m, vec1_m, vec2_m, vec3_m); \
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hz_out_m = FILT_8TAP_DPADD_S_H(vec0_m, vec1_m, vec2_m, vec3_m, \
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filt_h0, filt_h1, filt_h2, filt_h3); \
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\
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hz_out_m = __msa_srari_h(hz_out_m, FILTER_BITS); \
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hz_out_m = __msa_sat_s_h(hz_out_m, 7); \
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\
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hz_out_m; \
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})
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#define HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, \
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mask0, mask1, mask2, mask3, \
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filt0, filt1, filt2, filt3, \
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out0, out1) { \
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v16i8 vec0_m, vec1_m, vec2_m, vec3_m, vec4_m, vec5_m, vec6_m, vec7_m; \
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v8i16 res0_m, res1_m, res2_m, res3_m; \
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\
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VSHF_B2_SB(src0, src1, src2, src3, mask0, mask0, vec0_m, vec1_m); \
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DOTP_SB2_SH(vec0_m, vec1_m, filt0, filt0, res0_m, res1_m); \
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VSHF_B2_SB(src0, src1, src2, src3, mask1, mask1, vec2_m, vec3_m); \
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DPADD_SB2_SH(vec2_m, vec3_m, filt1, filt1, res0_m, res1_m); \
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VSHF_B2_SB(src0, src1, src2, src3, mask2, mask2, vec4_m, vec5_m); \
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DOTP_SB2_SH(vec4_m, vec5_m, filt2, filt2, res2_m, res3_m); \
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VSHF_B2_SB(src0, src1, src2, src3, mask3, mask3, vec6_m, vec7_m); \
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DPADD_SB2_SH(vec6_m, vec7_m, filt3, filt3, res2_m, res3_m); \
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ADDS_SH2_SH(res0_m, res2_m, res1_m, res3_m, out0, out1); \
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}
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#define HORIZ_8TAP_8WID_4VECS_FILT(src0, src1, src2, src3, \
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mask0, mask1, mask2, mask3, \
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filt0, filt1, filt2, filt3, \
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out0, out1, out2, out3) { \
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v16i8 vec0_m, vec1_m, vec2_m, vec3_m, vec4_m, vec5_m, vec6_m, vec7_m; \
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v8i16 res0_m, res1_m, res2_m, res3_m, res4_m, res5_m, res6_m, res7_m; \
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\
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VSHF_B2_SB(src0, src0, src1, src1, mask0, mask0, vec0_m, vec1_m); \
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VSHF_B2_SB(src2, src2, src3, src3, mask0, mask0, vec2_m, vec3_m); \
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DOTP_SB4_SH(vec0_m, vec1_m, vec2_m, vec3_m, filt0, filt0, filt0, filt0, \
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res0_m, res1_m, res2_m, res3_m); \
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VSHF_B2_SB(src0, src0, src1, src1, mask2, mask2, vec0_m, vec1_m); \
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VSHF_B2_SB(src2, src2, src3, src3, mask2, mask2, vec2_m, vec3_m); \
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DOTP_SB4_SH(vec0_m, vec1_m, vec2_m, vec3_m, filt2, filt2, filt2, filt2, \
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res4_m, res5_m, res6_m, res7_m); \
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VSHF_B2_SB(src0, src0, src1, src1, mask1, mask1, vec4_m, vec5_m); \
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VSHF_B2_SB(src2, src2, src3, src3, mask1, mask1, vec6_m, vec7_m); \
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DPADD_SB4_SH(vec4_m, vec5_m, vec6_m, vec7_m, filt1, filt1, filt1, filt1, \
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res0_m, res1_m, res2_m, res3_m); \
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VSHF_B2_SB(src0, src0, src1, src1, mask3, mask3, vec4_m, vec5_m); \
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VSHF_B2_SB(src2, src2, src3, src3, mask3, mask3, vec6_m, vec7_m); \
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DPADD_SB4_SH(vec4_m, vec5_m, vec6_m, vec7_m, filt3, filt3, filt3, filt3, \
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res4_m, res5_m, res6_m, res7_m); \
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ADDS_SH4_SH(res0_m, res4_m, res1_m, res5_m, res2_m, res6_m, res3_m, \
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res7_m, out0, out1, out2, out3); \
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}
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#define PCKEV_XORI128_AVG_ST_UB(in0, in1, dst, pdst) { \
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v16u8 tmp_m; \
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\
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tmp_m = PCKEV_XORI128_UB(in1, in0); \
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tmp_m = __msa_aver_u_b(tmp_m, (v16u8)dst); \
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ST_UB(tmp_m, (pdst)); \
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}
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#define PCKEV_AVG_ST_UB(in0, in1, dst, pdst) { \
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v16u8 tmp_m; \
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\
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tmp_m = (v16u8)__msa_pckev_b((v16i8)in0, (v16i8)in1); \
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tmp_m = __msa_aver_u_b(tmp_m, (v16u8)dst); \
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ST_UB(tmp_m, (pdst)); \
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}
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#define PCKEV_AVG_ST8x4_UB(in1, dst0, in2, dst1, in3, dst2, in4, dst3, \
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pdst, stride) { \
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v16u8 tmp0_m, tmp1_m, tmp2_m, tmp3_m; \
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uint8_t *pdst_m = (uint8_t *)(pdst); \
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\
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PCKEV_B2_UB(in2, in1, in4, in3, tmp0_m, tmp1_m); \
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PCKEV_D2_UB(dst1, dst0, dst3, dst2, tmp2_m, tmp3_m); \
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AVER_UB2_UB(tmp0_m, tmp2_m, tmp1_m, tmp3_m, tmp0_m, tmp1_m); \
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ST8x4_UB(tmp0_m, tmp1_m, pdst_m, stride); \
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}
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#endif /* VPX_DSP_MIPS_VPX_CONVOLVE_MSA_H_ */
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