af660715c0
This commit replaces zrun_zbin_boost, a method of biasing non-zero coefficients following runs of zero-coefficients to be rounded towards zero, with an explicit skip-block choice in the RD loop. The logic is basically that if individual coefficients should be rounded towards zero (from a RD point of view), the trellis/optimize loop should take care of it. If whole blocks should be zero (from a RD point of view), a single RD check is much more efficient than a complete serialization of the quantization loop. Quality change: derf +0.5% psnr, +1.6% ssim; yt +0.6% psnr, +1.1% ssim. SIMD for quantize will follow in a separate patch. Results for other test sets pending. Change-Id: Ife5fa641163ac5150ac428011e87188f1937c1f4
75 lines
1.9 KiB
NASM
75 lines
1.9 KiB
NASM
;
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; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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%include "third_party/x86inc/x86inc.asm"
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SECTION .text
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; int64_t vp9_block_error(int16_t *coeff, int16_t *dqcoeff, intptr_t block_size,
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; int64_t *ssz)
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INIT_XMM sse2
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cglobal block_error, 3, 3, 8, uqc, dqc, size, ssz
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pxor m4, m4 ; sse accumulator
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pxor m6, m6 ; ssz accumulator
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pxor m5, m5 ; dedicated zero register
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lea uqcq, [uqcq+sizeq*2]
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lea dqcq, [dqcq+sizeq*2]
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neg sizeq
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.loop:
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mova m2, [uqcq+sizeq*2]
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mova m0, [dqcq+sizeq*2]
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mova m3, [uqcq+sizeq*2+mmsize]
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mova m1, [dqcq+sizeq*2+mmsize]
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psubw m0, m2
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psubw m1, m3
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; individual errors are max. 15bit+sign, so squares are 30bit, and
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; thus the sum of 2 should fit in a 31bit integer (+ unused sign bit)
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pmaddwd m0, m0
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pmaddwd m1, m1
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pmaddwd m2, m2
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pmaddwd m3, m3
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; accumulate in 64bit
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punpckldq m7, m0, m5
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punpckhdq m0, m5
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paddq m4, m7
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punpckldq m7, m1, m5
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paddq m4, m0
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punpckhdq m1, m5
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paddq m4, m7
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punpckldq m7, m2, m5
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paddq m4, m1
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punpckhdq m2, m5
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paddq m6, m7
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punpckldq m7, m3, m5
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paddq m6, m2
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punpckhdq m3, m5
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paddq m6, m7
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paddq m6, m3
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add sizeq, mmsize
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jl .loop
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; accumulate horizontally and store in return value
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movhlps m5, m4
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movhlps m7, m6
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paddq m4, m5
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paddq m6, m7
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%if ARCH_X86_64
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movq rax, m4
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movq [sszq], m6
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%else
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mov eax, sszm
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pshufd m5, m4, 0x1
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movq [eax], m6
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movd eax, m4
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movd edx, m5
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%endif
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RET
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