233 lines
6.7 KiB
C++
233 lines
6.7 KiB
C++
/*
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* Copyright 2012 The LibYuv Project Authors. All rights reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include "libyuv/basic_types.h"
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#include "libyuv/row.h"
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#ifdef __cplusplus
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namespace libyuv {
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extern "C" {
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#endif
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#if !defined(LIBYUV_DISABLE_X86) && defined(_M_IX86) && defined(_MSC_VER)
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__declspec(naked) __declspec(align(16))
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uint32 SumSquareError_SSE2(const uint8* src_a, const uint8* src_b, int count) {
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__asm {
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mov eax, [esp + 4] // src_a
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mov edx, [esp + 8] // src_b
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mov ecx, [esp + 12] // count
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pxor xmm0, xmm0
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pxor xmm5, xmm5
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align 4
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wloop:
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movdqa xmm1, [eax]
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lea eax, [eax + 16]
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movdqa xmm2, [edx]
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lea edx, [edx + 16]
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sub ecx, 16
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movdqa xmm3, xmm1 // abs trick
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psubusb xmm1, xmm2
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psubusb xmm2, xmm3
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por xmm1, xmm2
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movdqa xmm2, xmm1
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punpcklbw xmm1, xmm5
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punpckhbw xmm2, xmm5
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pmaddwd xmm1, xmm1
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pmaddwd xmm2, xmm2
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paddd xmm0, xmm1
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paddd xmm0, xmm2
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jg wloop
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pshufd xmm1, xmm0, 0xee
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paddd xmm0, xmm1
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pshufd xmm1, xmm0, 0x01
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paddd xmm0, xmm1
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movd eax, xmm0
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ret
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}
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}
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// Visual C 2012 required for AVX2.
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#if _MSC_VER >= 1700
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// C4752: found Intel(R) Advanced Vector Extensions; consider using /arch:AVX.
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#pragma warning(disable: 4752)
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__declspec(naked) __declspec(align(16))
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uint32 SumSquareError_AVX2(const uint8* src_a, const uint8* src_b, int count) {
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__asm {
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mov eax, [esp + 4] // src_a
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mov edx, [esp + 8] // src_b
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mov ecx, [esp + 12] // count
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vpxor ymm0, ymm0, ymm0 // sum
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vpxor ymm5, ymm5, ymm5 // constant 0 for unpck
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sub edx, eax
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align 4
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wloop:
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vmovdqu ymm1, [eax]
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vmovdqu ymm2, [eax + edx]
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lea eax, [eax + 32]
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sub ecx, 32
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vpsubusb ymm3, ymm1, ymm2 // abs difference trick
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vpsubusb ymm2, ymm2, ymm1
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vpor ymm1, ymm2, ymm3
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vpunpcklbw ymm2, ymm1, ymm5 // u16. mutates order.
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vpunpckhbw ymm1, ymm1, ymm5
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vpmaddwd ymm2, ymm2, ymm2 // square + hadd to u32.
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vpmaddwd ymm1, ymm1, ymm1
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vpaddd ymm0, ymm0, ymm1
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vpaddd ymm0, ymm0, ymm2
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jg wloop
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vpshufd ymm1, ymm0, 0xee // 3, 2 + 1, 0 both lanes.
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vpaddd ymm0, ymm0, ymm1
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vpshufd ymm1, ymm0, 0x01 // 1 + 0 both lanes.
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vpaddd ymm0, ymm0, ymm1
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vpermq ymm1, ymm0, 0x02 // high + low lane.
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vpaddd ymm0, ymm0, ymm1
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vmovd eax, xmm0
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vzeroupper
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ret
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}
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}
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#endif // _MSC_VER >= 1700
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#define HAS_HASHDJB2_SSE41
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static uvec32 kHash16x33 = { 0x92d9e201, 0, 0, 0 }; // 33 ^ 16
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static uvec32 kHashMul0 = {
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0x0c3525e1, // 33 ^ 15
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0xa3476dc1, // 33 ^ 14
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0x3b4039a1, // 33 ^ 13
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0x4f5f0981, // 33 ^ 12
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};
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static uvec32 kHashMul1 = {
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0x30f35d61, // 33 ^ 11
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0x855cb541, // 33 ^ 10
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0x040a9121, // 33 ^ 9
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0x747c7101, // 33 ^ 8
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};
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static uvec32 kHashMul2 = {
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0xec41d4e1, // 33 ^ 7
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0x4cfa3cc1, // 33 ^ 6
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0x025528a1, // 33 ^ 5
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0x00121881, // 33 ^ 4
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};
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static uvec32 kHashMul3 = {
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0x00008c61, // 33 ^ 3
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0x00000441, // 33 ^ 2
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0x00000021, // 33 ^ 1
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0x00000001, // 33 ^ 0
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};
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// 27: 66 0F 38 40 C6 pmulld xmm0,xmm6
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// 44: 66 0F 38 40 DD pmulld xmm3,xmm5
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// 59: 66 0F 38 40 E5 pmulld xmm4,xmm5
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// 72: 66 0F 38 40 D5 pmulld xmm2,xmm5
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// 83: 66 0F 38 40 CD pmulld xmm1,xmm5
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#define pmulld(reg) _asm _emit 0x66 _asm _emit 0x0F _asm _emit 0x38 \
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_asm _emit 0x40 _asm _emit reg
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__declspec(naked) __declspec(align(16))
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uint32 HashDjb2_SSE41(const uint8* src, int count, uint32 seed) {
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__asm {
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mov eax, [esp + 4] // src
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mov ecx, [esp + 8] // count
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movd xmm0, [esp + 12] // seed
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pxor xmm7, xmm7 // constant 0 for unpck
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movdqa xmm6, kHash16x33
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align 4
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wloop:
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movdqu xmm1, [eax] // src[0-15]
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lea eax, [eax + 16]
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pmulld(0xc6) // pmulld xmm0,xmm6 hash *= 33 ^ 16
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movdqa xmm5, kHashMul0
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movdqa xmm2, xmm1
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punpcklbw xmm2, xmm7 // src[0-7]
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movdqa xmm3, xmm2
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punpcklwd xmm3, xmm7 // src[0-3]
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pmulld(0xdd) // pmulld xmm3, xmm5
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movdqa xmm5, kHashMul1
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movdqa xmm4, xmm2
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punpckhwd xmm4, xmm7 // src[4-7]
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pmulld(0xe5) // pmulld xmm4, xmm5
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movdqa xmm5, kHashMul2
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punpckhbw xmm1, xmm7 // src[8-15]
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movdqa xmm2, xmm1
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punpcklwd xmm2, xmm7 // src[8-11]
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pmulld(0xd5) // pmulld xmm2, xmm5
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movdqa xmm5, kHashMul3
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punpckhwd xmm1, xmm7 // src[12-15]
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pmulld(0xcd) // pmulld xmm1, xmm5
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paddd xmm3, xmm4 // add 16 results
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paddd xmm1, xmm2
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sub ecx, 16
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paddd xmm1, xmm3
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pshufd xmm2, xmm1, 0x0e // upper 2 dwords
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paddd xmm1, xmm2
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pshufd xmm2, xmm1, 0x01
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paddd xmm1, xmm2
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paddd xmm0, xmm1
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jg wloop
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movd eax, xmm0 // return hash
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ret
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}
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}
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// Visual C 2012 required for AVX2.
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#if _MSC_VER >= 1700
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__declspec(naked) __declspec(align(16))
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uint32 HashDjb2_AVX2(const uint8* src, int count, uint32 seed) {
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__asm {
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mov eax, [esp + 4] // src
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mov ecx, [esp + 8] // count
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movd xmm0, [esp + 12] // seed
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movdqa xmm6, kHash16x33
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align 4
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wloop:
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vpmovzxbd xmm3, dword ptr [eax] // src[0-3]
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pmulld xmm0, xmm6 // hash *= 33 ^ 16
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vpmovzxbd xmm4, dword ptr [eax + 4] // src[4-7]
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pmulld xmm3, kHashMul0
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vpmovzxbd xmm2, dword ptr [eax + 8] // src[8-11]
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pmulld xmm4, kHashMul1
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vpmovzxbd xmm1, dword ptr [eax + 12] // src[12-15]
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pmulld xmm2, kHashMul2
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lea eax, [eax + 16]
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pmulld xmm1, kHashMul3
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paddd xmm3, xmm4 // add 16 results
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paddd xmm1, xmm2
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sub ecx, 16
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paddd xmm1, xmm3
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pshufd xmm2, xmm1, 0x0e // upper 2 dwords
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paddd xmm1, xmm2
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pshufd xmm2, xmm1, 0x01
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paddd xmm1, xmm2
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paddd xmm0, xmm1
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jg wloop
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movd eax, xmm0 // return hash
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ret
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}
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}
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#endif // _MSC_VER >= 1700
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#endif // !defined(LIBYUV_DISABLE_X86) && defined(_M_IX86) && defined(_MSC_VER)
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#ifdef __cplusplus
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} // extern "C"
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} // namespace libyuv
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#endif
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