92df4a06d2
QWORD was being undefined because it was being used incorrectly. Change-Id: I3610cefa3d6f0da4054316760f78b9694cde3876
367 lines
13 KiB
NASM
367 lines
13 KiB
NASM
;
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; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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%include "vpx_ports/x86_abi_support.asm"
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%macro PROCESS_16X2X3 1
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%if %1
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movdqa xmm0, XMMWORD PTR [rsi]
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lddqu xmm5, XMMWORD PTR [rdi]
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lddqu xmm6, XMMWORD PTR [rdi+1]
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lddqu xmm7, XMMWORD PTR [rdi+2]
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psadbw xmm5, xmm0
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psadbw xmm6, xmm0
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psadbw xmm7, xmm0
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%else
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movdqa xmm0, XMMWORD PTR [rsi]
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lddqu xmm1, XMMWORD PTR [rdi]
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lddqu xmm2, XMMWORD PTR [rdi+1]
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lddqu xmm3, XMMWORD PTR [rdi+2]
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psadbw xmm1, xmm0
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psadbw xmm2, xmm0
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psadbw xmm3, xmm0
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paddw xmm5, xmm1
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paddw xmm6, xmm2
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paddw xmm7, xmm3
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%endif
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movdqa xmm0, XMMWORD PTR [rsi+rax]
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lddqu xmm1, XMMWORD PTR [rdi+rdx]
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lddqu xmm2, XMMWORD PTR [rdi+rdx+1]
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lddqu xmm3, XMMWORD PTR [rdi+rdx+2]
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lea rsi, [rsi+rax*2]
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lea rdi, [rdi+rdx*2]
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psadbw xmm1, xmm0
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psadbw xmm2, xmm0
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psadbw xmm3, xmm0
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paddw xmm5, xmm1
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paddw xmm6, xmm2
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paddw xmm7, xmm3
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%endmacro
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%macro PROCESS_16X2X3_OFFSET 2
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%if %1
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movdqa xmm0, XMMWORD PTR [rsi]
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movdqa xmm4, XMMWORD PTR [rdi]
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movdqa xmm7, XMMWORD PTR [rdi+16]
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movdqa xmm5, xmm7
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palignr xmm5, xmm4, %2
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movdqa xmm6, xmm7
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palignr xmm6, xmm4, (%2+1)
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palignr xmm7, xmm4, (%2+2)
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psadbw xmm5, xmm0
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psadbw xmm6, xmm0
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psadbw xmm7, xmm0
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%else
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movdqa xmm0, XMMWORD PTR [rsi]
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movdqa xmm4, XMMWORD PTR [rdi]
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movdqa xmm3, XMMWORD PTR [rdi+16]
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movdqa xmm1, xmm3
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palignr xmm1, xmm4, %2
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movdqa xmm2, xmm3
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palignr xmm2, xmm4, (%2+1)
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palignr xmm3, xmm4, (%2+2)
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psadbw xmm1, xmm0
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psadbw xmm2, xmm0
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psadbw xmm3, xmm0
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paddw xmm5, xmm1
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paddw xmm6, xmm2
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paddw xmm7, xmm3
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%endif
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movdqa xmm0, XMMWORD PTR [rsi+rax]
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movdqa xmm4, XMMWORD PTR [rdi+rdx]
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movdqa xmm3, XMMWORD PTR [rdi+rdx+16]
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movdqa xmm1, xmm3
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palignr xmm1, xmm4, %2
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movdqa xmm2, xmm3
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palignr xmm2, xmm4, (%2+1)
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palignr xmm3, xmm4, (%2+2)
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lea rsi, [rsi+rax*2]
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lea rdi, [rdi+rdx*2]
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psadbw xmm1, xmm0
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psadbw xmm2, xmm0
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psadbw xmm3, xmm0
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paddw xmm5, xmm1
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paddw xmm6, xmm2
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paddw xmm7, xmm3
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%endmacro
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%macro PROCESS_16X16X3_OFFSET 2
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%2_aligned_by_%1:
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sub rdi, %1
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PROCESS_16X2X3_OFFSET 1, %1
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PROCESS_16X2X3_OFFSET 0, %1
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PROCESS_16X2X3_OFFSET 0, %1
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PROCESS_16X2X3_OFFSET 0, %1
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PROCESS_16X2X3_OFFSET 0, %1
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PROCESS_16X2X3_OFFSET 0, %1
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PROCESS_16X2X3_OFFSET 0, %1
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PROCESS_16X2X3_OFFSET 0, %1
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jmp %2_store_off
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%endmacro
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%macro PROCESS_16X8X3_OFFSET 2
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%2_aligned_by_%1:
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sub rdi, %1
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PROCESS_16X2X3_OFFSET 1, %1
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PROCESS_16X2X3_OFFSET 0, %1
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PROCESS_16X2X3_OFFSET 0, %1
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PROCESS_16X2X3_OFFSET 0, %1
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jmp %2_store_off
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%endmacro
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;void int vp8_sad16x16x3_ssse3(
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; unsigned char *src_ptr,
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; int src_stride,
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; unsigned char *ref_ptr,
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; int ref_stride,
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; int *results)
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global sym(vp8_sad16x16x3_ssse3)
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sym(vp8_sad16x16x3_ssse3):
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 5
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push rsi
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push rdi
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push rcx
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; end prolog
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mov rsi, arg(0) ;src_ptr
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mov rdi, arg(2) ;ref_ptr
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mov rdx, 0xf
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and rdx, rdi
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jmp vp8_sad16x16x3_ssse3_skiptable
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vp8_sad16x16x3_ssse3_jumptable:
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dd vp8_sad16x16x3_ssse3_aligned_by_0 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_1 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_2 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_3 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_4 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_5 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_6 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_7 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_8 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_9 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_10 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_11 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_12 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_13 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_14 - vp8_sad16x16x3_ssse3_do_jump
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dd vp8_sad16x16x3_ssse3_aligned_by_15 - vp8_sad16x16x3_ssse3_do_jump
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vp8_sad16x16x3_ssse3_skiptable:
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call vp8_sad16x16x3_ssse3_do_jump
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vp8_sad16x16x3_ssse3_do_jump:
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pop rcx ; get the address of do_jump
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mov rax, vp8_sad16x16x3_ssse3_jumptable - vp8_sad16x16x3_ssse3_do_jump
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add rax, rcx ; get the absolute address of vp8_sad16x16x3_ssse3_jumptable
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movsxd rax, dword [rax + 4*rdx] ; get the 32 bit offset from the jumptable
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add rcx, rax
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movsxd rax, dword ptr arg(1) ;src_stride
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movsxd rdx, dword ptr arg(3) ;ref_stride
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jmp rcx
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PROCESS_16X16X3_OFFSET 0, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 1, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 2, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 3, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 4, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 5, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 6, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 7, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 8, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 9, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 10, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 11, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 12, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 13, vp8_sad16x16x3_ssse3
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PROCESS_16X16X3_OFFSET 14, vp8_sad16x16x3_ssse3
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vp8_sad16x16x3_ssse3_aligned_by_15:
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PROCESS_16X2X3 1
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PROCESS_16X2X3 0
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PROCESS_16X2X3 0
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PROCESS_16X2X3 0
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PROCESS_16X2X3 0
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PROCESS_16X2X3 0
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PROCESS_16X2X3 0
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PROCESS_16X2X3 0
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vp8_sad16x16x3_ssse3_store_off:
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mov rdi, arg(4) ;Results
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movq xmm0, xmm5
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psrldq xmm5, 8
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paddw xmm0, xmm5
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movd [rdi], xmm0
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;-
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movq xmm0, xmm6
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psrldq xmm6, 8
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paddw xmm0, xmm6
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movd [rdi+4], xmm0
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;-
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movq xmm0, xmm7
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psrldq xmm7, 8
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paddw xmm0, xmm7
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movd [rdi+8], xmm0
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; begin epilog
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pop rcx
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pop rdi
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pop rsi
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UNSHADOW_ARGS
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pop rbp
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ret
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;void int vp8_sad16x8x3_ssse3(
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; unsigned char *src_ptr,
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; int src_stride,
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; unsigned char *ref_ptr,
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; int ref_stride,
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; int *results)
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global sym(vp8_sad16x8x3_ssse3)
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sym(vp8_sad16x8x3_ssse3):
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 5
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push rsi
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push rdi
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push rcx
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; end prolog
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mov rsi, arg(0) ;src_ptr
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mov rdi, arg(2) ;ref_ptr
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mov rdx, 0xf
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and rdx, rdi
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jmp vp8_sad16x8x3_ssse3_skiptable
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vp8_sad16x8x3_ssse3_jumptable:
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dd vp8_sad16x8x3_ssse3_aligned_by_0 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_1 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_2 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_3 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_4 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_5 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_6 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_7 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_8 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_9 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_10 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_11 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_12 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_13 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_14 - vp8_sad16x8x3_ssse3_do_jump
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dd vp8_sad16x8x3_ssse3_aligned_by_15 - vp8_sad16x8x3_ssse3_do_jump
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vp8_sad16x8x3_ssse3_skiptable:
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call vp8_sad16x8x3_ssse3_do_jump
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vp8_sad16x8x3_ssse3_do_jump:
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pop rcx ; get the address of do_jump
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mov rax, vp8_sad16x8x3_ssse3_jumptable - vp8_sad16x8x3_ssse3_do_jump
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add rax, rcx ; get the absolute address of vp8_sad16x8x3_ssse3_jumptable
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movsxd rax, dword [rax + 4*rdx] ; get the 32 bit offset from the jumptable
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add rcx, rax
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movsxd rax, dword ptr arg(1) ;src_stride
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movsxd rdx, dword ptr arg(3) ;ref_stride
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jmp rcx
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PROCESS_16X8X3_OFFSET 0, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 1, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 2, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 3, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 4, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 5, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 6, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 7, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 8, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 9, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 10, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 11, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 12, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 13, vp8_sad16x8x3_ssse3
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PROCESS_16X8X3_OFFSET 14, vp8_sad16x8x3_ssse3
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vp8_sad16x8x3_ssse3_aligned_by_15:
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PROCESS_16X2X3 1
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PROCESS_16X2X3 0
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PROCESS_16X2X3 0
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PROCESS_16X2X3 0
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vp8_sad16x8x3_ssse3_store_off:
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mov rdi, arg(4) ;Results
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movq xmm0, xmm5
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psrldq xmm5, 8
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paddw xmm0, xmm5
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movd [rdi], xmm0
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;-
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movq xmm0, xmm6
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psrldq xmm6, 8
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paddw xmm0, xmm6
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movd [rdi+4], xmm0
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;-
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movq xmm0, xmm7
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psrldq xmm7, 8
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paddw xmm0, xmm7
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movd [rdi+8], xmm0
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; begin epilog
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pop rcx
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pop rdi
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pop rsi
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UNSHADOW_ARGS
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pop rbp
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ret
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