94c52e4da8
When the license headers were updated, they accidentally contained trailing whitespace, so unfortunately we have to touch all the files again. Change-Id: I236c05fade06589e417179c0444cb39b09e4200d
433 lines
13 KiB
NASM
433 lines
13 KiB
NASM
;
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; Copyright (c) 2010 The VP8 project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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%include "vpx_ports/x86_abi_support.asm"
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;void vp8_subtract_b_mmx_impl(unsigned char *z, int src_stride,
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; unsigned short *diff, unsigned char *Predictor,
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; int pitch);
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global sym(vp8_subtract_b_mmx_impl)
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sym(vp8_subtract_b_mmx_impl)
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 5
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push rsi
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push rdi
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; end prolog
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mov rdi, arg(2) ;diff
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mov rax, arg(3) ;Predictor
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mov rsi, arg(0) ;z
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movsxd rdx, dword ptr arg(1);src_stride;
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movsxd rcx, dword ptr arg(4);pitch
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pxor mm7, mm7
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movd mm0, [rsi]
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movd mm1, [rax]
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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psubw mm0, mm1
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movq [rdi], mm0
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movd mm0, [rsi+rdx]
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movd mm1, [rax+rcx]
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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psubw mm0, mm1
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movq [rdi+rcx*2],mm0
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movd mm0, [rsi+rdx*2]
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movd mm1, [rax+rcx*2]
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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psubw mm0, mm1
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movq [rdi+rcx*4], mm0
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lea rsi, [rsi+rdx*2]
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lea rcx, [rcx+rcx*2]
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movd mm0, [rsi+rdx]
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movd mm1, [rax+rcx]
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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psubw mm0, mm1
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movq [rdi+rcx*2], mm0
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; begin epilog
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pop rdi
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pop rsi
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UNSHADOW_ARGS
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pop rbp
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ret
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;void vp8_subtract_mby_mmx(short *diff, unsigned char *src, unsigned char *pred, int stride)
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global sym(vp8_subtract_mby_mmx)
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sym(vp8_subtract_mby_mmx):
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 4
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push rsi
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push rdi
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; end prolog
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mov rsi, arg(1) ;src
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mov rdi, arg(0) ;diff
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mov rax, arg(2) ;pred
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movsxd rdx, dword ptr arg(3) ;stride
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mov rcx, 16
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pxor mm0, mm0
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submby_loop:
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movq mm1, [rsi]
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movq mm3, [rax]
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movq mm2, mm1
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movq mm4, mm3
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punpcklbw mm1, mm0
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punpcklbw mm3, mm0
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punpckhbw mm2, mm0
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punpckhbw mm4, mm0
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psubw mm1, mm3
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psubw mm2, mm4
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movq [rdi], mm1
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movq [rdi+8], mm2
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movq mm1, [rsi+8]
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movq mm3, [rax+8]
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movq mm2, mm1
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movq mm4, mm3
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punpcklbw mm1, mm0
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punpcklbw mm3, mm0
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punpckhbw mm2, mm0
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punpckhbw mm4, mm0
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psubw mm1, mm3
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psubw mm2, mm4
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movq [rdi+16], mm1
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movq [rdi+24], mm2
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add rdi, 32
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add rax, 16
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lea rsi, [rsi+rdx]
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sub rcx, 1
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jnz submby_loop
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pop rdi
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pop rsi
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; begin epilog
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UNSHADOW_ARGS
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pop rbp
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ret
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;void vp8_subtract_mbuv_mmx(short *diff, unsigned char *usrc, unsigned char *vsrc, unsigned char *pred, int stride)
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global sym(vp8_subtract_mbuv_mmx)
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sym(vp8_subtract_mbuv_mmx)
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 5
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push rsi
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push rdi
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; end prolog
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;short *udiff = diff + 256;
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;short *vdiff = diff + 320;
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;unsigned char *upred = pred + 256;
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;unsigned char *vpred = pred + 320;
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;unsigned char *z = usrc;
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;unsigned short *diff = udiff;
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;unsigned char *Predictor= upred;
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mov rdi, arg(0) ;diff
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mov rax, arg(3) ;pred
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mov rsi, arg(1) ;z = usrc
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add rdi, 256*2 ;diff = diff + 256 (shorts)
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add rax, 256 ;Predictor = pred + 256
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movsxd rdx, dword ptr arg(4) ;stride;
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pxor mm7, mm7
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movq mm0, [rsi]
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movq mm1, [rax]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi], mm0
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movq [rdi+8], mm3
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movq mm0, [rsi+rdx]
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movq mm1, [rax+8]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+16], mm0
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movq [rdi+24], mm3
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movq mm0, [rsi+rdx*2]
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movq mm1, [rax+16]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+32], mm0
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movq [rdi+40], mm3
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lea rsi, [rsi+rdx*2]
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movq mm0, [rsi+rdx]
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movq mm1, [rax+24]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+48], mm0
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movq [rdi+56], mm3
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add rdi, 64
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add rax, 32
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lea rsi, [rsi+rdx*2]
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movq mm0, [rsi]
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movq mm1, [rax]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi], mm0
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movq [rdi+8], mm3
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movq mm0, [rsi+rdx]
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movq mm1, [rax+8]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+16], mm0
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movq [rdi+24], mm3
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movq mm0, [rsi+rdx*2]
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movq mm1, [rax+16]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+32], mm0
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movq [rdi+40], mm3
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lea rsi, [rsi+rdx*2]
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movq mm0, [rsi+rdx]
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movq mm1, [rax+24]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+48], mm0
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movq [rdi+56], mm3
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;unsigned char *z = vsrc;
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;unsigned short *diff = vdiff;
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;unsigned char *Predictor= vpred;
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mov rdi, arg(0) ;diff
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mov rax, arg(3) ;pred
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mov rsi, arg(2) ;z = usrc
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add rdi, 320*2 ;diff = diff + 320 (shorts)
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add rax, 320 ;Predictor = pred + 320
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movsxd rdx, dword ptr arg(4) ;stride;
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pxor mm7, mm7
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movq mm0, [rsi]
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movq mm1, [rax]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi], mm0
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movq [rdi+8], mm3
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movq mm0, [rsi+rdx]
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movq mm1, [rax+8]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+16], mm0
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movq [rdi+24], mm3
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movq mm0, [rsi+rdx*2]
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movq mm1, [rax+16]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+32], mm0
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movq [rdi+40], mm3
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lea rsi, [rsi+rdx*2]
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movq mm0, [rsi+rdx]
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movq mm1, [rax+24]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+48], mm0
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movq [rdi+56], mm3
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add rdi, 64
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add rax, 32
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lea rsi, [rsi+rdx*2]
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movq mm0, [rsi]
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movq mm1, [rax]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi], mm0
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movq [rdi+8], mm3
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movq mm0, [rsi+rdx]
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movq mm1, [rax+8]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+16], mm0
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movq [rdi+24], mm3
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movq mm0, [rsi+rdx*2]
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movq mm1, [rax+16]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+32], mm0
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movq [rdi+40], mm3
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lea rsi, [rsi+rdx*2]
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movq mm0, [rsi+rdx]
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movq mm1, [rax+24]
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movq mm3, mm0
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movq mm4, mm1
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punpcklbw mm0, mm7
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punpcklbw mm1, mm7
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punpckhbw mm3, mm7
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punpckhbw mm4, mm7
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psubw mm0, mm1
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psubw mm3, mm4
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movq [rdi+48], mm0
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movq [rdi+56], mm3
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; begin epilog
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pop rdi
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pop rsi
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UNSHADOW_ARGS
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pop rbp
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ret
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