153 lines
3.4 KiB
NASM
153 lines
3.4 KiB
NASM
;
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; Copyright (c) 2010 The VP8 project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license and patent
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; grant that can be found in the LICENSE file in the root of the source
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; tree. All contributing project authors may be found in the AUTHORS
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; file in the root of the source tree.
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;
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.globl vp8_subtract_mbuv_ppc
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.globl vp8_subtract_mby_ppc
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;# r3 short *diff
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;# r4 unsigned char *usrc
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;# r5 unsigned char *vsrc
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;# r6 unsigned char *pred
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;# r7 int stride
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vp8_subtract_mbuv_ppc:
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mfspr r11, 256 ;# get old VRSAVE
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oris r12, r11, 0xf000
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mtspr 256, r12 ;# set VRSAVE
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li r9, 256
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add r3, r3, r9
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add r3, r3, r9
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add r6, r6, r9
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li r10, 16
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li r9, 4
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mtctr r9
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vspltisw v0, 0
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mbu_loop:
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lvsl v5, 0, r4 ;# permutate value for alignment
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lvx v1, 0, r4 ;# src
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lvx v2, 0, r6 ;# pred
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add r4, r4, r7
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addi r6, r6, 16
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vperm v1, v1, v0, v5
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vmrghb v3, v0, v1 ;# unpack high src to short
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vmrghb v4, v0, v2 ;# unpack high pred to short
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lvsl v5, 0, r4 ;# permutate value for alignment
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lvx v1, 0, r4 ;# src
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add r4, r4, r7
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vsubshs v3, v3, v4
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stvx v3, 0, r3 ;# store out diff
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vperm v1, v1, v0, v5
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vmrghb v3, v0, v1 ;# unpack high src to short
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vmrglb v4, v0, v2 ;# unpack high pred to short
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vsubshs v3, v3, v4
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stvx v3, r10, r3 ;# store out diff
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addi r3, r3, 32
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bdnz mbu_loop
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mtctr r9
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mbv_loop:
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lvsl v5, 0, r5 ;# permutate value for alignment
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lvx v1, 0, r5 ;# src
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lvx v2, 0, r6 ;# pred
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add r5, r5, r7
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addi r6, r6, 16
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vperm v1, v1, v0, v5
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vmrghb v3, v0, v1 ;# unpack high src to short
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vmrghb v4, v0, v2 ;# unpack high pred to short
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lvsl v5, 0, r5 ;# permutate value for alignment
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lvx v1, 0, r5 ;# src
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add r5, r5, r7
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vsubshs v3, v3, v4
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stvx v3, 0, r3 ;# store out diff
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vperm v1, v1, v0, v5
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vmrghb v3, v0, v1 ;# unpack high src to short
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vmrglb v4, v0, v2 ;# unpack high pred to short
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vsubshs v3, v3, v4
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stvx v3, r10, r3 ;# store out diff
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addi r3, r3, 32
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bdnz mbv_loop
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mtspr 256, r11 ;# reset old VRSAVE
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blr
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;# r3 short *diff
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;# r4 unsigned char *src
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;# r5 unsigned char *pred
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;# r6 int stride
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vp8_subtract_mby_ppc:
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mfspr r11, 256 ;# get old VRSAVE
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oris r12, r11, 0xf800
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mtspr 256, r12 ;# set VRSAVE
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li r10, 16
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mtctr r10
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vspltisw v0, 0
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mby_loop:
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lvx v1, 0, r4 ;# src
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lvx v2, 0, r5 ;# pred
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add r4, r4, r6
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addi r5, r5, 16
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vmrghb v3, v0, v1 ;# unpack high src to short
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vmrghb v4, v0, v2 ;# unpack high pred to short
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vsubshs v3, v3, v4
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stvx v3, 0, r3 ;# store out diff
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vmrglb v3, v0, v1 ;# unpack low src to short
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vmrglb v4, v0, v2 ;# unpack low pred to short
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vsubshs v3, v3, v4
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stvx v3, r10, r3 ;# store out diff
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addi r3, r3, 32
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bdnz mby_loop
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mtspr 256, r11 ;# reset old VRSAVE
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blr
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