380 lines
15 KiB
C
380 lines
15 KiB
C
/*
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* Copyright (c) 2016 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <assert.h>
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#include <immintrin.h>
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#include "./vpx_config.h"
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#include "vpx_ports/mem.h"
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#include "vpx/vpx_integer.h"
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#include "vpx_dsp/vpx_dsp_common.h"
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#include "vpx_dsp/x86/synonyms.h"
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#include "vpx_dsp/vpx_filter.h"
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////////////////////////////////////////////////////////////////////////////////
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// 8 bit
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////////////////////////////////////////////////////////////////////////////////
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static INLINE void obmc_variance_w4(const uint8_t *pre,
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const int pre_stride,
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const int32_t *wsrc,
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const int32_t *mask,
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unsigned int *const sse,
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int *const sum,
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const int h) {
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const int pre_step = pre_stride - 4;
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int n = 0;
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__m128i v_sum_d = _mm_setzero_si128();
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__m128i v_sse_d = _mm_setzero_si128();
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assert(IS_POWER_OF_TWO(h));
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do {
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const __m128i v_p_b = xx_loadl_32(pre + n);
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const __m128i v_m_d = xx_load_128(mask + n);
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const __m128i v_w_d = xx_load_128(wsrc + n);
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const __m128i v_p_d = _mm_cvtepu8_epi32(v_p_b);
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// Values in both pre and mask fit in 15 bits, and are packed at 32 bit
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// boundaries. We use pmaddwd, as it has lower latency on Haswell
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// than pmulld but produces the same result with these inputs.
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const __m128i v_pm_d = _mm_madd_epi16(v_p_d, v_m_d);
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const __m128i v_diff_d = _mm_sub_epi32(v_w_d, v_pm_d);
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const __m128i v_rdiff_d = xx_roundn_epi32(v_diff_d, 12);
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const __m128i v_sqrdiff_d = _mm_mullo_epi32(v_rdiff_d, v_rdiff_d);
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v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff_d);
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v_sse_d = _mm_add_epi32(v_sse_d, v_sqrdiff_d);
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n += 4;
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if (n % 4 == 0) pre += pre_step;
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} while (n < 4 * h);
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*sum = xx_hsum_epi32_si32(v_sum_d);
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*sse = xx_hsum_epi32_si32(v_sse_d);
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}
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static INLINE void obmc_variance_w8n(const uint8_t *pre,
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const int pre_stride,
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const int32_t *wsrc,
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const int32_t *mask,
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unsigned int *const sse,
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int *const sum,
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const int w,
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const int h) {
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const int pre_step = pre_stride - w;
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int n = 0;
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__m128i v_sum_d = _mm_setzero_si128();
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__m128i v_sse_d = _mm_setzero_si128();
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assert(w >= 8);
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assert(IS_POWER_OF_TWO(w));
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assert(IS_POWER_OF_TWO(h));
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do {
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const __m128i v_p1_b = xx_loadl_32(pre + n + 4);
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const __m128i v_m1_d = xx_load_128(mask + n + 4);
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const __m128i v_w1_d = xx_load_128(wsrc + n + 4);
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const __m128i v_p0_b = xx_loadl_32(pre + n);
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const __m128i v_m0_d = xx_load_128(mask + n);
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const __m128i v_w0_d = xx_load_128(wsrc + n);
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const __m128i v_p0_d = _mm_cvtepu8_epi32(v_p0_b);
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const __m128i v_p1_d = _mm_cvtepu8_epi32(v_p1_b);
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// Values in both pre and mask fit in 15 bits, and are packed at 32 bit
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// boundaries. We use pmaddwd, as it has lower latency on Haswell
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// than pmulld but produces the same result with these inputs.
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const __m128i v_pm0_d = _mm_madd_epi16(v_p0_d, v_m0_d);
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const __m128i v_pm1_d = _mm_madd_epi16(v_p1_d, v_m1_d);
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const __m128i v_diff0_d = _mm_sub_epi32(v_w0_d, v_pm0_d);
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const __m128i v_diff1_d = _mm_sub_epi32(v_w1_d, v_pm1_d);
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const __m128i v_rdiff0_d = xx_roundn_epi32(v_diff0_d, 12);
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const __m128i v_rdiff1_d = xx_roundn_epi32(v_diff1_d, 12);
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const __m128i v_rdiff01_w = _mm_packs_epi32(v_rdiff0_d, v_rdiff1_d);
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const __m128i v_sqrdiff_d = _mm_madd_epi16(v_rdiff01_w, v_rdiff01_w);
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v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff0_d);
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v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff1_d);
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v_sse_d = _mm_add_epi32(v_sse_d, v_sqrdiff_d);
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n += 8;
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if (n % w == 0) pre += pre_step;
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} while (n < w * h);
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*sum = xx_hsum_epi32_si32(v_sum_d);
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*sse = xx_hsum_epi32_si32(v_sse_d);
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}
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#define OBMCVARWXH(W, H) \
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unsigned int vpx_obmc_variance##W##x##H##_sse4_1(const uint8_t *pre, \
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int pre_stride, \
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const int32_t *wsrc, \
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const int32_t *mask, \
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unsigned int *sse) { \
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int sum; \
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if (W == 4) { \
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obmc_variance_w4(pre, pre_stride, wsrc, mask, sse, &sum, H); \
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} else { \
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obmc_variance_w8n(pre, pre_stride, wsrc, mask, sse, &sum, W, H); \
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} \
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return *sse - (((int64_t)sum * sum) / (W * H)); \
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}
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#if CONFIG_EXT_PARTITION
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OBMCVARWXH(128, 128)
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OBMCVARWXH(128, 64)
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OBMCVARWXH(64, 128)
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#endif // CONFIG_EXT_PARTITION
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OBMCVARWXH(64, 64)
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OBMCVARWXH(64, 32)
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OBMCVARWXH(32, 64)
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OBMCVARWXH(32, 32)
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OBMCVARWXH(32, 16)
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OBMCVARWXH(16, 32)
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OBMCVARWXH(16, 16)
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OBMCVARWXH(16, 8)
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OBMCVARWXH(8, 16)
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OBMCVARWXH(8, 8)
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OBMCVARWXH(8, 4)
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OBMCVARWXH(4, 8)
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OBMCVARWXH(4, 4)
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////////////////////////////////////////////////////////////////////////////////
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// High bit-depth
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////////////////////////////////////////////////////////////////////////////////
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#if CONFIG_VPX_HIGHBITDEPTH
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static INLINE void hbd_obmc_variance_w4(const uint8_t *pre8,
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const int pre_stride,
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const int32_t *wsrc,
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const int32_t *mask,
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uint64_t *const sse,
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int64_t *const sum,
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const int h) {
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const uint16_t *pre = CONVERT_TO_SHORTPTR(pre8);
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const int pre_step = pre_stride - 4;
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int n = 0;
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__m128i v_sum_d = _mm_setzero_si128();
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__m128i v_sse_d = _mm_setzero_si128();
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assert(IS_POWER_OF_TWO(h));
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do {
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const __m128i v_p_w = xx_loadl_64(pre + n);
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const __m128i v_m_d = xx_load_128(mask + n);
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const __m128i v_w_d = xx_load_128(wsrc + n);
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const __m128i v_p_d = _mm_cvtepu16_epi32(v_p_w);
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// Values in both pre and mask fit in 15 bits, and are packed at 32 bit
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// boundaries. We use pmaddwd, as it has lower latency on Haswell
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// than pmulld but produces the same result with these inputs.
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const __m128i v_pm_d = _mm_madd_epi16(v_p_d, v_m_d);
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const __m128i v_diff_d = _mm_sub_epi32(v_w_d, v_pm_d);
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const __m128i v_rdiff_d = xx_roundn_epi32(v_diff_d, 12);
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const __m128i v_sqrdiff_d = _mm_mullo_epi32(v_rdiff_d, v_rdiff_d);
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v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff_d);
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v_sse_d = _mm_add_epi32(v_sse_d, v_sqrdiff_d);
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n += 4;
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if (n % 4 == 0) pre += pre_step;
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} while (n < 4 * h);
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*sum = xx_hsum_epi32_si32(v_sum_d);
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*sse = xx_hsum_epi32_si32(v_sse_d);
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}
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static INLINE void hbd_obmc_variance_w8n(const uint8_t *pre8,
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const int pre_stride,
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const int32_t *wsrc,
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const int32_t *mask,
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uint64_t *const sse,
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int64_t *const sum,
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const int w,
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const int h) {
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const uint16_t *pre = CONVERT_TO_SHORTPTR(pre8);
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const int pre_step = pre_stride - w;
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int n = 0;
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__m128i v_sum_d = _mm_setzero_si128();
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__m128i v_sse_d = _mm_setzero_si128();
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assert(w >= 8);
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assert(IS_POWER_OF_TWO(w));
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assert(IS_POWER_OF_TWO(h));
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do {
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const __m128i v_p1_w = xx_loadl_64(pre + n + 4);
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const __m128i v_m1_d = xx_load_128(mask + n + 4);
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const __m128i v_w1_d = xx_load_128(wsrc + n + 4);
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const __m128i v_p0_w = xx_loadl_64(pre + n);
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const __m128i v_m0_d = xx_load_128(mask + n);
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const __m128i v_w0_d = xx_load_128(wsrc + n);
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const __m128i v_p0_d = _mm_cvtepu16_epi32(v_p0_w);
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const __m128i v_p1_d = _mm_cvtepu16_epi32(v_p1_w);
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// Values in both pre and mask fit in 15 bits, and are packed at 32 bit
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// boundaries. We use pmaddwd, as it has lower latency on Haswell
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// than pmulld but produces the same result with these inputs.
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const __m128i v_pm0_d = _mm_madd_epi16(v_p0_d, v_m0_d);
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const __m128i v_pm1_d = _mm_madd_epi16(v_p1_d, v_m1_d);
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const __m128i v_diff0_d = _mm_sub_epi32(v_w0_d, v_pm0_d);
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const __m128i v_diff1_d = _mm_sub_epi32(v_w1_d, v_pm1_d);
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const __m128i v_rdiff0_d = xx_roundn_epi32(v_diff0_d, 12);
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const __m128i v_rdiff1_d = xx_roundn_epi32(v_diff1_d, 12);
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const __m128i v_rdiff01_w = _mm_packs_epi32(v_rdiff0_d, v_rdiff1_d);
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const __m128i v_sqrdiff_d = _mm_madd_epi16(v_rdiff01_w, v_rdiff01_w);
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v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff0_d);
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v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff1_d);
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v_sse_d = _mm_add_epi32(v_sse_d, v_sqrdiff_d);
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n += 8;
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if (n % w == 0) pre += pre_step;
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} while (n < w * h);
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*sum += xx_hsum_epi32_si64(v_sum_d);
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*sse += xx_hsum_epi32_si64(v_sse_d);
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}
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static INLINE void highbd_obmc_variance(const uint8_t *pre8, int pre_stride,
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const int32_t *wsrc,
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const int32_t *mask,
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int w, int h,
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unsigned int *sse, int *sum) {
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int64_t sum64 = 0;
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uint64_t sse64 = 0;
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if (w == 4) {
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hbd_obmc_variance_w4(pre8, pre_stride, wsrc, mask, &sse64, &sum64, h);
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} else {
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hbd_obmc_variance_w8n(pre8, pre_stride, wsrc, mask, &sse64, &sum64, w, h);
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}
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*sum = (int)sum64;
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*sse = (unsigned int)sse64;
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}
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static INLINE void highbd_10_obmc_variance(const uint8_t *pre8, int pre_stride,
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const int32_t *wsrc,
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const int32_t *mask,
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int w, int h,
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unsigned int *sse, int *sum) {
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int64_t sum64 = 0;
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uint64_t sse64 = 0;
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if (w == 4) {
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hbd_obmc_variance_w4(pre8, pre_stride, wsrc, mask, &sse64, &sum64, h);
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} else {
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hbd_obmc_variance_w8n(pre8, pre_stride, wsrc, mask, &sse64, &sum64, w, h);
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}
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*sum = (int)ROUND_POWER_OF_TWO(sum64, 2);
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*sse = (unsigned int)ROUND_POWER_OF_TWO(sse64, 4);
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}
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static INLINE void highbd_12_obmc_variance(const uint8_t *pre8, int pre_stride,
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const int32_t *wsrc,
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const int32_t *mask,
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int w, int h,
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unsigned int *sse, int *sum) {
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int64_t sum64 = 0;
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uint64_t sse64 = 0;
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if (w == 128) {
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do {
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hbd_obmc_variance_w8n(pre8, pre_stride, wsrc, mask,
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&sse64, &sum64, 128, 32);
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pre8 += 32 * pre_stride;
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wsrc += 32 * 128;
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mask += 32 * 128;
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h -= 32;
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} while (h > 0);
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} else if (w == 64 && h >= 128) {
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do {
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hbd_obmc_variance_w8n(pre8, pre_stride, wsrc, mask,
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&sse64, &sum64, 64, 64);
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pre8 += 64 * pre_stride;
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wsrc += 64 * 64;
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mask += 64 * 64;
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h -= 64;
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} while (h > 0);
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} else if (w == 4) {
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hbd_obmc_variance_w4(pre8, pre_stride, wsrc, mask, &sse64, &sum64, h);
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} else {
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hbd_obmc_variance_w8n(pre8, pre_stride, wsrc, mask, &sse64, &sum64, w, h);
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}
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*sum = (int)ROUND_POWER_OF_TWO(sum64, 4);
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*sse = (unsigned int)ROUND_POWER_OF_TWO(sse64, 8);
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}
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#define HBD_OBMCVARWXH(W, H) \
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unsigned int vpx_highbd_obmc_variance##W##x##H##_sse4_1( \
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const uint8_t *pre, \
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int pre_stride, \
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const int32_t *wsrc, \
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const int32_t *mask, \
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unsigned int *sse) { \
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int sum; \
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highbd_obmc_variance(pre, pre_stride, wsrc, mask, W, H, sse, &sum); \
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return *sse - (((int64_t)sum * sum) / (W * H)); \
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} \
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\
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unsigned int vpx_highbd_10_obmc_variance##W##x##H##_sse4_1( \
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const uint8_t *pre, \
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int pre_stride, \
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const int32_t *wsrc, \
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const int32_t *mask, \
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unsigned int *sse) { \
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int sum; \
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highbd_10_obmc_variance(pre, pre_stride, wsrc, mask, W, H, sse, &sum); \
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return *sse - (((int64_t)sum * sum) / (W * H)); \
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} \
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\
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unsigned int vpx_highbd_12_obmc_variance##W##x##H##_sse4_1( \
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const uint8_t *pre, \
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int pre_stride, \
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const int32_t *wsrc, \
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const int32_t *mask, \
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unsigned int *sse) { \
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int sum; \
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highbd_12_obmc_variance(pre, pre_stride, wsrc, mask, W, H, sse, &sum); \
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return *sse - (((int64_t)sum * sum) / (W * H)); \
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}
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#if CONFIG_EXT_PARTITION
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HBD_OBMCVARWXH(128, 128)
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HBD_OBMCVARWXH(128, 64)
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HBD_OBMCVARWXH(64, 128)
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#endif // CONFIG_EXT_PARTITION
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HBD_OBMCVARWXH(64, 64)
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HBD_OBMCVARWXH(64, 32)
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HBD_OBMCVARWXH(32, 64)
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HBD_OBMCVARWXH(32, 32)
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HBD_OBMCVARWXH(32, 16)
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HBD_OBMCVARWXH(16, 32)
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HBD_OBMCVARWXH(16, 16)
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HBD_OBMCVARWXH(16, 8)
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HBD_OBMCVARWXH(8, 16)
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HBD_OBMCVARWXH(8, 8)
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HBD_OBMCVARWXH(8, 4)
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HBD_OBMCVARWXH(4, 8)
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HBD_OBMCVARWXH(4, 4)
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#endif // CONFIG_VPX_HIGHBITDEPTH
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