bc4341fd94
quiets some -Wmissing-prototypes warnings BUG=b/29584271 Change-Id: I9174728459fcabb6d9ac0028ae58029e52c0da92
309 lines
8.3 KiB
C
309 lines
8.3 KiB
C
/*
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* Copyright (c) 2012 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include "./vp10_rtcd.h"
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#include "vpx_dsp/x86/inv_txfm_sse2.h"
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#include "vpx_dsp/x86/txfm_common_sse2.h"
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#include "vpx_ports/mem.h"
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#include "vp10/common/enums.h"
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#if CONFIG_EXT_TX
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static INLINE void fliplr_4x4(__m128i in[2]) {
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in[0] = _mm_shufflelo_epi16(in[0], 0x1b);
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in[0] = _mm_shufflehi_epi16(in[0], 0x1b);
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in[1] = _mm_shufflelo_epi16(in[1], 0x1b);
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in[1] = _mm_shufflehi_epi16(in[1], 0x1b);
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}
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static INLINE void fliplr_8x8(__m128i in[8]) {
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in[0] = mm_reverse_epi16(in[0]);
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in[1] = mm_reverse_epi16(in[1]);
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in[2] = mm_reverse_epi16(in[2]);
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in[3] = mm_reverse_epi16(in[3]);
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in[4] = mm_reverse_epi16(in[4]);
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in[5] = mm_reverse_epi16(in[5]);
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in[6] = mm_reverse_epi16(in[6]);
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in[7] = mm_reverse_epi16(in[7]);
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}
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static INLINE void fliplr_16x8(__m128i in[16]) {
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fliplr_8x8(&in[0]);
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fliplr_8x8(&in[8]);
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}
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#define FLIPLR_16x16(in0, in1) do { \
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__m128i *tmp; \
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fliplr_16x8(in0); \
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fliplr_16x8(in1); \
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tmp = (in0); \
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(in0) = (in1); \
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(in1) = tmp; \
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} while (0)
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#define FLIPUD_PTR(dest, stride, size) do { \
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(dest) = (dest) + ((size) - 1) * (stride); \
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(stride) = - (stride); \
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} while (0)
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#endif
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void vp10_iht4x4_16_add_sse2(const tran_low_t *input, uint8_t *dest, int stride,
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int tx_type) {
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__m128i in[2];
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const __m128i zero = _mm_setzero_si128();
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const __m128i eight = _mm_set1_epi16(8);
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in[0] = load_input_data(input);
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in[1] = load_input_data(input + 8);
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switch (tx_type) {
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case DCT_DCT:
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idct4_sse2(in);
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idct4_sse2(in);
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break;
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case ADST_DCT:
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idct4_sse2(in);
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iadst4_sse2(in);
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break;
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case DCT_ADST:
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iadst4_sse2(in);
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idct4_sse2(in);
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break;
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case ADST_ADST:
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iadst4_sse2(in);
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iadst4_sse2(in);
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break;
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#if CONFIG_EXT_TX
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case FLIPADST_DCT:
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idct4_sse2(in);
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iadst4_sse2(in);
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FLIPUD_PTR(dest, stride, 4);
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break;
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case DCT_FLIPADST:
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iadst4_sse2(in);
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idct4_sse2(in);
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fliplr_4x4(in);
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break;
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case FLIPADST_FLIPADST:
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iadst4_sse2(in);
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iadst4_sse2(in);
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FLIPUD_PTR(dest, stride, 4);
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fliplr_4x4(in);
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break;
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case ADST_FLIPADST:
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iadst4_sse2(in);
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iadst4_sse2(in);
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fliplr_4x4(in);
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break;
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case FLIPADST_ADST:
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iadst4_sse2(in);
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iadst4_sse2(in);
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FLIPUD_PTR(dest, stride, 4);
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break;
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#endif // CONFIG_EXT_TX
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default:
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assert(0);
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break;
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}
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// Final round and shift
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in[0] = _mm_add_epi16(in[0], eight);
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in[1] = _mm_add_epi16(in[1], eight);
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in[0] = _mm_srai_epi16(in[0], 4);
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in[1] = _mm_srai_epi16(in[1], 4);
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// Reconstruction and Store
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{
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__m128i d0 = _mm_cvtsi32_si128(*(const int *)(dest + stride * 0));
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__m128i d1 = _mm_cvtsi32_si128(*(const int *)(dest + stride * 1));
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__m128i d2 = _mm_cvtsi32_si128(*(const int *)(dest + stride * 2));
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__m128i d3 = _mm_cvtsi32_si128(*(const int *)(dest + stride * 3));
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d0 = _mm_unpacklo_epi32(d0, d1);
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d2 = _mm_unpacklo_epi32(d2, d3);
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d0 = _mm_unpacklo_epi8(d0, zero);
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d2 = _mm_unpacklo_epi8(d2, zero);
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d0 = _mm_add_epi16(d0, in[0]);
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d2 = _mm_add_epi16(d2, in[1]);
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d0 = _mm_packus_epi16(d0, d2);
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// store result[0]
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*(int *)dest = _mm_cvtsi128_si32(d0);
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// store result[1]
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d0 = _mm_srli_si128(d0, 4);
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*(int *)(dest + stride) = _mm_cvtsi128_si32(d0);
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// store result[2]
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d0 = _mm_srli_si128(d0, 4);
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*(int *)(dest + stride * 2) = _mm_cvtsi128_si32(d0);
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// store result[3]
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d0 = _mm_srli_si128(d0, 4);
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*(int *)(dest + stride * 3) = _mm_cvtsi128_si32(d0);
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}
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}
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void vp10_iht8x8_64_add_sse2(const tran_low_t *input, uint8_t *dest, int stride,
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int tx_type) {
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__m128i in[8];
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const __m128i zero = _mm_setzero_si128();
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const __m128i final_rounding = _mm_set1_epi16(1 << 4);
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// load input data
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in[0] = load_input_data(input);
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in[1] = load_input_data(input + 8 * 1);
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in[2] = load_input_data(input + 8 * 2);
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in[3] = load_input_data(input + 8 * 3);
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in[4] = load_input_data(input + 8 * 4);
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in[5] = load_input_data(input + 8 * 5);
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in[6] = load_input_data(input + 8 * 6);
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in[7] = load_input_data(input + 8 * 7);
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switch (tx_type) {
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case DCT_DCT:
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idct8_sse2(in);
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idct8_sse2(in);
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break;
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case ADST_DCT:
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idct8_sse2(in);
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iadst8_sse2(in);
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break;
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case DCT_ADST:
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iadst8_sse2(in);
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idct8_sse2(in);
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break;
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case ADST_ADST:
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iadst8_sse2(in);
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iadst8_sse2(in);
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break;
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#if CONFIG_EXT_TX
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case FLIPADST_DCT:
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idct8_sse2(in);
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iadst8_sse2(in);
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FLIPUD_PTR(dest, stride, 8);
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break;
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case DCT_FLIPADST:
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iadst8_sse2(in);
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idct8_sse2(in);
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fliplr_8x8(in);
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break;
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case FLIPADST_FLIPADST:
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iadst8_sse2(in);
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iadst8_sse2(in);
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FLIPUD_PTR(dest, stride, 8);
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fliplr_8x8(in);
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break;
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case ADST_FLIPADST:
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iadst8_sse2(in);
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iadst8_sse2(in);
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fliplr_8x8(in);
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break;
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case FLIPADST_ADST:
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iadst8_sse2(in);
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iadst8_sse2(in);
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FLIPUD_PTR(dest, stride, 8);
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break;
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#endif // CONFIG_EXT_TX
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default:
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assert(0);
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break;
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}
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// Final rounding and shift
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in[0] = _mm_adds_epi16(in[0], final_rounding);
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in[1] = _mm_adds_epi16(in[1], final_rounding);
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in[2] = _mm_adds_epi16(in[2], final_rounding);
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in[3] = _mm_adds_epi16(in[3], final_rounding);
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in[4] = _mm_adds_epi16(in[4], final_rounding);
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in[5] = _mm_adds_epi16(in[5], final_rounding);
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in[6] = _mm_adds_epi16(in[6], final_rounding);
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in[7] = _mm_adds_epi16(in[7], final_rounding);
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in[0] = _mm_srai_epi16(in[0], 5);
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in[1] = _mm_srai_epi16(in[1], 5);
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in[2] = _mm_srai_epi16(in[2], 5);
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in[3] = _mm_srai_epi16(in[3], 5);
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in[4] = _mm_srai_epi16(in[4], 5);
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in[5] = _mm_srai_epi16(in[5], 5);
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in[6] = _mm_srai_epi16(in[6], 5);
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in[7] = _mm_srai_epi16(in[7], 5);
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RECON_AND_STORE(dest + 0 * stride, in[0]);
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RECON_AND_STORE(dest + 1 * stride, in[1]);
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RECON_AND_STORE(dest + 2 * stride, in[2]);
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RECON_AND_STORE(dest + 3 * stride, in[3]);
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RECON_AND_STORE(dest + 4 * stride, in[4]);
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RECON_AND_STORE(dest + 5 * stride, in[5]);
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RECON_AND_STORE(dest + 6 * stride, in[6]);
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RECON_AND_STORE(dest + 7 * stride, in[7]);
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}
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void vp10_iht16x16_256_add_sse2(const tran_low_t *input, uint8_t *dest,
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int stride, int tx_type) {
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__m128i in[32];
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__m128i *in0 = &in[0];
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__m128i *in1 = &in[16];
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load_buffer_8x16(input, in0);
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input += 8;
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load_buffer_8x16(input, in1);
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switch (tx_type) {
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case DCT_DCT:
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idct16_sse2(in0, in1);
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idct16_sse2(in0, in1);
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break;
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case ADST_DCT:
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idct16_sse2(in0, in1);
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iadst16_sse2(in0, in1);
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break;
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case DCT_ADST:
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iadst16_sse2(in0, in1);
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idct16_sse2(in0, in1);
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break;
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case ADST_ADST:
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iadst16_sse2(in0, in1);
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iadst16_sse2(in0, in1);
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break;
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#if CONFIG_EXT_TX
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case FLIPADST_DCT:
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idct16_sse2(in0, in1);
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iadst16_sse2(in0, in1);
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FLIPUD_PTR(dest, stride, 16);
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break;
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case DCT_FLIPADST:
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iadst16_sse2(in0, in1);
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idct16_sse2(in0, in1);
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FLIPLR_16x16(in0, in1);
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break;
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case FLIPADST_FLIPADST:
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iadst16_sse2(in0, in1);
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iadst16_sse2(in0, in1);
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FLIPUD_PTR(dest, stride, 16);
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FLIPLR_16x16(in0, in1);
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break;
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case ADST_FLIPADST:
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iadst16_sse2(in0, in1);
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iadst16_sse2(in0, in1);
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FLIPLR_16x16(in0, in1);
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break;
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case FLIPADST_ADST:
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iadst16_sse2(in0, in1);
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iadst16_sse2(in0, in1);
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FLIPUD_PTR(dest, stride, 16);
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break;
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#endif // CONFIG_EXT_TX
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default:
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assert(0);
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break;
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}
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write_buffer_8x16(dest, in0, stride);
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dest += 8;
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write_buffer_8x16(dest, in1, stride);
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}
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