bdbecea1ba
nasm should infer .text but does not for windows: https://bugzilla.nasm.us/show_bug.cgi?id=3392451 Change-Id: Ib195465e5f33405f5ff61c4cf88aa2a72640cacb
362 lines
9.6 KiB
NASM
362 lines
9.6 KiB
NASM
;
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; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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%include "vpx_ports/x86_abi_support.asm"
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%macro PROCESS_16X2X8 1
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%if %1
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movdqa xmm0, XMMWORD PTR [rsi]
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movq xmm1, MMWORD PTR [rdi]
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movq xmm3, MMWORD PTR [rdi+8]
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movq xmm2, MMWORD PTR [rdi+16]
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punpcklqdq xmm1, xmm3
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punpcklqdq xmm3, xmm2
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movdqa xmm2, xmm1
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mpsadbw xmm1, xmm0, 0x0
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mpsadbw xmm2, xmm0, 0x5
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psrldq xmm0, 8
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movdqa xmm4, xmm3
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mpsadbw xmm3, xmm0, 0x0
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mpsadbw xmm4, xmm0, 0x5
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paddw xmm1, xmm2
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paddw xmm1, xmm3
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paddw xmm1, xmm4
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%else
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movdqa xmm0, XMMWORD PTR [rsi]
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movq xmm5, MMWORD PTR [rdi]
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movq xmm3, MMWORD PTR [rdi+8]
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movq xmm2, MMWORD PTR [rdi+16]
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punpcklqdq xmm5, xmm3
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punpcklqdq xmm3, xmm2
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movdqa xmm2, xmm5
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mpsadbw xmm5, xmm0, 0x0
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mpsadbw xmm2, xmm0, 0x5
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psrldq xmm0, 8
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movdqa xmm4, xmm3
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mpsadbw xmm3, xmm0, 0x0
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mpsadbw xmm4, xmm0, 0x5
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paddw xmm5, xmm2
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paddw xmm5, xmm3
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paddw xmm5, xmm4
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paddw xmm1, xmm5
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%endif
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movdqa xmm0, XMMWORD PTR [rsi + rax]
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movq xmm5, MMWORD PTR [rdi+ rdx]
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movq xmm3, MMWORD PTR [rdi+ rdx+8]
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movq xmm2, MMWORD PTR [rdi+ rdx+16]
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punpcklqdq xmm5, xmm3
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punpcklqdq xmm3, xmm2
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lea rsi, [rsi+rax*2]
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lea rdi, [rdi+rdx*2]
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movdqa xmm2, xmm5
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mpsadbw xmm5, xmm0, 0x0
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mpsadbw xmm2, xmm0, 0x5
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psrldq xmm0, 8
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movdqa xmm4, xmm3
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mpsadbw xmm3, xmm0, 0x0
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mpsadbw xmm4, xmm0, 0x5
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paddw xmm5, xmm2
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paddw xmm5, xmm3
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paddw xmm5, xmm4
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paddw xmm1, xmm5
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%endmacro
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%macro PROCESS_8X2X8 1
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%if %1
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movq xmm0, MMWORD PTR [rsi]
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movq xmm1, MMWORD PTR [rdi]
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movq xmm3, MMWORD PTR [rdi+8]
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punpcklqdq xmm1, xmm3
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movdqa xmm2, xmm1
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mpsadbw xmm1, xmm0, 0x0
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mpsadbw xmm2, xmm0, 0x5
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paddw xmm1, xmm2
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%else
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movq xmm0, MMWORD PTR [rsi]
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movq xmm5, MMWORD PTR [rdi]
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movq xmm3, MMWORD PTR [rdi+8]
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punpcklqdq xmm5, xmm3
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movdqa xmm2, xmm5
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mpsadbw xmm5, xmm0, 0x0
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mpsadbw xmm2, xmm0, 0x5
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paddw xmm5, xmm2
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paddw xmm1, xmm5
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%endif
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movq xmm0, MMWORD PTR [rsi + rax]
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movq xmm5, MMWORD PTR [rdi+ rdx]
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movq xmm3, MMWORD PTR [rdi+ rdx+8]
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punpcklqdq xmm5, xmm3
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lea rsi, [rsi+rax*2]
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lea rdi, [rdi+rdx*2]
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movdqa xmm2, xmm5
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mpsadbw xmm5, xmm0, 0x0
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mpsadbw xmm2, xmm0, 0x5
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paddw xmm5, xmm2
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paddw xmm1, xmm5
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%endmacro
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%macro PROCESS_4X2X8 1
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%if %1
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movd xmm0, [rsi]
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movq xmm1, MMWORD PTR [rdi]
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movq xmm3, MMWORD PTR [rdi+8]
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punpcklqdq xmm1, xmm3
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mpsadbw xmm1, xmm0, 0x0
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%else
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movd xmm0, [rsi]
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movq xmm5, MMWORD PTR [rdi]
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movq xmm3, MMWORD PTR [rdi+8]
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punpcklqdq xmm5, xmm3
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mpsadbw xmm5, xmm0, 0x0
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paddw xmm1, xmm5
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%endif
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movd xmm0, [rsi + rax]
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movq xmm5, MMWORD PTR [rdi+ rdx]
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movq xmm3, MMWORD PTR [rdi+ rdx+8]
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punpcklqdq xmm5, xmm3
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lea rsi, [rsi+rax*2]
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lea rdi, [rdi+rdx*2]
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mpsadbw xmm5, xmm0, 0x0
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paddw xmm1, xmm5
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%endmacro
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%macro WRITE_AS_INTS 0
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mov rdi, arg(4) ;Results
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pxor xmm0, xmm0
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movdqa xmm2, xmm1
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punpcklwd xmm1, xmm0
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punpckhwd xmm2, xmm0
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movdqa [rdi], xmm1
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movdqa [rdi + 16], xmm2
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%endmacro
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SECTION .text
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;void vpx_sad16x16x8_sse4_1(
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; const unsigned char *src_ptr,
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; int src_stride,
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; const unsigned char *ref_ptr,
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; int ref_stride,
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; unsigned short *sad_array);
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global sym(vpx_sad16x16x8_sse4_1) PRIVATE
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sym(vpx_sad16x16x8_sse4_1):
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 5
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push rsi
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push rdi
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; end prolog
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mov rsi, arg(0) ;src_ptr
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mov rdi, arg(2) ;ref_ptr
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movsxd rax, dword ptr arg(1) ;src_stride
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movsxd rdx, dword ptr arg(3) ;ref_stride
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PROCESS_16X2X8 1
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PROCESS_16X2X8 0
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PROCESS_16X2X8 0
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PROCESS_16X2X8 0
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PROCESS_16X2X8 0
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PROCESS_16X2X8 0
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PROCESS_16X2X8 0
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PROCESS_16X2X8 0
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WRITE_AS_INTS
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; begin epilog
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pop rdi
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pop rsi
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UNSHADOW_ARGS
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pop rbp
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ret
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;void vpx_sad16x8x8_sse4_1(
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; const unsigned char *src_ptr,
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; int src_stride,
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; const unsigned char *ref_ptr,
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; int ref_stride,
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; unsigned short *sad_array
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;);
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global sym(vpx_sad16x8x8_sse4_1) PRIVATE
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sym(vpx_sad16x8x8_sse4_1):
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 5
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push rsi
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push rdi
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; end prolog
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mov rsi, arg(0) ;src_ptr
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mov rdi, arg(2) ;ref_ptr
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movsxd rax, dword ptr arg(1) ;src_stride
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movsxd rdx, dword ptr arg(3) ;ref_stride
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PROCESS_16X2X8 1
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PROCESS_16X2X8 0
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PROCESS_16X2X8 0
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PROCESS_16X2X8 0
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WRITE_AS_INTS
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; begin epilog
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pop rdi
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pop rsi
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UNSHADOW_ARGS
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pop rbp
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ret
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;void vpx_sad8x8x8_sse4_1(
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; const unsigned char *src_ptr,
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; int src_stride,
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; const unsigned char *ref_ptr,
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; int ref_stride,
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; unsigned short *sad_array
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;);
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global sym(vpx_sad8x8x8_sse4_1) PRIVATE
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sym(vpx_sad8x8x8_sse4_1):
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 5
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push rsi
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push rdi
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; end prolog
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mov rsi, arg(0) ;src_ptr
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mov rdi, arg(2) ;ref_ptr
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movsxd rax, dword ptr arg(1) ;src_stride
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movsxd rdx, dword ptr arg(3) ;ref_stride
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PROCESS_8X2X8 1
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PROCESS_8X2X8 0
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PROCESS_8X2X8 0
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PROCESS_8X2X8 0
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WRITE_AS_INTS
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; begin epilog
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pop rdi
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pop rsi
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UNSHADOW_ARGS
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pop rbp
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ret
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;void vpx_sad8x16x8_sse4_1(
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; const unsigned char *src_ptr,
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; int src_stride,
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; const unsigned char *ref_ptr,
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; int ref_stride,
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; unsigned short *sad_array
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;);
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global sym(vpx_sad8x16x8_sse4_1) PRIVATE
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sym(vpx_sad8x16x8_sse4_1):
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 5
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push rsi
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push rdi
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; end prolog
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mov rsi, arg(0) ;src_ptr
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mov rdi, arg(2) ;ref_ptr
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movsxd rax, dword ptr arg(1) ;src_stride
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movsxd rdx, dword ptr arg(3) ;ref_stride
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PROCESS_8X2X8 1
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PROCESS_8X2X8 0
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PROCESS_8X2X8 0
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PROCESS_8X2X8 0
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PROCESS_8X2X8 0
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PROCESS_8X2X8 0
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PROCESS_8X2X8 0
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PROCESS_8X2X8 0
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WRITE_AS_INTS
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; begin epilog
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pop rdi
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pop rsi
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UNSHADOW_ARGS
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pop rbp
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ret
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;void vpx_sad4x4x8_sse4_1(
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; const unsigned char *src_ptr,
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; int src_stride,
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; const unsigned char *ref_ptr,
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; int ref_stride,
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; unsigned short *sad_array
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;);
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global sym(vpx_sad4x4x8_sse4_1) PRIVATE
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sym(vpx_sad4x4x8_sse4_1):
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push rbp
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mov rbp, rsp
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SHADOW_ARGS_TO_STACK 5
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push rsi
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push rdi
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; end prolog
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mov rsi, arg(0) ;src_ptr
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mov rdi, arg(2) ;ref_ptr
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movsxd rax, dword ptr arg(1) ;src_stride
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movsxd rdx, dword ptr arg(3) ;ref_stride
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PROCESS_4X2X8 1
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PROCESS_4X2X8 0
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WRITE_AS_INTS
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; begin epilog
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pop rdi
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pop rsi
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UNSHADOW_ARGS
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pop rbp
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ret
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