100 lines
4.0 KiB
C
100 lines
4.0 KiB
C
/*
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* Copyright (c) 2018 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#ifndef VPX_DSP_ARM_HIGHBD_IDCT_NEON_H_
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#define VPX_DSP_ARM_HIGHBD_IDCT_NEON_H_
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#include <arm_neon.h>
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#include "./vpx_dsp_rtcd.h"
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#include "vpx_dsp/arm/idct_neon.h"
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#include "vpx_dsp/inv_txfm.h"
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static INLINE void highbd_idct4x4_1_add_kernel1(uint16_t **dest,
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const int stride,
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const int16x8_t res,
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const int16x8_t max) {
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const uint16x4_t a0 = vld1_u16(*dest);
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const uint16x4_t a1 = vld1_u16(*dest + stride);
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const int16x8_t a = vreinterpretq_s16_u16(vcombine_u16(a0, a1));
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// Note: In some profile tests, res is quite close to +/-32767.
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// We use saturating addition.
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const int16x8_t b = vqaddq_s16(res, a);
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const int16x8_t c = vminq_s16(b, max);
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const uint16x8_t d = vqshluq_n_s16(c, 0);
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vst1_u16(*dest, vget_low_u16(d));
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*dest += stride;
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vst1_u16(*dest, vget_high_u16(d));
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*dest += stride;
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}
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static INLINE void idct4x4_16_kernel_bd10(const int32x4_t cospis,
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int32x4_t *const a) {
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int32x4_t b0, b1, b2, b3;
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transpose_s32_4x4(&a[0], &a[1], &a[2], &a[3]);
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b0 = vaddq_s32(a[0], a[2]);
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b1 = vsubq_s32(a[0], a[2]);
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b0 = vmulq_lane_s32(b0, vget_high_s32(cospis), 0);
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b1 = vmulq_lane_s32(b1, vget_high_s32(cospis), 0);
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b2 = vmulq_lane_s32(a[1], vget_high_s32(cospis), 1);
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b3 = vmulq_lane_s32(a[1], vget_low_s32(cospis), 1);
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b2 = vmlsq_lane_s32(b2, a[3], vget_low_s32(cospis), 1);
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b3 = vmlaq_lane_s32(b3, a[3], vget_high_s32(cospis), 1);
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b0 = vrshrq_n_s32(b0, DCT_CONST_BITS);
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b1 = vrshrq_n_s32(b1, DCT_CONST_BITS);
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b2 = vrshrq_n_s32(b2, DCT_CONST_BITS);
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b3 = vrshrq_n_s32(b3, DCT_CONST_BITS);
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a[0] = vaddq_s32(b0, b3);
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a[1] = vaddq_s32(b1, b2);
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a[2] = vsubq_s32(b1, b2);
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a[3] = vsubq_s32(b0, b3);
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}
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static INLINE void idct4x4_16_kernel_bd12(const int32x4_t cospis,
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int32x4_t *const a) {
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int32x4_t b0, b1, b2, b3;
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int64x2_t c[12];
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transpose_s32_4x4(&a[0], &a[1], &a[2], &a[3]);
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b0 = vaddq_s32(a[0], a[2]);
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b1 = vsubq_s32(a[0], a[2]);
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c[0] = vmull_lane_s32(vget_low_s32(b0), vget_high_s32(cospis), 0);
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c[1] = vmull_lane_s32(vget_high_s32(b0), vget_high_s32(cospis), 0);
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c[2] = vmull_lane_s32(vget_low_s32(b1), vget_high_s32(cospis), 0);
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c[3] = vmull_lane_s32(vget_high_s32(b1), vget_high_s32(cospis), 0);
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c[4] = vmull_lane_s32(vget_low_s32(a[1]), vget_high_s32(cospis), 1);
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c[5] = vmull_lane_s32(vget_high_s32(a[1]), vget_high_s32(cospis), 1);
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c[6] = vmull_lane_s32(vget_low_s32(a[1]), vget_low_s32(cospis), 1);
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c[7] = vmull_lane_s32(vget_high_s32(a[1]), vget_low_s32(cospis), 1);
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c[8] = vmull_lane_s32(vget_low_s32(a[3]), vget_low_s32(cospis), 1);
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c[9] = vmull_lane_s32(vget_high_s32(a[3]), vget_low_s32(cospis), 1);
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c[10] = vmull_lane_s32(vget_low_s32(a[3]), vget_high_s32(cospis), 1);
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c[11] = vmull_lane_s32(vget_high_s32(a[3]), vget_high_s32(cospis), 1);
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c[4] = vsubq_s64(c[4], c[8]);
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c[5] = vsubq_s64(c[5], c[9]);
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c[6] = vaddq_s64(c[6], c[10]);
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c[7] = vaddq_s64(c[7], c[11]);
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b0 = vcombine_s32(vrshrn_n_s64(c[0], DCT_CONST_BITS),
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vrshrn_n_s64(c[1], DCT_CONST_BITS));
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b1 = vcombine_s32(vrshrn_n_s64(c[2], DCT_CONST_BITS),
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vrshrn_n_s64(c[3], DCT_CONST_BITS));
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b2 = vcombine_s32(vrshrn_n_s64(c[4], DCT_CONST_BITS),
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vrshrn_n_s64(c[5], DCT_CONST_BITS));
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b3 = vcombine_s32(vrshrn_n_s64(c[6], DCT_CONST_BITS),
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vrshrn_n_s64(c[7], DCT_CONST_BITS));
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a[0] = vaddq_s32(b0, b3);
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a[1] = vaddq_s32(b1, b2);
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a[2] = vsubq_s32(b1, b2);
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a[3] = vsubq_s32(b0, b3);
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}
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#endif // VPX_DSP_ARM_HIGHBD_IDCT_NEON_H_
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