Commit Graph

8 Commits

Author SHA1 Message Date
James Zern
f51f67602e *.asm: normalize label format
add a trailing ':', though it's optional with the tools we support, it's
more common to use it to mark a label. this also quiets the
orphan-labels warning with nasm/yasm.

BUG=b/29583530

Change-Id: I46e95255e12026dd542d9838e2dd3fbddf7b56e2
2016-06-27 19:46:57 -07:00
James Zern
40dab58941 convolve_copy_sse2: replace SSE w/SSE2 code
this should be neutral or slightly faster on modern (P4+) architectures

Change-Id: Iec4c080275941eb8c9e05a66a2daf0405d86a69b
2015-11-09 23:45:16 -08:00
Alex Converse
0c00af126d Add vpx_highbd_convolve_{copy,avg}_sse2
single-threaded:
swanky (silvermont): ~1% faster overall
peppy (celeron,haswell): ~1.5% faster overall

Change-Id: Ib74f014374c63c9eaf2d38191cbd8e2edcc52073
2015-10-09 11:50:25 -07:00
Johann
41a0a0cb35 Use newer x86inc.asm
Rename updated version of x86inc.asm

Use "private_prefix" instead of "program_name" and make vpx the default
prefix.

Change-Id: I4883a99b2aee8e5dc9f2c16a2e6f4b5d6e4de458
2015-08-07 16:44:44 -07:00
James Zern
afd2f68dae Revert "VP9_COPY_CONVOLVE_SSE2 optimization"
This reverts commit a5e97d874b.

Additionally:
Revert "vpx_convolve_copy_sse2: fix win64"

This reverts commit 22a8474fe7.

This change performs poorly on various x86_64 devices affecting
performance by 1-3% at 1080P. Performance on chromebook like devices was
mixed neutral to slightly negative, so there should be minimal change
there.

Change-Id: I95831233b4b84ee96369baa192a2d4cc7639658c
2015-08-04 17:57:01 -07:00
James Zern
22a8474fe7 vpx_convolve_copy_sse2: fix win64
xmm6-7 need to be stored

Change-Id: I6c51559598d335946ec91be6246b49589c63b724
2015-08-01 11:45:49 -07:00
Scott LaVarnway
a5e97d874b VP9_COPY_CONVOLVE_SSE2 optimization
This function suffers from a couple problems in small core(tablets):
-The load of the next iteration is blocked by the store of previous iteration
-4k aliasing (between future store and older loads)
-current small core machine are in-order machine and because of it the store will spin the rehabQ until the load is finished
fixed by:
- prefetching 2 lines ahead
- unroll copy of 2 rows of block
- pre-load all xmm regiters before the loop, final stores after the loop
The function is optimized by:
copy_convolve_sse2 64x64 - 16%
copy_convolve_sse2 32x32 - 52%
copy_convolve_sse2 16x16 - 6%
copy_convolve_sse2 8x8 - 2.5%
copy_convolve_sse2 4x4 - 2.7%
credit goes to Tom Craver(tom.r.craver@intel.com) and Ilya Albrekht(ilya.albrekht@intel.com)

Change-Id: I63d3428799c50b2bf7b5677c8268bacb9fc29671
2015-07-31 14:51:51 -07:00
Zoe Liu
7186a2dd86 Code refactor on InterpKernel
It in essence refactors the code for both the interpolation
filtering and the convolution. This change includes the moving
of all the files as well as the changing of the code from vp9_
prefix to vpx_ prefix accordingly, for underneath architectures:
(1) x86;
(2) arm/neon; and
(3) mips/msa.
The work on mips/drsp2 will be done in a separate change list.

Change-Id: Ic3ce7fb7f81210db7628b373c73553db68793c46
2015-07-31 10:27:33 -07:00