Commit Graph

2710 Commits

Author SHA1 Message Date
Dmitry Kovalev
682c27239f Merge "Cleaning up vp9_update_nmv_count function." 2013-09-24 16:27:18 -07:00
Dmitry Kovalev
450cbfe53a Cleaning up vp9_update_nmv_count function.
Using best_mv[2] array instead of two separate variables.

Change-Id: Iefa0a41f5c42c42f2c66cef26750da68405f0f25
2013-09-24 15:55:49 -07:00
Dmitry Kovalev
d571e4e785 Replacing unsigned char* with uint8_t*.
Change-Id: I99a1880aee015ae16311ba05a31aa307df89bef2
2013-09-24 14:57:42 -07:00
Jingning Han
b1c58f57a7 Merge "Remove redundant mode update in sub8x8 decoding" 2013-09-24 12:35:58 -07:00
Dmitry Kovalev
30888742f4 Merge "Moving from int_mv to MV." 2013-09-24 12:25:56 -07:00
Yaowu Xu
71cfaaa689 Merge "Replace memcpy with vpx_memcpy" 2013-09-24 11:35:03 -07:00
Yaowu Xu
9be0bb19df Replace memcpy with vpx_memcpy
Also removed obselete comment

Change-Id: Iae1664777d76383639c637ee786e0d50fc45819a
2013-09-24 10:56:06 -07:00
Yaowu Xu
6037f17942 Rename defined constants
The change is to better reflect the nature of the constants.

Change-Id: Icabac6e9bceefbdb3f03f8218f88ef75943c30fb
2013-09-24 10:53:01 -07:00
Yaowu Xu
ff1ae7f713 Prevent using uninitialized value in RD decision
INT64_MAX may be assigned as RDCOST when RDCSOST computation is skipped
for speed, this commit to prevent INT64_MAX from being used as real
RDCOST in transform size decision.

Change-Id: I89a945134191bbdea1f1431ade70424ac079eaac
2013-09-24 10:53:01 -07:00
Yaowu Xu
fe533c9741 Merge "Change to prevent invalid memory access" 2013-09-24 10:37:17 -07:00
Dmitry Kovalev
f24b9b4f87 Merge "Adding best_mv[2] array instead of two variables." 2013-09-24 10:17:53 -07:00
Deb Mukherjee
f1a627e8a2 Merge "Small tweak in the constant quality parameter" 2013-09-24 09:51:08 -07:00
Jingning Han
9bcd750565 Merge "Enable per transformed block zero coeffs forcing" 2013-09-24 09:18:17 -07:00
Jingning Han
24ad692572 Merge "Calculate rd cost per transformed block" 2013-09-24 09:18:03 -07:00
Deb Mukherjee
b7a93578e5 Small tweak in the constant quality parameter
Improves results a little.

Change-Id: I7bcac02dbb65b43a993445cf557c520197114e5c
2013-09-24 09:09:35 -07:00
Yunqing Wang
bacb5925ff Merge "Number of instructions in fdct4_1d_sse2 reduced by two." 2013-09-24 08:40:56 -07:00
Yaowu Xu
92a29c157f Change to prevent invalid memory access
After change of MI context storage , mi_8x8[]  pointer may be null for
a block outside of image border. The commit changes to access the data
only after validation of mi_row and mi_col.

Change-Id: I039c4eb486a228ea9d8e5f35ab9ae6717d718bf3
2013-09-24 08:36:59 -07:00
A.Mahfoodh
13c7715a75 Number of instructions in fdct4_1d_sse2 reduced by two.
Mathematically the results are the same.

Change-Id: I1c5126cd3ca64e8515ca6331e0989c6f7dd651a0
2013-09-23 17:23:27 -07:00
Jingning Han
e85eaf6acd Remove redundant mode update in sub8x8 decoding
The probability model used to code prediction mode is conditioned
on the immediate above and left 8x8 blocks' prediction modes. When
the above/left block is coded in sub8x8 mode, we use the prediction
mode of the bottom-right sub8x8 block as the reference to generate
the context.

This commit moves the update of mbmi.mode out of the sub8x8 decoding
loop, hence removing redundant update steps and keeping the bottom-
right block's mode for the decoding process of next blocks.

Change-Id: I1e8d749684d201c1a1151697621efa5d569218b6
2013-09-23 17:21:40 -07:00
Yaowu Xu
838eae3961 Correct 3 step search site initialziation
39c7b01d accidently reverted the row/col initialization, which broke
mv clamps, which is dependent on the sites for valid motion vector
range. This commit fixed the issue.

Change-Id: Ibcce0226e0360b1ef483fe760b2e33f1af4bf494
2013-09-23 16:11:49 -07:00
Jingning Han
a517343ca3 Enable per transformed block zero coeffs forcing
This commit enables forcing all coefficients zero per transformed
block, when its rate-distortion cost is lower than regular coeff
quantization.

The overall performance improvement (including its parent patch on
calculating rd cost per transformed block) at speed 1:
derf:  0.298%
yt:    0.452%
hd:    0.741%
stdhd: 0.006%

Change-Id: I66005fe0fd7af192c3eba32e02fd6d77952accb5
2013-09-23 10:39:35 -07:00
Jingning Han
54c87058bf Merge "Remove redundant mv_pred use for sub8x8 blocks" 2013-09-23 08:47:21 -07:00
Deb Mukherjee
d11221f433 Improves constant qual, constrained qual turned on
Adds modeled functions to decide the qp for altref frames in constant q
mode similar to other functions in use in bitrate mode.

Also turns on the constrained quality mode (end-usage=2) option which
was turned off before. Basic testing shows the mode works in principle,
to cap bitrate to the target-bitrate specified, while allowing lower
bitrate depending on the cq-level specified. The mode will need to be
improved over time.

Results for constant quality vs bitrate control mode:
derfraw300/fullderfraw: +3.0% at constant quality over bitrate control.
fullstdhdraw: +4.341%
stdhdraw250: +5.361%

Change-Id: If5027c9ec66c8e88d33e47062c6cb84a07b1cda9
2013-09-22 23:04:50 -07:00
Dmitry Kovalev
14330abdc6 Merge "Cleanup in vp9_init3smotion_compensation." 2013-09-21 02:57:47 -07:00
Johann
a6a00fc6a3 Use lowercase instruction in assembly
The iOS compiler does not recognize BLE:
bad instruction `BLE idct32_transpose_pair_loop'

Change-Id: I7426694c66bc31caf939a2d5000968da1222c15b
2013-09-20 16:11:05 -07:00
Jingning Han
78fbb10642 Calculate rd cost per transformed block
This commit makes the rate-distortion optimization loop evaluate
the rd costs of regular quantization and all zero coeffs, per
transformed block. It improves speed 1 compression performance:

derf: 0.245%
yt:   0.515%

For a large partition that consists multiple transformed blocks,
this allows more flexibility to selectively force a portion of
them coded as all zero coeffs, as well be continued in the next
patches.

Change-Id: I211518be4179747b57375696f017d1160cc91851
2013-09-20 12:40:17 -07:00
Dmitry Kovalev
bb5e2bf86a Adding best_mv[2] array instead of two variables.
Change-Id: I584fe50f73879f6a72fada45714ef80893b6d549
2013-09-20 17:08:53 +04:00
Dmitry Kovalev
e51e7a0e8d Moving from int_mv to MV.
Converting vp9_mv_bit_cost, mv_err_cost, and mvsad_err_cost
functions for now.

Change-Id: I60e3cc20daef773c2adf9a18e30bc85b1c2eb211
2013-09-20 13:52:43 +04:00
Dmitry Kovalev
39c7b01d3c Cleanup in vp9_init3smotion_compensation.
Change-Id: Ie47f53e76bc9530475c8c6d24e9b7a5a0189de56
2013-09-20 12:54:14 +04:00
Dmitry Kovalev
24df77e951 Merge "Adding get_scan_and_band function." 2013-09-20 00:15:06 -07:00
Jingning Han
44b708b4c4 Remove redundant mv_pred use for sub8x8 blocks
The sub8x8 blocks has its own motion vector reference scheme. The
mv_pred is only used blocks of sizes 8x8 and above, to find the
starting point for motion search.

This change does not change any coding behavior. It makes the
encoding process slightly faster. (0.5% speed-up for local test on
speed 1.)

Change-Id: I746ee6ef0eac19aa3621be014afa12be8d82cbb9
2013-09-19 10:32:44 -07:00
Yaowu Xu
79af591368 change to avoid invalid memory read.
The fake token EOSB may cause invaild memory read in pack token, this
commit reworked the loop to avoid such invalid read.

Change-Id: I37fdfce869b44a7f90003f82a02f84c45472a457
2013-09-19 08:22:10 -07:00
Yaowu Xu
014acfa2af fix integer overflow errors
Change-Id: I76f440a917832c02d7a727697b225bac66b99f56
2013-09-19 08:14:26 -07:00
Dmitry Kovalev
a23c2a9e7b Adding get_scan_and_band function.
Extracting get_scan_and_band function from get_entropy_context to
remove duplicated code.

Change-Id: I5da1f5a60263017e887da68bc834317b5f084cb2
2013-09-19 16:53:48 +04:00
Dmitry Kovalev
1600707d35 Merge "Removing redundant code from vp9_mcomp.c." 2013-09-19 00:30:18 -07:00
Dmitry Kovalev
cda802ac86 Merge "Removing redundant coef calculation + cleanup." 2013-09-19 00:28:31 -07:00
Dmitry Kovalev
0fcb0e17bc Merge "Fixing typo in the encoder." 2013-09-19 00:26:52 -07:00
Yunqing Wang
a7b7f94ae8 Merge "Fix x86inc.asm to build PIC code correctly" 2013-09-18 14:51:31 -07:00
Yunqing Wang
9d901217c6 Fix x86inc.asm to build PIC code correctly
Current x86inc.asm didn't handle 32bit PIC build properly.
TEXTRELs were seen in the library built. The PIC macros from
libvpx's x86_abi_support.asm was used to fix this problem.
The assembly code was modified to use the macros.

Notes: We need this fix in for decoder building. Functions in
encoder will be fixed later.

Change-Id: Ifa548d37b1d0bc7d0528db75009cc18cd5eb1838
2013-09-18 13:45:46 -07:00
Dmitry Kovalev
98cf0145b1 Removing redundant coef calculation + cleanup.
Adding temp variable for &x->plane[0], inlining src_diff values.

Change-Id: I24c08a5425a6da6fd66f5b0278f2fce74f9989b2
2013-09-18 16:20:10 +04:00
Dmitry Kovalev
72fd127f8c Removing redundant code from vp9_mcomp.c.
Replacing ((1 << MV_MAX_BITS) - 1) with MV_MAX, adding const
qualifiers, reusing computed values.

Change-Id: I7b46d47f6c644b079d9c3478116a9de465a9baec
2013-09-18 13:11:38 +04:00
Dmitry Kovalev
245ca04bab Fixing typo in the encoder.
Change-Id: I168efdc366eecf638694f357ccad2f4eba7e2fdb
2013-09-18 12:02:22 +04:00
Yaowu Xu
85fd8bdb01 Merge "Silence a bunch of MSVC warnings" 2013-09-17 17:10:58 -07:00
Jingning Han
c437bbcde0 Clean up second ref check in sub8x8 rd loop
This commit cleans up the second reference check in the
rate-distortion optimization loop of sub8x8 blocks.

Change-Id: Ife68feaa4cddbfad2878c9b44d3012788d634f97
2013-09-17 15:59:49 -07:00
Yaowu Xu
a783da80e7 Silence a bunch of MSVC warnings
Change-Id: I16633269582a640809dca27572bbe99efa6369fc
2013-09-17 12:08:51 -07:00
Jingning Han
2b3bfaa9ce Remove redundant argument in get_sub_block_mv
The sub8x8 check can be directly inferred from block_idx, hence
removed from the arguments if get_sub_block_mv.

Change-Id: Ib766d57e81248fb92df0f6d9b163e6c77b933ccd
2013-09-17 12:08:45 -07:00
Paul Wilkins
84758960db Merge "Minor clean up." 2013-09-17 03:39:24 -07:00
Paul Wilkins
90a52694f3 Merge "Adjustment to mode_skip_start." 2013-09-17 03:39:15 -07:00
hkuang
cbf394574d Merge "Speed up iht8x8 by rearranging instructions. Speed improves from 282% to 302% faster based on assembly-perf." 2013-09-16 14:39:45 -07:00
hkuang
23e1a29fc7 Speed up iht8x8 by rearranging instructions.
Speed improves from 282% to 302% faster based on assembly-perf.

Change-Id: I08c5c1a542d43361611198f750b725e4303d19e2
2013-09-16 14:23:26 -07:00