For 3 temporal layers, reduce somewhat the
cyclic_refresh_mode_max_mbs_perframe parameter, from 20% to ~14%.
Small increase in PSNR/SSIM metrics.
Change-Id: Ia216fa5474048f1ef7fe3db88cd60dfef2a1bf8a
Change settings for 1 pass CBR.
And only use SET_SVC control(s) if there is at least 1 layer (spatial or temporal).
This allows sample encoder to also work for 1 layer case.
Change-Id: I5b0a33c25afb2f24a3a8aa4ec8ade9afc87cd702
This commit allows the encoder to include sub8x8 inter mode with
scaled reference frame in the rate-distortion optimization scheme.
Change-Id: Ibbe9678801592826ef22566566dcdeeb008350d5
Sync the encoder's buffer offset calculation for sub8x8 block motion
compensated prediction with scaled reference frame to match the
decoder's behavior. This resolves an enc/dec mismatch issue when
sub8x8 inter mode with scaled is turned on.
Change-Id: I4bab3672b007a5ae0c992f8a701341892d2458b0
This is based on the original patch optimized for 32bit
platforms by Tamar/Ilya and now uses the x86inc style asm.
The assembly was also modified to support 64bit platforms.
Change-Id: Ice12f249bbbc162a7427e3d23fbf0cbe4135aff2
These frame types cannot make bitstream parsing depend on previous
frames, so the hypothetical combinations of e.g. keyframe=1 and
update_map=0 or keyframe=1 and temporal_update=1 are non-sensical.
Therefore, make it impossible to code such combinations in the vp10
bitstream header.
See issue 1044.
Change-Id: I3f0a83d5c7e3989541a469a909471424a285239d
If the encoder dynamic resize is triggered and change config()
is then called, it will reset the current (resized) codec width/height
back to the the config (unresized) width/height (which will then
prevent the resizing action from occurring in encoder_loop).
Avoid this by checking for a change in the config width/height
before resetting the cm->width/height.
Change-Id: Id9d50c0ee8a943abe4b6c72bbaa02d9696f93177
In VP9, the order for frame header was: [0] smooth, [1] regular, [2]
sharp, [3] bilinear. Per-block, the order was [0] regular, [1] smooth
and [2] sharp. For VP10, swap smooth/regular in the frame header so
that the block ordering and frame header ordering are interchangeable.
See issue #1046.
Change-Id: Ic9ec5964874375e40cd59bef50b489a76cbe4365
Unify the style of fdct4() fdct8() fdct16()
Add fdct32()
Add range_check() at each stage
Add unit test at ../../test/vp10_dct_test.cc
Change-Id: I9e912b2c5683862e65c5a21abc3e1c260cca4576
* changes:
test: limit the valid image size on OS/2
configure: add -Zhigh-mem to LDFLAGS on OS/2
configure: disable PIC on OS/2
Makefile: add $(STACKREALIGN) to CFLAGS for vp9_reconintra.c
x86inc.asm: fix NASM compilation
* changes:
Only build multithreaded functions on mt builds.
Don't build calc_psnr for high bit depth.
Enable missing dual lpf test
Remove unused VP10 functions.
Mark VP10 functions as 'INLINE'
Remove unused functions from test files
Only build append_negative_gtest_filter when it is used.
Add INLINE decoration to static test functions
* changes:
vp9_mcomp: make search functions private
vp9_mbgraph: use vp9_full_pixel_search(HEX)
vp9_temporal_filter: use vp9_full_pixel_search(HEX)
vp9_firstpass: make vp9_init_subsampling private
vp9_encoder: make vp9_alloc_compressor_data private
