Commit Graph

258 Commits

Author SHA1 Message Date
Jingning Han
c4cb8059ff Merge "Fix high bit-depth loop-filter sse2 compiling issue - part 4" 2015-02-27 09:49:10 -08:00
Jingning Han
43bb97f7d0 Merge "Fix high bit-depth loop-filter sse2 compiling issue - part 3" 2015-02-27 09:49:00 -08:00
Jingning Han
4800b0e80d Merge "Fix high bit-depth loop-filter sse2 compiling issue - part 2" 2015-02-27 09:48:51 -08:00
Jingning Han
8ec22296b3 Fix high bit-depth loop-filter sse2 compiling issue - part 3
Change-Id: Idb14b9a285f8098126f967c5e2750221d6a58f69
2015-02-26 15:21:22 -08:00
Jingning Han
14ff1cb74a Fix high bit-depth loop-filter sse2 compiling issue - part 2
Change-Id: I6728b69bb3dff1daa64ff7142f691e80a089f1c4
2015-02-26 12:41:19 -08:00
Jingning Han
2080e4b206 Fix high bit-depth loop-filter sse2 compiling issue - part 1
The intrinsic statement _mm_subs_epi16() should take immediate.
Feeding variable as its input argument will cause compile failure
in older version gcc.

Change-Id: I6a71efcc8d3b16b84715e0a9bcfa818494eea3f4
2015-02-25 09:59:50 -08:00
Jingning Han
5b87f1bb5a Fix high bit-depth loop-filter sse2 compiling issue - part 4
Change-Id: I39f56f60425836f2e1ec07da71edd4810a4c78bb
2015-02-24 14:50:30 -08:00
James Zern
923cc0bf51 vp9_highbd_tm_predictor_16x16: fix win64
by saving xmm8; cglobal's xmm reg arg is 0-based

Change-Id: Ic8426ec9ac59ab4478716aa812452a6406794dcb
2015-02-10 19:34:12 -08:00
JackyChen
09673deba9 SSE2 code for the filter in MFQE.
The SSE2 code is from VP8 MFQE, reuse it in VP9. No change on VP8
side. In our testing, we achieve 2X speed by adopting this change.

Change-Id: Ib2b14144ae57c892005c1c4b84e3379d02e56716
2015-01-18 16:07:59 -08:00
James Zern
89ee8923a8 Merge "Remove redundant loads on 1d16_v8 filter." 2014-12-12 14:32:52 -08:00
James Zern
f82d7fd854 Merge "Remove redundant loads on 1d8_v8 filter." 2014-12-12 14:32:26 -08:00
Frank Galligan
6a24dbd71f Remove redundant loads on 1d16_v8 filter.
This CL showed about a 3% gain in performance on some systems.

Change-Id: Id27e7e0b8e69068aa364e67859436da852669250
2014-12-12 11:48:47 -08:00
Frank Galligan
44ee777905 Remove redundant loads on 1d8_v8 filter.
This CL showed a modest gain in performance on some systems.

Change-Id: Iad636a89a1a9804ab7a0dea302bf2c6a4d1653a4
2014-12-12 11:34:24 -08:00
James Zern
d456ccbc9d vp9_loopfilter_mmx: remove some unused tables
Change-Id: I964d25cc91c8e4864d73b142d9c7a1b39cb6cfbb
2014-12-12 11:16:24 -08:00
Peter de Rivaz
5c22224e9e Corrected optimization of 8x8 DCT code
The 8x8 DCT uses a fast version whenever possible.
There was a mistake in the checking code which
meant sometimes the fast version was used when it
was not safe to do so.

Change-Id: I154c84c9e2d836764768a11082947ca30f4b5ab7
(cherry picked from commit fd05fb0c21)
2014-12-11 09:42:57 -08:00
Yunqing Wang
cddbdeabd0 Merge "SSSE3 Optimization for Atom processors using new instruction selection and ordering" 2014-12-08 13:34:54 -08:00
James Zern
c38d0490b3 Merge "Changes to assembler for NASM on mac." 2014-12-08 12:55:06 -08:00
levytamar82
8f9d94ec17 SSSE3 Optimization for Atom processors using new instruction selection and ordering
The function vp9_filter_block1d16_h8_ssse3 uses the PSHUFB instruction which has a 3 cycle latency and slows execution when done in blocks of 5 or more on Atom processors.
By replacing the PSHUFB instructions with other more efficient single cycle instructions (PUNPCKLBW + PUNPCHBW + PALIGNR) performance can be improved.
In the original code, the PSHUBF uses every byte and is consecutively copied.
This is done more efficiently by PUNPCKLBW and PUNPCHBW, using PALIGNR to concatenate the intermediate result and then shift right the next consecutive 16 bytes for the final result.

For example:
filter = 0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,8
Reg = 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
REG1 = PUNPCKLBW Reg, Reg = 0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7
REG2 = PUNPCHBW Reg, Reg = 8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15
PALIGNR REG2, REG1, 1 = 0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,8

This optimization improved the function performance by 23% and produced a 3% user level gain on 1080p content on Atom processors.
There was no observed performance impact on Core processors (expected).

Change-Id: I3cec701158993d95ed23ff04516942b5a4a461c0
2014-12-08 13:11:01 -07:00
Peter de Rivaz
7e40a55ef9 Added high bitdepth sse2 transform functions
Also removes some spurious changes in common/vp9_blockd.h which
was introduced by a rebase issue between nextgen and master branches.

Change-Id: If359f0e9a71bca9c2ba685a87a355873536bb282
(cherry picked from commit 005d80cd05)
(cherry picked from commit 08d2f54800)
(cherry picked from commit 4230c2306c)
2014-12-02 11:16:24 -08:00
John Stark
71379b87df Changes to assembler for NASM on mac.
fixes non-Apple nasm part of issue #755

Change-Id: I11955d270c4ee55e3c00e99f568de01b95e7ea9a
2014-11-24 12:00:50 -08:00
Yaowu Xu
2c4fee17bc Fix visual studio 2013 compiler warnings
For configured with --enable-vp9-highbitdepth

Change-Id: I2b181519d7192f8d7a241ad5760c3578255f24e6
2014-11-05 13:47:28 -08:00
levytamar82
86175a5788 WORKAROUND FIX FOR GCC4.9.1
In the function mb_lpf_horizontal_edge_w_avx2_16 the usage of the intrinsic
_mm256_cvtepu8_epi16 cause a compiler bug in gcc 4.9.1.
until it will be fixed I created a workaround that create the up convert by
using broadcast128+shuffle.
The bug was reported here:
https://code.google.com/p/webm/issues/detail?id=867

Change-Id: I73452e6806f42e0fadcde96b804ea3afa7eeb351
2014-11-01 11:27:28 -07:00
Deb Mukherjee
1929c9b391 Rename highbitdepth functions to use highbd prefix
Uses highbd_ prefix convention consistently.

Change-Id: I58f7f799a7ff8e32701bcd71c955bcf1cdd4581e
2014-10-09 14:40:40 -07:00
Deb Mukherjee
e2a90c0b21 Merge "High bit-depth loop/arf/postproc filter functions" 2014-09-23 17:26:32 -07:00
Deb Mukherjee
931ed516ba High bit-depth loop/arf/postproc filter functions
Adds high-bitdepth loopfilter, temporal filter and postproc functions

Change-Id: I81c8a9176890784686bc4f2af0d550d243b3b2d3
2014-09-23 16:20:43 -07:00
Frank Galligan
49dc7b05d0 Merge "FIX: vp9_loopfilter_intrin_sse2.c" 2014-09-18 15:10:16 -07:00
Scott LaVarnway
13284311eb FIX: vp9_loopfilter_intrin_sse2.c
Fixes Visual Studio build failures

Change-Id: I233719cd63b3ad0db16e2834bf1d7ea1df805880
2014-09-18 13:09:13 -07:00
Deb Mukherjee
6d0ee9860e Merge "Adds high bitdepth convolve, interpred & scaling" 2014-09-18 10:52:23 -07:00
Deb Mukherjee
0d3c3d3ce7 Adds high bitdepth convolve, interpred & scaling
Change-Id: Ie51c352a6b250547207cbc1ebba833a01ed053e3
2014-09-18 07:26:17 -07:00
Frank Galligan
4e066299d9 Merge "Improved mb_lpf_horizontal_edge_w_sse2_16() #2" 2014-09-17 18:52:30 -07:00
Scott LaVarnway
217e3cb1fb Improved mb_lpf_horizontal_edge_w_sse2_16() #2
The decoder performance improved up to 1% for the
test clips used.

Change-Id: I4621112bdccfba01640322facfa4ba8da8290ea5
2014-09-17 17:25:20 -07:00
Deb Mukherjee
81a8138fc3 Adding high-bitdepth intra prediction functions
Change-Id: I6f5cb101e2dc57c3d3f4d7e0ffb4ddbed027d111
2014-09-16 15:04:39 -07:00
Johann
8645a53039 Allow specifying opt dependencies
If optimizations use more than one cpu feature, allow
specifying them so that '--disable-X' still works

https://code.google.com/p/webm/issues/detail?id=854

Change-Id: I3108ea37b397371a2be84dd5f2380b304db23f18
2014-09-11 13:43:48 -07:00
Dmitry Kovalev
8e205a2a09 Merge "Cleaning up and speeding up vp9_idct32x32_1024_add_sse2()." 2014-09-09 12:50:23 -07:00
Dmitry Kovalev
70092af5c0 Cleaning up and speeding up vp9_idct32x32_1024_add_sse2().
Change-Id: If91017b792572c9db6e257011ca307bef8428486
2014-09-05 18:12:30 -07:00
Dmitry Kovalev
1100e262c5 Removing postproc mmx code.
Removed functions:
* vp9_post_proc_down_and_across_mmx
* vp9_mbpost_proc_down_mmx
* vp9_plane_add_noise_mmx

They all have sse2 equivalent.

Change-Id: I59c1fac12b7c96ca4538d455e4400c2b7875feff
2014-09-05 11:52:50 -07:00
Yaowu Xu
23c88870ec Merge "Fix bug 804" 2014-08-21 08:56:32 -07:00
levytamar82
839911fb6d Fix bug 804
A bug in Microsoft compiler was found in the function
vp9_filter_block1d16_v8_avx2 and a workaround applied.
the bug occur when there was 4 consecutive maddubs + min + adds
intrinsic instructions.

Change-Id: I83499faeb70971e650e5663fd2490360ddb1a51b
2014-08-07 15:09:24 -07:00
Johann
7516abc7dc Remove vp9_postproc_x86.h
This configuration has moved to vp9_rtcd_defs.pl

Change-Id: I71a31dbb8d79df226b60dd834324a5af69956c51
2014-08-05 15:46:13 -07:00
Johann
79afb5eb41 Use lrand48 on Android
When building x86 assembly use lrand48 instead of the
undocumented inlined _rand function.

Android now supports rand()
https://android-review.googlesource.com/97731
but only for new versions. Original workaround:
https://gerrit.chromium.org/gerrit/15744

Change-Id: I130566837d5bfc9e54187ebe9807350d1a7dab2a
2014-06-12 19:57:25 -07:00
Jingning Han
0c4a4225ec Merge "Enable SSSE3 inverse 2D-DCT with 10 non-zero coeffs" 2014-06-03 16:51:39 -07:00
Jingning Han
2c1cdf69b6 Fix a potential overflow issue in inverse 16x16 full 2D-DCT
An overflow issue could potentially happen in the second round 1-D
transform of the SSSE3 full inverse 16x16 2D-DCT. This commit fixes
this issue.

Change-Id: Ia19e4888fda1cc929a28a5f89a5beec612d628dc
2014-05-29 11:46:32 -07:00
Jingning Han
6d21cbd20b Enable SSSE3 inverse 2D-DCT with 10 non-zero coeffs
This commit enables SSSE3 implementation of the inverse 2D-DCT
with only first 10 coefficients non-zero. It reduces the runtime
of SSE2 version from 745 cycles to 538 cycles, i.e., 27% speed-up.

Change-Id: I18ba4128859b09c704a6ee361d69a86c09fe8dfe
2014-05-28 10:53:33 -07:00
Jingning Han
239e68ddbf Fix compiling error in MSVS
Need to include math.h before tmmintrin.h in some versions of MSVS.

Change-Id: Ia6b83ae599316887ecf30c4e4b9e4355fb8a4219
2014-05-27 15:58:47 -07:00
Yunqing Wang
a591ac9e5a Merge "Fix decoder mismatch in sub-pixel AVX2 intrinsic filters" 2014-05-27 10:52:16 -07:00
levytamar82
773596050f Fix decoder mismatch in sub-pixel AVX2 intrinsic filters
The subpixel SSSE3 was fixed in this patch:
https://gerrit.chromium.org/gerrit/#/c/70283/
So the equivalent AVX2 is fixed accordingly.

Change-Id: Ieebbc1949c99d34b12b8b47692df71aca5001f3a
2014-05-23 16:48:40 -07:00
Jingning Han
59c3f446fe Merge "Inverse 16x16 2D-DCT SSSE3 implementation" 2014-05-23 16:01:22 -07:00
Jingning Han
48b0891370 Inverse 16x16 2D-DCT SSSE3 implementation
This commit enables the SSSE3 implementation of full inverse 16x16
2D-DCT. The unit runtime goes down from 1642 cycles to 1519 cycles,
about 7% speed-up.

Change-Id: I14d2fdf9da1fb4ed1e5db7ce24f77a1bfc8ea90d
2014-05-23 15:09:35 -07:00
Yunqing Wang
c5443fc881 Fix decoder mismatch in sub-pixel SSSE3 intrinsic filters
In 8-tap filtering, to guarantee the intermediate results fit in
16 bits, the order of accumulating the products needs to be done
correctly, and the largest product should be added last. This
patch fixed the problem using the method in commit "Correct ssse3
8/16-pixel wide sub-pixel filter calculation".

Change-Id: I79d0ad60c057b15011ece84cda9648eee0809423
2014-05-23 11:52:20 -07:00
Yaowu Xu
9410330893 Merge "change to use assembly version of ssse3 filter code" 2014-05-23 08:02:28 -07:00