Commit Graph

2804 Commits

Author SHA1 Message Date
James Zern
02fda6582c Merge changes Ie15e301e,Ib070c79b
* changes:
  vp9_reconintra_neon: cosmetics: reindent
  vp9_reconintra_neon: cosmetics: drop unneeded returns
2015-05-23 17:47:52 +00:00
James Zern
4e11f3ca6e vp9_reconintra_neon: cosmetics: reindent
Change-Id: Ie15e301e8f55cf928f42a03e53a8bb8b66d0e5d5
2015-05-22 21:04:30 -07:00
James Zern
ff683ab1da vp9_reconintra_neon: cosmetics: drop unneeded returns
Change-Id: Ib070c79bdbb9c1f4e25af693d7056ec9f964c789
2015-05-22 20:59:36 -07:00
James Zern
8c15ced172 vp9: move ssse3 convolve fns to intrinsics file
+ synchronize filter function signatures

this makes any intrinsics filters available for inlining and has the
side-effect of making those filters static, quieting missing-prototype
warnings.

Change-Id: I1908875caffa585bd4fc65aaf10d17a5e20cfb46
2015-05-22 20:14:16 -07:00
James Zern
2161e44025 vp9: move avx2 convolve fns to intrinsics file
+ synchronize filter function signatures

this makes any intrinsics filters available for inlining and has the
side-effect of making those filters static, quieting missing-prototype
warnings.

Change-Id: I1cd55c9d52547793ad65aa90c7620f0e426edaa2
2015-05-22 20:13:06 -07:00
James Zern
ef2b3cce50 add vp9/common/x86/convolve.h
collect the vp9_convolve function definition macros there; this will
allow some relocation of functions from vp9_asm_stubs.c

Change-Id: Idadd117fa256dd48748379856973fd985b8204e8
2015-05-22 20:12:16 -07:00
James Zern
48d8291df4 vp9_subpixel_8t_intrin_ssse3: quiet vs9 warning
reorder includes to avoid:
warning C4985: 'ceil': attributes not present on previous declaration.

this is the same workaround used in vp9/common/vp9_systemdependent.h

Change-Id: Ia10dd63de24f96fa1507a6179220e9d6ec774db6
2015-05-22 12:05:02 -07:00
James Zern
a492bcef87 vp9_mvref_common.c: fix compile warning
string literal to int within an assert

Change-Id: Ifd7acc717e01ee1bb3955ef830ec0d1645942459
2015-05-20 16:45:16 -07:00
James Zern
97db651ce0 vp9: add some missing includes
mostly: <file>.c should include <file>.h
silences missing prototype warnings

Change-Id: Ic05ec32c6f7b2224b78825904d96d73aacad6000
2015-05-15 10:43:47 -07:00
James Zern
330fba41e2 vp9 intrinsics: add vp9_rtcd include
silences a missing declaration warning

Change-Id: I59a34e1a1377cf3529b678d7ec0122bd43ab1bf1
2015-05-15 10:43:47 -07:00
James Zern
18b60af27c vp9: correct some function signatures
silences missing prototype warnings

Change-Id: Idaf68d83d2cb03847f3ee002c4d00c2ac79da604
2015-05-15 10:43:47 -07:00
Frank Galligan
d610ead258 Merge "Move mc_buf to cut down size of MACROBLOCKD." 2015-05-15 15:20:39 +00:00
Frank Galligan
0a80164c94 Move mc_buf to cut down size of MACROBLOCKD.
Change-Id: Icea64b9e5632b41aaa7cd7018c501d6add9b7a7f
2015-05-14 19:10:02 -07:00
Johann
cafae5b544 Merge "Relocate memory operations for common code" 2015-05-13 19:47:24 +00:00
Johann
1d7ccd5325 Relocate memory operations for common code
With the sad functions, and hopefully the variance functions soon,
moving to the vpx_dsp location, place the defines used in the
reference C code in a common location.

Change-Id: I4c8ce7778eb38a0a3ee674d2f1c488eda01cfeca
2015-05-13 11:41:15 -07:00
Parag Salasakar
686616a989 Merge "mips msa vp9 idct 8x8 optimization" 2015-05-13 04:36:34 +00:00
James Zern
a5e4ca8390 build_intra_predictors*: reduce above_data size
currently this needs to be 2x (NEED_ABOVERIGHT) the size of the largest
block (32) + 1 (for above_left). reduce the buffer size from 128 + 16
(alignment) to 64 + 16.

Change-Id: Idaca1806c7e1214e9437de24e15edc2ebf18f95d
2015-05-08 20:17:20 -07:00
James Zern
6d22713722 Merge "build_intra_predictors*: reduce left_col size" 2015-05-09 00:53:55 +00:00
hkuang
d53fb0fda5 Fix clang ioc warning due to NULL mi pointer.
The warning only happens in VP9 encoder's first pass due to src_mi
is not set up yet. But it will not fail the encoder as left_mi and
above_mi are not used in the first_pass and they will be set up again
in the second pass.

Change-Id: I0713b4660d71e229e196654cb0970ba6b1574f28
2015-05-08 15:42:50 -07:00
hkuang
f5574fb44c Merge "Add more sse2 code for intra prediction." 2015-05-08 17:26:30 +00:00
Parag Salasakar
7c5f00f868 mips msa vp9 idct 8x8 optimization
average improvement ~4x-6x

Change-Id: I5edf713721b9e24c7e0ce2e69d8fc3ecab625d91
2015-05-08 12:23:27 +05:30
Parag Salasakar
a8a9c2bb45 Merge "mips msa vp9 idct 32x32 optimization" 2015-05-08 04:27:44 +00:00
James Zern
7e55ff1593 build_intra_predictors*: reduce left_col size
this should only need to be the size of the largest block, i.e., 32, not
64.

Change-Id: Ib8cb2424771fdd2a64c55379597248b2722a5ceb
2015-05-07 16:16:42 -07:00
James Zern
fd3658b0e4 replace DECLARE_ALIGNED_ARRAY w/DECLARE_ALIGNED
this macro was used inconsistently and only differs in behavior from
DECLARE_ALIGNED when an alignment attribute is unavailable. this macro
is used with calls to assembly, while generic c-code doesn't rely on it,
so in a c-only build without an alignment attribute the code will
function as expected.

Change-Id: Ie9d06d4028c0de17c63b3a27e6c1b0491cc4ea79
2015-05-07 11:55:08 -07:00
Johann
76a08210b6 Merge "Move shared SAD code to vpx_dsp" 2015-05-07 18:33:06 +00:00
hkuang
086934136b Merge "Remove an unnecessary check." 2015-05-07 15:51:11 +00:00
Parag Salasakar
1601c1385a mips msa vp9 idct 32x32 optimization
average improvement ~4x-6x

Change-Id: Idaba7e49fbd7f388caee0d73773ccf6e4807ef17
2015-05-07 12:42:23 +05:30
hkuang
7153b822ed Add more sse2 code for intra prediction.
vp9_dc_left_predictor_16x16
vp9_dc_top_predictor_32x32
vp9_dc_left_predictor_32x32
vp9_dc_128_predictor_32x32

Change-Id: Ib9861deefd01c3527235b92ff6b3d571ef6b4bc6
2015-05-06 17:17:00 -07:00
Johann
d5d9289800 Move shared SAD code to vpx_dsp
Create a new component, vpx_dsp, for code that can be shared
between codecs. Move the SAD code into the component.

This reduces the size of vpxenc/dec by 36k on x86_64 builds.

Change-Id: I73f837ddaecac6b350bf757af0cfe19c4ab9327a
2015-05-06 16:58:20 -07:00
hkuang
240767b29d Remove an unnecessary check.
Change-Id: Id0f224ac4667dd173363b0f05711678448291d4e
2015-05-06 14:15:00 -07:00
hkuang
623e6eed5e Merge "Optimize the read_partition." 2015-05-06 17:29:52 +00:00
Parag Salasakar
d1cdda88bd Merge "mips msa vp9 idct 16x16 optimization" 2015-05-06 06:40:56 +00:00
hkuang
4c1a8be29d Optimize the read_partition.
Change-Id: I5a796425ce5706824a2fc17c6f24f983c5b9e43b
2015-05-05 15:51:04 -07:00
James Zern
ccae5d99d2 fix and enable vp9_dc_128_predictor_16x16
widen the loads and stores to 128-bit.

this was added, but not enabled in:
493a857 Add some sse2 code for intra prediction.

Change-Id: I277d7db608a7db7d75cc0bde86f48fa66ad487e4
2015-05-05 11:40:13 -07:00
hkuang
e47811ef8f Merge "Add some sse2 code for intra prediction." 2015-05-05 17:11:07 +00:00
Parag Salasakar
60052b618f mips msa vp9 idct 16x16 optimization
average improvement ~4x-6x

Change-Id: I55e95b7f2ba403dff11813958dc7c73a900dd022
2015-05-05 12:37:06 +05:30
James Zern
670b2c09ce vp9_idct_intrin_sse2: cosmetics: reindent
+ fix some whitespace

Change-Id: Id61b739282014288a7e5d3c17a9d6448d9d4cda2
2015-05-01 16:07:54 -07:00
James Zern
c77b1f5acd vp9: RECON_AND_STORE4X4: remove dest offset
offsetting by a variable stride prevents instruction reordering,
resulting in poor assembly

Change-Id: Id62d6b3299cdd23f8c44f97b630abf4fea241446
2015-04-30 19:14:17 -07:00
James Zern
778845da05 vp9_idct_intrin_*: RECON_AND_STORE: remove dest offset
offsetting by a variable stride prevents instruction reordering,
resulting in poor assembly.
additionally reroll 16x16/32x32 loops to reduce register spill with this
new format

Change-Id: I0635b8ba21ecdb88116e927dbdab53acdf256e11
2015-04-30 19:14:17 -07:00
Yaowu Xu
2061359fcf Merge "Remove vp9_idct16x16_10_add_ssse3()" 2015-04-30 23:13:33 +00:00
hkuang
493a8579f1 Add some sse2 code for intra prediction.
Change-Id: I16c0a62e52dab62837c547345df31e7518620ed4
2015-04-30 15:42:57 -07:00
Yaowu Xu
47767609fe Remove vp9_idct16x16_10_add_ssse3()
The rotation computation using 2X of cos(pi/16) has a potential to
overflow 32 bit, this commit disable the function to allow further
investigation and optimization.

Change-Id: I4a9803bc71303d459cb1ec5bbd7c4aaf8968e5cf
2015-04-30 09:07:30 -07:00
Parag Salasakar
95cb130f32 Merge "mips msa vp9 copy and avg convolve optimization" 2015-04-30 04:39:13 +00:00
Yaowu Xu
d45870be8d Merge "Disable ssse3 version idct16x16_256_add()" 2015-04-30 03:09:23 +00:00
Yaowu Xu
486a73a9ce Disable ssse3 version idct16x16_256_add()
The version is currently producing different result from c version
for some input. Disable the use of it for now to allow time for
investigation the source of mismatch.

Change-Id: Id039455494ee531db4886a9f1fa4761174ef6df3
2015-04-29 16:58:59 -07:00
Parag Salasakar
2301d10f73 mips msa vp9 copy and avg convolve optimization
average improvement ~3x-5x

Change-Id: I422e4c33ea7e6d6783ba40029438ccf21b0e76bb
2015-04-29 12:28:17 +05:30
James Zern
f58011ada5 vpx_mem: remove vpx_memset
vestigial. replace instances with memset() which they already were being
defined to.

Change-Id: Ie030cfaaa3e890dd92cf1a995fcb1927ba175201
2015-04-28 20:00:59 -07:00
James Zern
f274c2199b vpx_mem: remove vpx_memcpy
vestigial. replace instances with memcpy() which they already were being
defined to.

Change-Id: Icfd1b0bc5d95b70efab91b9ae777ace1e81d2d7c
2015-04-28 19:59:41 -07:00
Frank Galligan
2be50a1c9c Merge "WIP: Use LUT for y_dequant/uv_dequant" 2015-04-28 16:12:10 +00:00
Scott LaVarnway
afcb62b414 WIP: Use LUT for y_dequant/uv_dequant
instead of calculating every block.

Change-Id: Ib19ff2546be8441f8755ae971ba2910f29412029
2015-04-28 07:52:06 -07:00