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9 Commits

Author SHA1 Message Date
Yaowu Xu
56a91f139d Fix a number of msvc warnings 
Change-Id: Ic5ddba3ca0c87245617b6dbc78c0f13dc952ce8b
 2016-08-04 21:42:56 +00:00
James Zern
bc4341fd94 vp10: add some missing includes 
quiets some -Wmissing-prototypes warnings

BUG=b/29584271

Change-Id: I9174728459fcabb6d9ac0028ae58029e52c0da92
 2016-07-11 16:52:07 -07:00
Angie Chiang
1954fa390f Add flip option for vp10_fwd_txfm2d_#x#_c 
Will add unit test to test/vp10_fwd_txfm2d_test.cc later

Change-Id: I626900c67fca4eee2ad0ae1828188527a04a5362
 2016-05-10 18:14:57 -07:00
Yi Luo
412ad22f46 HBD hybrid transform 16x16 SSE4.1 optimization 
- Tx_type: DCT_DCT, DCT_ADST, ADST_DCT, ADST_ADST.
- Update vp10_fht16x16_test.cc to do bit-exact test against
  latest C version.
- HBD encoder speed improves ~1.8%.

Change-Id: Icfc799a212e5289bcf6cedcae3722032133a2bc6
 2016-05-09 11:07:01 -07:00
Yaowu Xu
f2512710d5 Replace inline with INLINE 
This fixes build issues under MSVC

Change-Id: I6db6a43cba2e8ddb099b676f1ae019fe2742f366
 2016-05-05 18:28:04 -07:00
Yi Luo
299c5fc202 HBD hybrid transform 8x8 SSE4.1 optimization 
- Tx_type: DCT_DCT, DCT_ADST, ADST_DCT, ADST_ADST.
- Update bit-exact unit test against current C version.
- HBD encoder speed improves ~3.8%.

Change-Id: Ie13925ba11214eef2b5326814940638507bf68ec
 2016-04-29 17:04:52 -07:00
Yi Luo
a4593f17ca HBD hybrid transform 4x4 SSE4.1 optimization 
- Optimization on tx_type: DCT_DCT, DCT_ADST, ADST_DCT, ADST_ADST.
- Overall encoder speed improves ~4.5%-6%.
- Update bit-exact unit test against current C version.

Change-Id: If751c030612245b1c2470200c9570cf40d655504
 2016-04-25 09:53:09 -07:00
Yi Luo
cf7f00691f Change hybrid transform function argument from TXFM_2D_CFG* to int 
Unit test shows manually developed SSE4.1 code would performs ~30%
  better if TXFM_2D_CFG configuration is set in lower level. This
  change only updates function signature. There is no performance
  impact.

Change-Id: I62692bd50a21ffc8a944bbd6c155c0a2020ad77b
 2016-04-21 18:37:21 -07:00
Angie Chiang
25520d8dc3 change vp10_fwd_txfm2d_#x#_sse2 to vp10_fwd_txfm2d_#x#_sse4_1 
The speed performance for running 20k times  is as follows

Notice that the vp10_highbd_fdct#x#_sse2 version is
16-bit version plus range check

The rest are 32-bit version

vp10_fwd_txfm2d_4x4_c (2 ms)
vp10_fwd_txfm2d_8x8_c (9 ms)
vp10_fwd_txfm2d_16x16_c (45 ms)
vp10_fwd_txfm2d_32x32_c (233 ms)

vp10_fwd_txfm2d_4x4_sse4_1 (2 ms)
vp10_fwd_txfm2d_8x8_sse4_1 (3 ms)
vp10_fwd_txfm2d_16x16_sse4_1 (16 ms)
vp10_fwd_txfm2d_32x32_sse4_1 (80 ms)

vp10_highbd_fdct4x4_c (1 ms)
vp10_highbd_fdct8x8_c (3 ms)
vp10_highbd_fdct16x16_c (17 ms)
highbd_fdct32x32_c (160 ms)

vp10_highbd_fdct4x4_sse2 (0 ms)
vp10_highbd_fdct8x8_sse2 (2 ms)
vp10_highbd_fdct16x16_sse2 (8 ms)
highbd_fdct32x32_sse2 (105 ms)

Change-Id: I24daf1e0d4d66e91e4ce61ef71cefa7b70ee90ce
 2016-03-30 15:25:26 -07:00