146 Commits

Author SHA1 Message Date
Nathan E. Egge
f3035f2bc7 Revert code formatting of OD_UNIFORM_CDFS_Q15.
The formatting of OD_UNIFORM_CDFS_Q15[] in entcode.c is helpful for
 for understanding what is contained in the array (e.g., the uniform
 probability distributions of small sizes 2 through 16).
This patch reverts the change made in f4b2926d and adds linter hints to
 ignore the formatting.

Change-Id: I2ad9fe6673b86e6067cb97b40f0f0e69a119cdf5
2016-10-17 12:16:26 -07:00
Nathan E. Egge
56eeaa5daf Rename aom_write_tree_cdf() to aom_write_symbol().
Change-Id: I7c088c55f1c461063976d5bd84ff2026c4f3bc69
2016-10-17 11:54:51 -07:00
Yaowu Xu
2bdb9e6344 Merge changes Ie43c599f,Icd0dbed4,Ic04e180b into nextgenv2
* changes:
  Move av1_indices_from_tree() to common code space.
  Add code to compute in-order mappings for tokens.
  Fix bug in av1_tree_to_cdf_2D() macro.
2016-10-14 23:46:48 +00:00
Yaowu Xu
73d702db7f Merge changes I339d0389,I2fa1e87a,If79fa5ae,Icb1a8cb8,Ic76de4a4, ... into nextgenv2
* changes:
  Add missing CONFIG_DAALA_EC declaration.
  Add API for writing trees using a CDF.
  Add macro to build a simple cdf table.
  Use Daala entropy coder to code trees.
  Silence clang-format code review warning.
  Use Daala entropy coder to code bits.
  Clear existing format issue in the codebase
  Add Daala entropy coder.
2016-10-14 23:42:22 +00:00
Yi Luo
1dec26e004 Merge "Zero high 128b YMM registers to avoid SSE-AVX transition penalties" into nextgenv2 2016-10-14 23:13:10 +00:00
Nathan E. Egge
8abf8673e6 Move av1_indices_from_tree() to common code space.
Move the av1_indices_from_tree() function from av1/encoder/treewriter.c
 to aom_dsp/prob.c so that it can be used by both the encoder and
 the decoder.

Change-Id: Ie43c599f425c3503b1ff93f0c77b5033a05b1bb4
2016-10-14 14:59:27 -07:00
Nathan E. Egge
a67c0ff4d7 Add missing CONFIG_DAALA_EC declaration.
Without first including ./aom_config.h in aom_dsp/prob.c the memmove
 function is implicitly defined and causes a compiler warning.

Change-Id: I339d0389f10324a1085aba7d6492b2159a14da92
2016-10-14 14:59:27 -07:00
Nathan E. Egge
44460148b2 Add API for writing trees using a CDF.
Added aom_write_tree_cdf() and aom_read_tree_cdf() function calls to
 bitwriter.h and bitreader.h respectively.
These calls take a multisymbol CDF and an index and directly encode the
 symbol using the enabled entropy coder.
Currently only the daala entropy encoder supports this (enabled with
 --enable-daala_ec) and a compile error is thrown otherwise.

Change-Id: I2fa1e87af4352c94384e0cfdbfd170ac99cf3705
2016-10-14 14:59:27 -07:00
Nathan E. Egge
439c50251f Fix bug in av1_tree_to_cdf_2D() macro.
Change-Id: Ic04e180b09745fab2230d05985770c41deea4fad
2016-10-14 14:59:27 -07:00
Nathan E. Egge
e2ed411836 Add macro to build a simple cdf table.
Add the av1_tree_to_cdf() macro which takes a aom_tree_index tree and
 associated aom_prob probabilities and constructs a daala uint16_t cdf.
The av1_tree_to_cdf_1D() and av1_tree_to_cdf_2D() apply av1_tree_to_cdf()
 across 1D and 2D arrays respectively.

Change-Id: If79fa5ae034263f279d7d0842493570885272fb2
2016-10-14 14:59:27 -07:00
Nathan E. Egge
43acafdee2 Use Daala entropy coder to code trees.
When building with --enable-daala_ec, calls to aom_write_tree() and
 aom_read_tree() will convert a aom_tree_index structure with associated
 aom_prob probabilities into a CDF on the fly for use with the
 od_ec_encode_cdf_q15().
The number of symbols in the CDF is capped at 16, and trees that contain
 more than 16 leaf nodes are handled by splitting the most likely, e.g.,
 highest probability symbols, first and coding multiple symbols if
 necessary.

ntt-short-1:

         MEDIUM (%) HIGH (%)
    PSNR 0.000227   0.000213
 PSNRHVS 0.000215   0.000205
    SSIM 0.000229   0.000209
FASTSSIM 0.000229   0.000214

subset1:

          RATE (%)  DSNR (dB)
    PSNR -0.00026   0.00002
 PSNRHVS -0.00026   0.00002
    SSIM -0.00026   0.00001
FASTSSIM -0.00026   0.00001

Change-Id: Icb1a8cb854fd81fdd88fbe4bc6761c7eb4757dfe
2016-10-14 14:59:27 -07:00
Nathan E. Egge
0435f0eae6 Silence clang-format code review warning.
Change-Id: Ic76de4a4c0c39924bf04c3c2fa9214d33bcee9fb
2016-10-14 14:59:27 -07:00
Nathan E. Egge
8043cc4018 Use Daala entropy coder to code bits.
When building with --enable-daala_ec, calls to aom_write() and aom_read()
 use the daala entropy coder to write and read bits.
When the probability is exactly 0.5 (128), then raw bits are used.

ntt-short-1:

          MEDIUM (%) HIGH (%)
    PSNR -0.027556  -0.020114
 PSNRHVS -0.027401  -0.020169
    SSIM -0.027587  -0.020151
FASTSSIM -0.027592  -0.020102

subset1:

         RATE (%)  DSNR (dB)
    PSNR 0.03296  -0.00210
 PSNRHVS 0.03537  -0.00281
    SSIM 0.03299  -0.00161
FASTSSIM 0.03458  -0.00111

Change-Id: I48ad8eb40fc895d62d6e241ea8abc02820d573f7
2016-10-14 14:59:27 -07:00
Yaowu Xu
931bc2a714 Clear existing format issue in the codebase
Fix the clang-format warnings on the existing codes.

Change-Id: I8e9e781b6f68f41a7fbd0a2116f6b35290d73dc8
2016-10-14 14:59:27 -07:00
Nathan E. Egge
1078dee569 Add Daala entropy coder.
Change-Id: I2849a50163268d58cc5d80aacfec1fd02299ca43
2016-10-14 14:59:27 -07:00
Alex Converse
62a94a649d Switch rANS to 15 bit precision, and adjust L_BASE.
This causes rANS to operate at the same precision as the Daala EC.

aom/master stats: rans10uabs8lbase12 → rans15uabs8lbase15

objective-1-fast
PSNR YCbCr:      0.01%      0.01%      0.01%
   PSNRHVS:      0.01%
      SSIM:      0.01%
    MSSSIM:      0.01%
 CIEDE2000:      0.01%

subset1
PSNR YCbCr:     -0.01%     -0.00%     -0.00%
   PSNRHVS:     -0.01%
      SSIM:     -0.01%
    MSSSIM:     -0.01%
 CIEDE2000:     -0.01%

(cherry picked from aom/master commit ddbc2e2a68bfc997dc61fca5bcaac3a75245e965)

Change-Id: I6ef0a4f6198784b3712a61af9f105d560a22eaea
2016-10-14 14:05:50 -07:00
Yi Luo
e9fde265f7 Zero high 128b YMM registers to avoid SSE-AVX transition penalties
Documents:
- https://software.intel.com/en-us/articles/intel-avx-state-transitions-migrating-sse-code-to-avx
- https://software.intel.com/sites/default/files/m/d/4/1/d/8/11MC12_Avoiding_2BAVX-SSE_2BTransition_2BPenalties_2Brh_2Bfinal.pdf

Change-Id: I90f85fcb15a7a2c49ee068300be6ffe9c68d371c
2016-10-14 12:22:35 -07:00
James Zern
fbabcad67c Merge changes I4850b36e,Ic4d7128a into nextgenv2
* changes:
  variance_avx2: sync variance functions with c-code
  Resolve -Wshorten-64-to-32 in variance.
2016-10-14 19:10:20 +00:00
Yi Luo
b9fbf38bff Merge "Delete some redundant function declarations in aom_dsp_rtcd_defs.pl" into nextgenv2 2016-10-14 17:50:37 +00:00
James Zern
8c64331aa2 variance_avx2: sync variance functions with c-code
add missing int64 -> uint32 cast; quiets -Wshorten-64-to-32 warnings

Change-Id: I4850b36e18dc8b399108342be4bfe0b684aefb78
(cherry picked from commit 6acd061aad8cf62000cc9117390d0c94581a8591)
2016-10-13 20:15:18 -07:00
Alex Converse
2176b7acc2 Resolve -Wshorten-64-to-32 in variance.
The subtrahend is small enough to fit into uint32_t.

Change-Id: Ic4d7128aaa665eaf6b25d562610ba8942c46137f
(cherry picked from commit c0241664aac3a1805db9bd8e09e071ac326531e0)
2016-10-13 20:12:20 -07:00
Debargha Mukherjee
a720f4b3b5 Merge "Add sse2 forward and inverse 16x32 and 32x16 transforms" into nextgenv2 2016-10-14 02:49:20 +00:00
Yue Chen
a48764d05f Merge "Renamings for OBMC experiment" into nextgenv2 2016-10-14 01:33:00 +00:00
Yi Luo
761ae880d7 Delete some redundant function declarations in aom_dsp_rtcd_defs.pl
Change-Id: I4df57a7faba5800c048b2dc469ec31545406f55c
2016-10-13 17:53:45 -07:00
Yue Chen
cb60b185c7 Renamings for OBMC experiment
To get ready for pulling AV1 to nextgenv2
Replace the experimental flag by MOTION_VAR. Rename major variables.

Change-Id: If6cf4f37b9319c46d8f90df551cc7295d66ca205
2016-10-13 15:51:22 -07:00
Steinar Midtskogen
2d5f752ae9 Don't use _mm_cvtsi128_si64 on 32 bit systems
Change-Id: I332afb8d9e35cd60f05915160a5b2e1dc8757de5
2016-10-13 14:35:00 -07:00
Yaowu Xu
410fee8de6 Fix formatting in a few files
Change-Id: Ia5175afe82b142d9e18c01c546610202c630588e
2016-10-13 13:04:29 -07:00
Yaowu Xu
8ac419f307 Merge changes Ic3a68557,Ib1dbe41a,I0da09270,Ibdbd720d into nextgenv2
* changes:
  Deringing cleanup: remove DERING_REFINEMENT (always on now)
  Don't run the deringing filter on skipped blocks within a superblock
  Don't dering skipped superblocks
  On x86 use _mm_set_epi32 when _mm_cvtsi64_si128 isn't available
2016-10-13 15:54:32 +00:00
Yaowu Xu
89d3f2fd10 Merge "Sync 2x2 intra predictors" into nextgenv2 2016-10-13 15:20:52 +00:00
Alex Converse
fc4980edb7 Merge changes Ic74d9d88,Ie93b474e,I544989ea,Ic273f7d9,Idfd2d2b3, ... into nextgenv2
* changes:
  Remove custom rans types
  Remove add_token_no_extra.
  Remove unused aom_rans_build_cdf_from_pdf
  Add the tool used to generate the constrained tokenset.
  Remove the starting zero from ANS CDFs.
  Import the aom_read/write_symbol abstractions from aom/master
2016-10-13 14:03:15 +00:00
David Barker
33231d4801 Add sse2 forward and inverse 16x32 and 32x16 transforms
Change-Id: I1241257430f1e08ead1ce0f31db8272b50783102
2016-10-13 14:01:22 +01:00
Alex Converse
9ed1a2ff44 Remove custom rans types
(cherry picked from aom/master commit 11206c60d930be9d29100567aa67f2a65463852a)

Includes renames in a bunch of places not handled by the original
due to differing tree states.

Change-Id: Ic74d9d8850b8c80a51e55e425bbf472a67e2653f
2016-10-13 05:53:58 +00:00
Jingning Han
e3954d8312 Sync 2x2 intra predictors
Add 2x2 DC, V, H, TM intra predictors.

Change-Id: I2a614adde553f821c45bc5a9bf09800a9f0aaa26
2016-10-12 21:04:01 -07:00
Alex Converse
d5b9c730ad Remove unused aom_rans_build_cdf_from_pdf
Change-Id: I544989eae45b7dda04250365c3de99f50110a76b
(cherry picked from aom/master commit 06cce842caa5212826d51c2a317de0bdfae74349)
2016-10-12 17:44:14 -07:00
Alex Converse
e9f70f8f10 Remove the starting zero from ANS CDFs.
This brings it in line with the Daala CDFs and will make it easier to
share code.

Change-Id: Idfd2d2b33c3b9b2c4e72ce72fb3d8039013448b9
(cherry picked from aom/master commit af98507ca928afe33e9f88fdd2ca168379528d6a)
2016-10-12 17:41:01 -07:00
Alex Converse
a1ac972867 Import the aom_read/write_symbol abstractions from aom/master
Change-Id: I0b255c05108c3b97e74df1b59c34111c9e9a5770
2016-10-12 17:41:01 -07:00
Steinar Midtskogen
b074823863 On x86 use _mm_set_epi32 when _mm_cvtsi64_si128 isn't available
Change-Id: Ibdbd720d4f68892da6164a9849e212e759305005
2016-10-12 15:48:13 -07:00
Yi Luo
fed8e1c06d Hybrid forward transform 32x32 AVX2 optimization
- av1_fht32x32 AVX2 function level time reduction ~89% compared to C.

- av1_fht32x32_avx2() on DCT_DCT improves 42.62% over aom_fdct32x32_avx2()
  But function replacement must go with the corresponding inverse txfm.

- No obvious user level time reduction due to 32x32 TX_TYPE selection.

- Zero high 128b YMM to avoid AVX-SSE transition penalties
  (fix 16x16 case).

- Added 32x32 AVX2 unit tests to verify bitexact.

- AVX2 optimization summary:
  On CPU i7-6700, based on 16x16/32x32 fwd txfm optimization results:
  C to AVX2: function level time reduction, ~86-89%.
  SSE2 to AVX2: function level time reduction, ~51%.

Change-Id: Idd0cd8bf066a61c7117140ef15ab6c1f8eb4b036
2016-10-12 14:19:53 -07:00
Yaowu Xu
f36d0b46d1 minor updates
1. vp8->aom
2. removed no-effect statements and spaces

Change-Id: I367d05ff9bf1b9f3c71c517c45d8049d9d4236ec
2016-10-12 10:50:08 -07:00
Steinar Midtskogen
b066b962a7 Fix missing parentheses in v64_align()
Change-Id: I16469062853c101965f56002be30ebc5823975b1
2016-10-11 12:36:17 -07:00
Steinar Midtskogen
9d6a53b8fd Improve v128 and v64 8 bit shifts for x86
Change-Id: I25dc61bab46895d425ce49f89fceb164bee36906
2016-10-11 12:36:17 -07:00
Steinar Midtskogen
ebf209ba82 Make generic SIMD code compile if no native support
Change-Id: I7f691a0ae27f06ef3d727764829a60a8ffc509eb
2016-10-11 12:36:16 -07:00
Yaowu Xu
25faa0e9f5 Merge "Move tree writing code into bitwriter.h." into nextgenv2 2016-10-11 19:16:25 +00:00
Yaowu Xu
80eaf1a120 Merge "Extend CLPF to chroma." into nextgenv2 2016-10-11 18:44:31 +00:00
Yaowu Xu
a1a7ad0c15 Merge "Make generic SIMD work with clang." into nextgenv2 2016-10-11 18:42:15 +00:00
Yaowu Xu
0bab35bf64 Merge "Fix clang-format warnings in aom_dsp/simd/v64_intrinsics_arm.h" into nextgenv2 2016-10-11 18:41:50 +00:00
Yaowu Xu
038d41045b Merge "Added high bit-depth support in CLPF." into nextgenv2 2016-10-11 18:41:15 +00:00
Yaowu Xu
a2bbf621f1 Merge "Reduce memory footprint for CLPF decoding." into nextgenv2 2016-10-11 18:40:47 +00:00
Nathan E. Egge
eeedc633c0 Move tree writing code into bitwriter.h.
Rename av1_write_tree() to aom_write_tree() and move it into bitwriter.h
 to match aom_read_tree() in bitreader.h.

Manually cherry-picked from aom/master:
33a143fa7ac42d62080bfc20468cb76ad26045db

Change-Id: I6c686cdd3e0f179d7e95c5bc6984558b62d46d67
2016-10-11 09:36:01 -07:00
Yaowu Xu
4960f7c3bd Merge "Added generic SIMD support for CLPF." into nextgenv2 2016-10-11 16:05:18 +00:00