Add an SSE2 version of vp9_iwht4x4_16_add.
80% fewer cycles than C Change-Id: I841bde1e268ddd33ae2ee75eee94737a400e2cde
This commit is contained in:
Alex Converse
parent
8bf791e7ef
commit
f8d3501640
@ -494,6 +494,14 @@ INSTANTIATE_TEST_CASE_P(
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make_tuple(&vp9_fwht4x4_mmx, &vp9_iwht4x4_16_add_c, 0, VPX_BITS_8)));
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make_tuple(&vp9_fwht4x4_mmx, &vp9_iwht4x4_16_add_c, 0, VPX_BITS_8)));
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#endif
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#endif
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#if CONFIG_USE_X86INC && HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && \
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!CONFIG_EMULATE_HARDWARE
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INSTANTIATE_TEST_CASE_P(
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SSE2, Trans4x4WHT,
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::testing::Values(
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make_tuple(&vp9_fwht4x4_c, &vp9_iwht4x4_16_add_sse2, 0, VPX_BITS_8)));
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#endif
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#if HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
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#if HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
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INSTANTIATE_TEST_CASE_P(
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INSTANTIATE_TEST_CASE_P(
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SSE2, Trans4x4DCT,
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SSE2, Trans4x4DCT,
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@ -475,7 +475,7 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") {
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specialize qw/vp9_iwht4x4_1_add msa/;
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specialize qw/vp9_iwht4x4_1_add msa/;
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add_proto qw/void vp9_iwht4x4_16_add/, "const tran_low_t *input, uint8_t *dest, int dest_stride";
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add_proto qw/void vp9_iwht4x4_16_add/, "const tran_low_t *input, uint8_t *dest, int dest_stride";
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specialize qw/vp9_iwht4x4_16_add msa/;
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specialize qw/vp9_iwht4x4_16_add msa/, "$sse2_x86inc";
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}
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}
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}
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}
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88
vp9/common/x86/vp9_idct_sse2.asm
Normal file
88
vp9/common/x86/vp9_idct_sse2.asm
Normal file
@ -0,0 +1,88 @@
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;
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; Copyright (c) 2015 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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%include "third_party/x86inc/x86inc.asm"
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SECTION .text
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%macro TRANSFORM_COLS 0
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paddw m0, m2
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psubw m3, m1
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psubw m4, m0, m3
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psraw m4, 1
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psubw m5, m4, m1 ;b1
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psubw m4, m2 ;c1
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psubw m0, m5
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paddw m3, m4
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; m0 a0
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SWAP 1, 4 ; m1 c1
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SWAP 2, 3 ; m2 d1
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SWAP 3, 5 ; m3 b1
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%endmacro
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%macro TRANSPOSE_4X4 0
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SWAP 4, 0
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SWAP 5, 2
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punpcklwd m4, m1
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pshufd m0, m4, 0x0e
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punpcklwd m5, m3
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pshufd m2, m5, 0x0e
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SWAP 1, 4
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SWAP 3, 0
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punpckldq m1, m5
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pshufd m4, m1, 0x0e
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punpckldq m3, m2
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pshufd m0, m3, 0x0e
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SWAP 2, 3, 0, 1, 4
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%endmacro
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; transposes a 4x4 int16 matrix in xmm0 and xmm1 to the bottom half of xmm0-xmm3
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%macro TRANSPOSE_4X4_WIDE 0
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mova m3, m0
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punpcklwd m0, m1
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punpckhwd m3, m1
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mova m2, m0
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punpcklwd m0, m3
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punpckhwd m2, m3
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pshufd m1, m0, 0x0e
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pshufd m3, m2, 0x0e
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%endmacro
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%macro ADD_STORE_4P_2X 5 ; src1, src2, tmp1, tmp2, zero
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movq m%3, [outputq]
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movq m%4, [outputq + strideq]
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punpcklbw m%3, m%5
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punpcklbw m%4, m%5
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paddw m%1, m%3
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paddw m%2, m%4
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packuswb m%1, m%5
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packuswb m%2, m%5
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movd [outputq], m%1
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movd [outputq + strideq], m%2
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%endmacro
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INIT_XMM sse2
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cglobal iwht4x4_16_add, 3, 4, 7, input, output, stride
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mova m0, [inputq + 0] ;a1
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mova m1, [inputq + 16] ;c1
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psraw m0, 2
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psraw m1, 2
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TRANSPOSE_4X4_WIDE
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TRANSFORM_COLS
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TRANSPOSE_4X4
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TRANSFORM_COLS
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pxor m4, m4
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ADD_STORE_4P_2X 0, 1, 5, 6, 4
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lea outputq, [outputq + 2 * strideq]
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ADD_STORE_4P_2X 2, 3, 5, 6, 4
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RET
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@ -75,6 +75,7 @@ VP9_COMMON_SRCS-$(CONFIG_VP9_POSTPROC) += common/vp9_postproc.h
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VP9_COMMON_SRCS-$(CONFIG_VP9_POSTPROC) += common/vp9_postproc.c
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VP9_COMMON_SRCS-$(CONFIG_VP9_POSTPROC) += common/vp9_postproc.c
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VP9_COMMON_SRCS-$(CONFIG_VP9_POSTPROC) += common/vp9_mfqe.h
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VP9_COMMON_SRCS-$(CONFIG_VP9_POSTPROC) += common/vp9_mfqe.h
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VP9_COMMON_SRCS-$(CONFIG_VP9_POSTPROC) += common/vp9_mfqe.c
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VP9_COMMON_SRCS-$(CONFIG_VP9_POSTPROC) += common/vp9_mfqe.c
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VP9_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp9_idct_sse2.asm
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VP9_COMMON_SRCS-$(HAVE_MMX) += common/x86/vp9_loopfilter_mmx.asm
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VP9_COMMON_SRCS-$(HAVE_MMX) += common/x86/vp9_loopfilter_mmx.asm
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VP9_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp9_subpixel_8t_sse2.asm
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VP9_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp9_subpixel_8t_sse2.asm
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VP9_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp9_subpixel_bilinear_sse2.asm
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VP9_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp9_subpixel_bilinear_sse2.asm
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