Merge "quantize neon: round dqcoeff towards zero"
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@@ -11,6 +11,7 @@
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#include <arm_neon.h>
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#include <assert.h>
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#include "./vpx_config.h"
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#include "./vpx_dsp_rtcd.h"
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#include "vpx_dsp/arm/mem_neon.h"
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@@ -143,6 +144,10 @@ void vpx_quantize_b_neon(const tran_low_t *coeff_ptr, intptr_t n_coeffs,
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}
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}
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static INLINE int32x4_t extract_sign_bit(int32x4_t a) {
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return vreinterpretq_s32_u32(vshrq_n_u32(vreinterpretq_u32_s32(a), 31));
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}
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// Main difference is that zbin values are halved before comparison and dqcoeff
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// values are divided by 2. zbin is rounded but dqcoeff is not.
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void vpx_quantize_b_32x32_neon(
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@@ -184,7 +189,7 @@ void vpx_quantize_b_32x32_neon(
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// (round * quant * 2) >> 16 >> 1 == (round * quant) >> 16
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int16x8_t qcoeff = vshrq_n_s16(vqdmulhq_s16(rounded, quant), 1);
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int16x8_t dqcoeff;
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int32x4_t dqcoeff_0, dqcoeff_1, dqcoeff_0_sign, dqcoeff_1_sign;
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int32x4_t dqcoeff_0, dqcoeff_1;
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qcoeff = vaddq_s16(qcoeff, rounded);
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@@ -209,21 +214,12 @@ void vpx_quantize_b_32x32_neon(
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dqcoeff_0 = vmull_s16(vget_low_s16(qcoeff), vget_low_s16(dequant));
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dqcoeff_1 = vmull_s16(vget_high_s16(qcoeff), vget_high_s16(dequant));
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// The way the C shifts the values requires us to convert to positive before
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// shifting or even narrowing, then put the sign back.
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dqcoeff_0_sign = vshrq_n_s32(dqcoeff_0, 31);
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dqcoeff_1_sign = vshrq_n_s32(dqcoeff_1, 31);
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dqcoeff_0 = vabsq_s32(dqcoeff_0);
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dqcoeff_1 = vabsq_s32(dqcoeff_1);
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dqcoeff_0 = vshrq_n_s32(dqcoeff_0, 1);
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dqcoeff_1 = vshrq_n_s32(dqcoeff_1, 1);
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dqcoeff_0 = veorq_s32(dqcoeff_0, dqcoeff_0_sign);
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dqcoeff_1 = veorq_s32(dqcoeff_1, dqcoeff_1_sign);
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dqcoeff_0 = vsubq_s32(dqcoeff_0, dqcoeff_0_sign);
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dqcoeff_1 = vsubq_s32(dqcoeff_1, dqcoeff_1_sign);
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// Add 1 if negative to round towards zero because the C uses division.
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dqcoeff_0 = vaddq_s32(dqcoeff_0, extract_sign_bit(dqcoeff_0));
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dqcoeff_1 = vaddq_s32(dqcoeff_1, extract_sign_bit(dqcoeff_1));
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// Narrow *without saturation* because that's what the C does.
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dqcoeff = vcombine_s16(vmovn_s32(dqcoeff_0), vmovn_s32(dqcoeff_1));
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dqcoeff =
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vcombine_s16(vshrn_n_s32(dqcoeff_0, 1), vshrn_n_s32(dqcoeff_1, 1));
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store_s16q_to_tran_low(dqcoeff_ptr, dqcoeff);
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dqcoeff_ptr += 8;
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@@ -253,7 +249,7 @@ void vpx_quantize_b_32x32_neon(
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// (round * quant * 2) >> 16 >> 1 == (round * quant) >> 16
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int16x8_t qcoeff = vshrq_n_s16(vqdmulhq_s16(rounded, quant), 1);
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int16x8_t dqcoeff;
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int32x4_t dqcoeff_0, dqcoeff_1, dqcoeff_0_sign, dqcoeff_1_sign;
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int32x4_t dqcoeff_0, dqcoeff_1;
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qcoeff = vaddq_s16(qcoeff, rounded);
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@@ -279,18 +275,11 @@ void vpx_quantize_b_32x32_neon(
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dqcoeff_0 = vmull_s16(vget_low_s16(qcoeff), vget_low_s16(dequant));
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dqcoeff_1 = vmull_s16(vget_high_s16(qcoeff), vget_high_s16(dequant));
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dqcoeff_0_sign = vshrq_n_s32(dqcoeff_0, 31);
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dqcoeff_1_sign = vshrq_n_s32(dqcoeff_1, 31);
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dqcoeff_0 = vabsq_s32(dqcoeff_0);
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dqcoeff_1 = vabsq_s32(dqcoeff_1);
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dqcoeff_0 = vshrq_n_s32(dqcoeff_0, 1);
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dqcoeff_1 = vshrq_n_s32(dqcoeff_1, 1);
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dqcoeff_0 = veorq_s32(dqcoeff_0, dqcoeff_0_sign);
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dqcoeff_1 = veorq_s32(dqcoeff_1, dqcoeff_1_sign);
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dqcoeff_0 = vsubq_s32(dqcoeff_0, dqcoeff_0_sign);
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dqcoeff_1 = vsubq_s32(dqcoeff_1, dqcoeff_1_sign);
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dqcoeff_0 = vaddq_s32(dqcoeff_0, extract_sign_bit(dqcoeff_0));
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dqcoeff_1 = vaddq_s32(dqcoeff_1, extract_sign_bit(dqcoeff_1));
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dqcoeff = vcombine_s16(vmovn_s32(dqcoeff_0), vmovn_s32(dqcoeff_1));
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dqcoeff =
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vcombine_s16(vshrn_n_s32(dqcoeff_0, 1), vshrn_n_s32(dqcoeff_1, 1));
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store_s16q_to_tran_low(dqcoeff_ptr, dqcoeff);
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dqcoeff_ptr += 8;
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