Merge "Optimize AVX2 get16x16var and get32x16var functions"
This commit is contained in:
Kyle Siefring
Gerrit Code Review
commit
dd4cc5b596
@ -492,7 +492,7 @@ void MainTestClass<VarianceFunctionType>::SpeedTest() {
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vpx_usec_timer timer;
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vpx_usec_timer_start(&timer);
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for (int i = 0; i < 100000000 / block_size(); ++i) {
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for (int i = 0; i < (1 << 30) / block_size(); ++i) {
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const uint32_t variance = params_.func(src_, width(), ref_, width(), &sse);
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// Ignore return value.
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(void)variance;
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@ -31,137 +31,134 @@ DECLARE_ALIGNED(32, static const uint8_t, bilinear_filters_avx2[512]) = {
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2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14,
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2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14,
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};
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DECLARE_ALIGNED(32, static const int8_t, adjacent_sub_avx2[32]) = {
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1, -1, 1, -1, 1, -1, 1, -1, 1, -1, 1, -1, 1, -1, 1, -1,
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1, -1, 1, -1, 1, -1, 1, -1, 1, -1, 1, -1, 1, -1, 1, -1
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};
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/* clang-format on */
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void vpx_get16x16var_avx2(const unsigned char *src_ptr, int source_stride,
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const unsigned char *ref_ptr, int recon_stride,
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unsigned int *sse, int *sum) {
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unsigned int i, src_2strides, ref_2strides;
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__m256i sum_ref_src = _mm256_setzero_si256();
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__m256i madd_ref_src = _mm256_setzero_si256();
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__m256i sum_reg = _mm256_setzero_si256();
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__m256i sse_reg = _mm256_setzero_si256();
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// process two 16 byte locations in a 256 bit register
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src_2strides = source_stride << 1;
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ref_2strides = recon_stride << 1;
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for (i = 0; i < 8; ++i) {
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const __m256i zero_reg = _mm256_setzero_si256();
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// convert up values in 128 bit registers across lanes
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const __m256i src0 =
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_mm256_castsi128_si256(_mm_loadu_si128((__m128i const *)(src_ptr)));
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const __m256i src = _mm256_inserti128_si256(
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src0, _mm_loadu_si128((__m128i const *)(src_ptr + source_stride)), 1);
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_mm256_cvtepu8_epi16(_mm_loadu_si128((__m128i const *)(src_ptr)));
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const __m256i src1 = _mm256_cvtepu8_epi16(
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_mm_loadu_si128((__m128i const *)(src_ptr + source_stride)));
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const __m256i ref0 =
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_mm256_castsi128_si256(_mm_loadu_si128((__m128i const *)(ref_ptr)));
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const __m256i ref = _mm256_inserti128_si256(
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ref0, _mm_loadu_si128((__m128i const *)(ref_ptr + recon_stride)), 1);
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const __m256i src_lo = _mm256_unpacklo_epi8(src, zero_reg);
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const __m256i src_hi = _mm256_unpackhi_epi8(src, zero_reg);
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const __m256i ref_lo = _mm256_unpacklo_epi8(ref, zero_reg);
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const __m256i ref_hi = _mm256_unpackhi_epi8(ref, zero_reg);
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const __m256i diff_lo = _mm256_sub_epi16(src_lo, ref_lo);
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const __m256i diff_hi = _mm256_sub_epi16(src_hi, ref_hi);
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const __m256i madd_lo = _mm256_madd_epi16(diff_lo, diff_lo);
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const __m256i madd_hi = _mm256_madd_epi16(diff_hi, diff_hi);
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const __m256i src_ref_diff_sum = _mm256_add_epi16(diff_lo, diff_hi);
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_mm256_cvtepu8_epi16(_mm_loadu_si128((__m128i const *)(ref_ptr)));
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const __m256i ref1 = _mm256_cvtepu8_epi16(
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_mm_loadu_si128((__m128i const *)(ref_ptr + recon_stride)));
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const __m256i diff0 = _mm256_sub_epi16(src0, ref0);
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const __m256i diff1 = _mm256_sub_epi16(src1, ref1);
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const __m256i madd0 = _mm256_madd_epi16(diff0, diff0);
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const __m256i madd1 = _mm256_madd_epi16(diff1, diff1);
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sum_ref_src = _mm256_add_epi16(sum_ref_src, src_ref_diff_sum);
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// add high to low
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madd_ref_src =
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_mm256_add_epi32(madd_ref_src, _mm256_add_epi32(madd_lo, madd_hi));
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// add to the running totals
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sum_reg = _mm256_add_epi16(sum_reg, _mm256_add_epi16(diff0, diff1));
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sse_reg = _mm256_add_epi32(sse_reg, _mm256_add_epi32(madd0, madd1));
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src_ptr += src_2strides;
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ref_ptr += ref_2strides;
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}
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{
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const __m128i zero_reg = _mm_setzero_si128();
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// extract the low lane and add it to the high lane
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const __m128i sum_ref_src_128 =
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_mm_add_epi16(_mm256_castsi256_si128(sum_ref_src),
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_mm256_extractf128_si256(sum_ref_src, 1));
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const __m128i madd_ref_src_128 =
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_mm_add_epi32(_mm256_castsi256_si128(madd_ref_src),
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_mm256_extractf128_si256(madd_ref_src, 1));
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// 16 -> 32 sign extended
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const __m128i sum_lo =
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_mm_srai_epi32(_mm_unpacklo_epi16(zero_reg, sum_ref_src_128), 16);
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// 16 -> 32 sign extended
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const __m128i sum_hi =
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_mm_srai_epi32(_mm_unpackhi_epi16(zero_reg, sum_ref_src_128), 16);
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const __m128i sum_hl = _mm_add_epi32(sum_lo, sum_hi);
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const __m128i madd_lo = _mm_unpacklo_epi32(madd_ref_src_128, zero_reg);
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const __m128i madd_hi = _mm_unpackhi_epi32(madd_ref_src_128, zero_reg);
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const __m128i madd = _mm_add_epi32(madd_lo, madd_hi);
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const __m128i ex_sum_lo = _mm_unpacklo_epi32(sum_hl, zero_reg);
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const __m128i ex_sum_hi = _mm_unpackhi_epi32(sum_hl, zero_reg);
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const __m128i ex_sum = _mm_add_epi32(ex_sum_lo, ex_sum_hi);
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*((int *)sse) =
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_mm_cvtsi128_si32(_mm_add_epi32(madd, _mm_srli_si128(madd, 8)));
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*((int *)sum) =
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_mm_cvtsi128_si32(_mm_add_epi32(ex_sum, _mm_srli_si128(ex_sum, 8)));
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const __m128i sum_reg_128 = _mm_add_epi16(
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_mm256_castsi256_si128(sum_reg), _mm256_extractf128_si256(sum_reg, 1));
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const __m128i sse_reg_128 = _mm_add_epi32(
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_mm256_castsi256_si128(sse_reg), _mm256_extractf128_si256(sse_reg, 1));
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// sum upper and lower 64 bits together and convert up to 32 bit values
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const __m128i sum_reg_64 =
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_mm_add_epi16(sum_reg_128, _mm_srli_si128(sum_reg_128, 8));
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const __m128i sum_int32 = _mm_cvtepi16_epi32(sum_reg_64);
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// unpack sse and sum registers and add
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const __m128i sse_sum_lo = _mm_unpacklo_epi32(sse_reg_128, sum_int32);
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const __m128i sse_sum_hi = _mm_unpackhi_epi32(sse_reg_128, sum_int32);
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const __m128i sse_sum = _mm_add_epi32(sse_sum_lo, sse_sum_hi);
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// perform the final summation and extract the results
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const __m128i res = _mm_add_epi32(sse_sum, _mm_srli_si128(sse_sum, 8));
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*((int *)sse) = _mm_cvtsi128_si32(res);
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*((int *)sum) = _mm_extract_epi32(res, 1);
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}
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}
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static void get32x16var_avx2(const unsigned char *src_ptr, int source_stride,
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const unsigned char *ref_ptr, int recon_stride,
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unsigned int *sse, int *sum) {
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unsigned int i;
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const __m256i zero_reg = _mm256_setzero_si256();
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__m256i sum_ref_src = _mm256_setzero_si256();
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__m256i madd_ref_src = _mm256_setzero_si256();
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unsigned int i, src_2strides, ref_2strides;
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const __m256i adj_sub = _mm256_load_si256((__m256i const *)adjacent_sub_avx2);
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__m256i sum_reg = _mm256_setzero_si256();
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__m256i sse_reg = _mm256_setzero_si256();
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// processing 32 elements in parallel
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for (i = 0; i < 16; i++) {
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const __m256i src = _mm256_loadu_si256((__m256i const *)(src_ptr));
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const __m256i ref = _mm256_loadu_si256((__m256i const *)(ref_ptr));
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const __m256i src_lo = _mm256_unpacklo_epi8(src, zero_reg);
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const __m256i src_hi = _mm256_unpackhi_epi8(src, zero_reg);
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const __m256i ref_lo = _mm256_unpacklo_epi8(ref, zero_reg);
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const __m256i ref_hi = _mm256_unpackhi_epi8(ref, zero_reg);
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const __m256i diff_lo = _mm256_sub_epi16(src_lo, ref_lo);
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const __m256i diff_hi = _mm256_sub_epi16(src_hi, ref_hi);
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const __m256i madd_lo = _mm256_madd_epi16(diff_lo, diff_lo);
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const __m256i madd_hi = _mm256_madd_epi16(diff_hi, diff_hi);
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// add high to low
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const __m256i diff_sum = _mm256_add_epi16(diff_lo, diff_hi);
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// process 64 elements in an iteration
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src_2strides = source_stride << 1;
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ref_2strides = recon_stride << 1;
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for (i = 0; i < 8; i++) {
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const __m256i src0 = _mm256_loadu_si256((__m256i const *)(src_ptr));
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const __m256i src1 =
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_mm256_loadu_si256((__m256i const *)(src_ptr + source_stride));
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const __m256i ref0 = _mm256_loadu_si256((__m256i const *)(ref_ptr));
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const __m256i ref1 =
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_mm256_loadu_si256((__m256i const *)(ref_ptr + recon_stride));
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sum_ref_src = _mm256_add_epi16(sum_ref_src, diff_sum);
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// unpack into pairs of source and reference values
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const __m256i src_ref0 = _mm256_unpacklo_epi8(src0, ref0);
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const __m256i src_ref1 = _mm256_unpackhi_epi8(src0, ref0);
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const __m256i src_ref2 = _mm256_unpacklo_epi8(src1, ref1);
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const __m256i src_ref3 = _mm256_unpackhi_epi8(src1, ref1);
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// add high to low
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madd_ref_src =
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_mm256_add_epi32(madd_ref_src, _mm256_add_epi32(madd_lo, madd_hi));
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// subtract adjacent elements using src*1 + ref*-1
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const __m256i diff0 = _mm256_maddubs_epi16(src_ref0, adj_sub);
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const __m256i diff1 = _mm256_maddubs_epi16(src_ref1, adj_sub);
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const __m256i diff2 = _mm256_maddubs_epi16(src_ref2, adj_sub);
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const __m256i diff3 = _mm256_maddubs_epi16(src_ref3, adj_sub);
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const __m256i madd0 = _mm256_madd_epi16(diff0, diff0);
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const __m256i madd1 = _mm256_madd_epi16(diff1, diff1);
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const __m256i madd2 = _mm256_madd_epi16(diff2, diff2);
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const __m256i madd3 = _mm256_madd_epi16(diff3, diff3);
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src_ptr += source_stride;
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ref_ptr += recon_stride;
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// add to the running totals
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sum_reg = _mm256_add_epi16(sum_reg, _mm256_add_epi16(diff0, diff1));
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sum_reg = _mm256_add_epi16(sum_reg, _mm256_add_epi16(diff2, diff3));
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sse_reg = _mm256_add_epi32(sse_reg, _mm256_add_epi32(madd0, madd1));
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sse_reg = _mm256_add_epi32(sse_reg, _mm256_add_epi32(madd2, madd3));
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src_ptr += src_2strides;
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ref_ptr += ref_2strides;
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}
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{
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// 16 -> 32 sign extended
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const __m256i sum_lo =
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_mm256_srai_epi32(_mm256_unpacklo_epi16(zero_reg, sum_ref_src), 16);
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// 16 -> 32 sign extended
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const __m256i sum_hi =
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_mm256_srai_epi32(_mm256_unpackhi_epi16(zero_reg, sum_ref_src), 16);
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const __m256i sum_hl = _mm256_add_epi32(sum_lo, sum_hi);
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const __m256i madd_lo = _mm256_unpacklo_epi32(madd_ref_src, zero_reg);
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const __m256i madd_hi = _mm256_unpackhi_epi32(madd_ref_src, zero_reg);
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const __m256i madd = _mm256_add_epi32(madd_lo, madd_hi);
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const __m256i ex_sum_lo = _mm256_unpacklo_epi32(sum_hl, zero_reg);
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const __m256i ex_sum_hi = _mm256_unpackhi_epi32(sum_hl, zero_reg);
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const __m256i ex_sum = _mm256_add_epi32(ex_sum_lo, ex_sum_hi);
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// extract the low lane and add it to the high lane
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const __m128i sum_reg_128 = _mm_add_epi16(
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_mm256_castsi256_si128(sum_reg), _mm256_extractf128_si256(sum_reg, 1));
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const __m128i sse_reg_128 = _mm_add_epi32(
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_mm256_castsi256_si128(sse_reg), _mm256_extractf128_si256(sse_reg, 1));
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// shift 8 bytes eight
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madd_ref_src = _mm256_srli_si256(madd, 8);
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sum_ref_src = _mm256_srli_si256(ex_sum, 8);
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// sum upper and lower 64 bits together and convert up to 32 bit values
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const __m128i sum_reg_64 =
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_mm_add_epi16(sum_reg_128, _mm_srli_si128(sum_reg_128, 8));
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const __m128i sum_int32 = _mm_cvtepi16_epi32(sum_reg_64);
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madd_ref_src = _mm256_add_epi32(madd_ref_src, madd);
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sum_ref_src = _mm256_add_epi32(sum_ref_src, ex_sum);
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// unpack sse and sum registers and add
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const __m128i sse_sum_lo = _mm_unpacklo_epi32(sse_reg_128, sum_int32);
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const __m128i sse_sum_hi = _mm_unpackhi_epi32(sse_reg_128, sum_int32);
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const __m128i sse_sum = _mm_add_epi32(sse_sum_lo, sse_sum_hi);
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// extract the low lane and the high lane and add the results
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*((int *)sse) =
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_mm_cvtsi128_si32(_mm256_castsi256_si128(madd_ref_src)) +
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_mm_cvtsi128_si32(_mm256_extractf128_si256(madd_ref_src, 1));
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*((int *)sum) = _mm_cvtsi128_si32(_mm256_castsi256_si128(sum_ref_src)) +
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_mm_cvtsi128_si32(_mm256_extractf128_si256(sum_ref_src, 1));
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// perform the final summation and extract the results
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const __m128i res = _mm_add_epi32(sse_sum, _mm_srli_si128(sse_sum, 8));
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*((int *)sse) = _mm_cvtsi128_si32(res);
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*((int *)sum) = _mm_extract_epi32(res, 1);
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}
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}
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