Speed up h_predictor_8x8
Relocate the function from SSSE3 to SSE2, Unroll loop from 4 to 2, and reduce mem access to left. Speed up by >20% in ./test_intra_pred_speed. Change-Id: Ib9f1846819783b6e05e2a310c930eb844b2b4d2e
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@ -239,15 +239,16 @@ INTRA_PRED_TEST(C, TestIntraPred8, vpx_dc_predictor_8x8_c,
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#if HAVE_SSE2 && CONFIG_USE_X86INC
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#if HAVE_SSE2 && CONFIG_USE_X86INC
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INTRA_PRED_TEST(SSE2, TestIntraPred8, vpx_dc_predictor_8x8_sse2,
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INTRA_PRED_TEST(SSE2, TestIntraPred8, vpx_dc_predictor_8x8_sse2,
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vpx_dc_left_predictor_8x8_sse2, vpx_dc_top_predictor_8x8_sse2,
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vpx_dc_left_predictor_8x8_sse2, vpx_dc_top_predictor_8x8_sse2,
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vpx_dc_128_predictor_8x8_sse2, vpx_v_predictor_8x8_sse2, NULL,
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vpx_dc_128_predictor_8x8_sse2, vpx_v_predictor_8x8_sse2,
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NULL, NULL, NULL, NULL, NULL, NULL, vpx_tm_predictor_8x8_sse2)
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vpx_h_predictor_8x8_sse2, NULL, NULL, NULL, NULL, NULL,
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NULL, vpx_tm_predictor_8x8_sse2)
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#endif // HAVE_SSE2 && CONFIG_USE_X86INC
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#endif // HAVE_SSE2 && CONFIG_USE_X86INC
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#if HAVE_SSSE3 && CONFIG_USE_X86INC
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#if HAVE_SSSE3 && CONFIG_USE_X86INC
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INTRA_PRED_TEST(SSSE3, TestIntraPred8, NULL, NULL, NULL, NULL, NULL,
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INTRA_PRED_TEST(SSSE3, TestIntraPred8, NULL, NULL, NULL, NULL, NULL,
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vpx_h_predictor_8x8_ssse3, vpx_d45_predictor_8x8_ssse3, NULL,
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NULL, vpx_d45_predictor_8x8_ssse3, NULL, NULL,
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NULL, vpx_d153_predictor_8x8_ssse3,
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vpx_d153_predictor_8x8_ssse3, vpx_d207_predictor_8x8_ssse3,
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vpx_d207_predictor_8x8_ssse3, vpx_d63_predictor_8x8_ssse3, NULL)
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vpx_d63_predictor_8x8_ssse3, NULL)
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#endif // HAVE_SSSE3 && CONFIG_USE_X86INC
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#endif // HAVE_SSSE3 && CONFIG_USE_X86INC
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#if HAVE_DSPR2
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#if HAVE_DSPR2
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@ -130,7 +130,7 @@ add_proto qw/void vpx_d63e_predictor_8x8/, "uint8_t *dst, ptrdiff_t y_stride, co
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specialize qw/vpx_d63e_predictor_8x8/;
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specialize qw/vpx_d63e_predictor_8x8/;
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add_proto qw/void vpx_h_predictor_8x8/, "uint8_t *dst, ptrdiff_t y_stride, const uint8_t *above, const uint8_t *left";
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add_proto qw/void vpx_h_predictor_8x8/, "uint8_t *dst, ptrdiff_t y_stride, const uint8_t *above, const uint8_t *left";
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specialize qw/vpx_h_predictor_8x8 neon dspr2 msa/, "$ssse3_x86inc";
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specialize qw/vpx_h_predictor_8x8 neon dspr2 msa/, "$sse2_x86inc";
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add_proto qw/void vpx_d117_predictor_8x8/, "uint8_t *dst, ptrdiff_t y_stride, const uint8_t *above, const uint8_t *left";
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add_proto qw/void vpx_d117_predictor_8x8/, "uint8_t *dst, ptrdiff_t y_stride, const uint8_t *above, const uint8_t *left";
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specialize qw/vpx_d117_predictor_8x8/;
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specialize qw/vpx_d117_predictor_8x8/;
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@ -533,6 +533,29 @@ cglobal h_predictor_4x4, 2, 4, 4, dst, stride, line, left
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movd [dstq+strideq], m3
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movd [dstq+strideq], m3
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RET
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RET
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INIT_XMM sse2
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cglobal h_predictor_8x8, 2, 5, 3, dst, stride, line, left
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movifnidn leftq, leftmp
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mov lineq, -2
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DEFINE_ARGS dst, stride, line, left, stride3
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lea stride3q, [strideq*3]
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movq m0, [leftq ]
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punpcklbw m0, m0 ; l1 l1 l2 l2 ... l8 l8
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.loop:
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pshuflw m1, m0, 0x0 ; l1 l1 l1 l1 l1 l1 l1 l1
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pshuflw m2, m0, 0x55 ; l2 l2 l2 l2 l2 l2 l2 l2
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movq [dstq ], m1
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movq [dstq+strideq], m2
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pshuflw m1, m0, 0xaa
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pshuflw m2, m0, 0xff
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movq [dstq+strideq*2], m1
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movq [dstq+stride3q ], m2
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pshufd m0, m0, 0xe ; [63:0] l5 l5 l6 l6 l7 l7 l8 l8
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inc lineq
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lea dstq, [dstq+strideq*4]
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jnz .loop
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REP_RET
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INIT_XMM sse2
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INIT_XMM sse2
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cglobal tm_predictor_4x4, 4, 4, 5, dst, stride, above, left
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cglobal tm_predictor_4x4, 4, 4, 5, dst, stride, above, left
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pxor m1, m1
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pxor m1, m1
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@ -33,24 +33,6 @@ sh_b2333: db 2, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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SECTION .text
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SECTION .text
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INIT_MMX ssse3
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cglobal h_predictor_8x8, 2, 4, 3, dst, stride, line, left
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movifnidn leftq, leftmp
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add leftq, 8
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mov lineq, -4
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pxor m0, m0
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.loop:
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movd m1, [leftq+lineq*2 ]
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movd m2, [leftq+lineq*2+1]
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pshufb m1, m0
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pshufb m2, m0
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movq [dstq ], m1
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movq [dstq+strideq], m2
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lea dstq, [dstq+strideq*2]
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inc lineq
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jnz .loop
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REP_RET
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INIT_XMM ssse3
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INIT_XMM ssse3
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cglobal h_predictor_16x16, 2, 4, 3, dst, stride, line, left
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cglobal h_predictor_16x16, 2, 4, 3, dst, stride, line, left
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movifnidn leftq, leftmp
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movifnidn leftq, leftmp
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