Create sub8x8 block inter prediction function
Change-Id: Ib161e6fb3eb081f7176a1d969fed16a7d1ffc320
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@ -128,6 +128,53 @@ void build_inter_predictors(MACROBLOCKD *xd, int plane, int block,
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}
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}
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void vp10_build_inter_predictor_sub8x8(MACROBLOCKD *xd, int plane,
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int i, int ir, int ic,
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int mi_row, int mi_col) {
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struct macroblockd_plane *const pd = &xd->plane[plane];
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MODE_INFO *const mi = xd->mi[0];
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const BLOCK_SIZE plane_bsize = get_plane_block_size(mi->mbmi.sb_type, pd);
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const int width = 4 * num_4x4_blocks_wide_lookup[plane_bsize];
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const int height = 4 * num_4x4_blocks_high_lookup[plane_bsize];
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uint8_t *const dst = &pd->dst.buf[(ir * pd->dst.stride + ic) << 2];
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int ref;
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const int is_compound = has_second_ref(&mi->mbmi);
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const InterpKernel *kernel = vp10_filter_kernels[mi->mbmi.interp_filter];
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for (ref = 0; ref < 1 + is_compound; ++ref) {
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const uint8_t *pre =
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&pd->pre[ref].buf[(ir * pd->pre[ref].stride + ic) << 2];
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#if CONFIG_VP9_HIGHBITDEPTH
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if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH) {
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vp10_highbd_build_inter_predictor(pre, pd->pre[ref].stride,
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dst, pd->dst.stride,
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&mi->bmi[i].as_mv[ref].as_mv,
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&xd->block_refs[ref]->sf, width, height,
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ref, kernel, MV_PRECISION_Q3,
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mi_col * MI_SIZE + 4 * ic,
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mi_row * MI_SIZE + 4 * ir, xd->bd);
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} else {
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vp10_build_inter_predictor(pre, pd->pre[ref].stride,
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dst, pd->dst.stride,
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&mi->bmi[i].as_mv[ref].as_mv,
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&xd->block_refs[ref]->sf, width, height, ref,
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kernel, MV_PRECISION_Q3,
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mi_col * MI_SIZE + 4 * ic,
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mi_row * MI_SIZE + 4 * ir);
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}
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#else
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vp10_build_inter_predictor(pre, pd->pre[ref].stride,
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dst, pd->dst.stride,
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&mi->bmi[i].as_mv[ref].as_mv,
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&xd->block_refs[ref]->sf, width, height, ref,
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kernel, MV_PRECISION_Q3,
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mi_col * MI_SIZE + 4 * ic,
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mi_row * MI_SIZE + 4 * ir);
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#endif // CONFIG_VP9_HIGHBITDEPTH
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}
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}
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static void build_inter_predictors_for_planes(MACROBLOCKD *xd, BLOCK_SIZE bsize,
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int mi_row, int mi_col,
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int plane_from, int plane_to) {
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@ -131,6 +131,10 @@ void build_inter_predictors(MACROBLOCKD *xd, int plane, int block,
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int x, int y, int w, int h,
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int mi_x, int mi_y);
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void vp10_build_inter_predictor_sub8x8(MACROBLOCKD *xd, int plane,
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int i, int ir, int ic,
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int mi_row, int mi_col);
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void vp10_build_inter_predictors_sby(MACROBLOCKD *xd, int mi_row, int mi_col,
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BLOCK_SIZE bsize);
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@ -1273,6 +1273,7 @@ static int64_t encode_inter_mb_segment(VP10_COMP *cpi,
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int64_t *distortion, int64_t *sse,
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ENTROPY_CONTEXT *ta,
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ENTROPY_CONTEXT *tl,
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int ir, int ic,
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int mi_row, int mi_col) {
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int k;
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MACROBLOCKD *xd = &x->e_mbd;
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@ -1283,49 +1284,16 @@ static int64_t encode_inter_mb_segment(VP10_COMP *cpi,
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const int width = 4 * num_4x4_blocks_wide_lookup[plane_bsize];
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const int height = 4 * num_4x4_blocks_high_lookup[plane_bsize];
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int idx, idy;
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const uint8_t *const src =
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&p->src.buf[vp10_raster_block_offset(BLOCK_8X8, i, p->src.stride)];
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uint8_t *const dst = &pd->dst.buf[vp10_raster_block_offset(BLOCK_8X8, i,
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pd->dst.stride)];
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int64_t thisdistortion = 0, thissse = 0;
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int thisrate = 0, ref;
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int thisrate = 0;
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TX_TYPE tx_type = get_tx_type(PLANE_TYPE_Y, xd, i);
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const scan_order *so = get_scan(TX_4X4, tx_type);
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const int is_compound = has_second_ref(&mi->mbmi);
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const InterpKernel *kernel = vp10_filter_kernels[mi->mbmi.interp_filter];
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for (ref = 0; ref < 1 + is_compound; ++ref) {
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const uint8_t *pre = &pd->pre[ref].buf[vp10_raster_block_offset(BLOCK_8X8, i,
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pd->pre[ref].stride)];
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#if CONFIG_VP9_HIGHBITDEPTH
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if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH) {
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vp10_highbd_build_inter_predictor(pre, pd->pre[ref].stride,
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dst, pd->dst.stride,
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&mi->bmi[i].as_mv[ref].as_mv,
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&xd->block_refs[ref]->sf, width, height,
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ref, kernel, MV_PRECISION_Q3,
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mi_col * MI_SIZE + 4 * (i % 2),
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mi_row * MI_SIZE + 4 * (i / 2), xd->bd);
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} else {
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vp10_build_inter_predictor(pre, pd->pre[ref].stride,
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dst, pd->dst.stride,
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&mi->bmi[i].as_mv[ref].as_mv,
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&xd->block_refs[ref]->sf, width, height, ref,
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kernel, MV_PRECISION_Q3,
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mi_col * MI_SIZE + 4 * (i % 2),
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mi_row * MI_SIZE + 4 * (i / 2));
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}
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#else
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vp10_build_inter_predictor(pre, pd->pre[ref].stride,
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dst, pd->dst.stride,
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&mi->bmi[i].as_mv[ref].as_mv,
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&xd->block_refs[ref]->sf, width, height, ref,
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kernel, MV_PRECISION_Q3,
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mi_col * MI_SIZE + 4 * (i % 2),
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mi_row * MI_SIZE + 4 * (i / 2));
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#endif // CONFIG_VP9_HIGHBITDEPTH
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}
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vp10_build_inter_predictor_sub8x8(xd, 0, i, ir, ic, mi_row, mi_col);
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#if CONFIG_VP9_HIGHBITDEPTH
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if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH) {
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@ -1965,6 +1933,7 @@ static int64_t rd_pick_best_sub8x8_mode(VP10_COMP *cpi, MACROBLOCK *x,
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&bsi->rdstat[i][mode_idx].bsse,
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bsi->rdstat[i][mode_idx].ta,
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bsi->rdstat[i][mode_idx].tl,
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idy, idx,
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mi_row, mi_col);
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if (bsi->rdstat[i][mode_idx].brdcost < INT64_MAX) {
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bsi->rdstat[i][mode_idx].brdcost += RDCOST(x->rdmult, x->rddiv,
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