Merge "Support building AVX-512 and implement sadx4 for AVX-512"
This commit is contained in:
commit
cf8039c25f
@ -139,6 +139,8 @@ $(BUILD_PFX)%_avx.c.d: CFLAGS += -mavx
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$(BUILD_PFX)%_avx.c.o: CFLAGS += -mavx
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$(BUILD_PFX)%_avx2.c.d: CFLAGS += -mavx2
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$(BUILD_PFX)%_avx2.c.o: CFLAGS += -mavx2
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$(BUILD_PFX)%_avx512.c.d: CFLAGS += -mavx512f -mavx512cd -mavx512bw -mavx512dq -mavx512vl
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$(BUILD_PFX)%_avx512.c.o: CFLAGS += -mavx512f -mavx512cd -mavx512bw -mavx512dq -mavx512vl
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# POWER
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$(BUILD_PFX)%_vsx.c.d: CFLAGS += -maltivec -mvsx
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@ -403,6 +403,23 @@ check_gcc_machine_option() {
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fi
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}
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# tests for -m$2, -m$3, -m$4... toggling the feature given in $1.
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check_gcc_machine_options() {
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feature="$1"
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shift
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flags="-m$1"
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shift
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for opt in $*; do
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flags="$flags -m$opt"
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done
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if enabled gcc && ! disabled "$feature" && ! check_cflags $flags; then
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RTCD_OPTIONS="${RTCD_OPTIONS}--disable-$feature "
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else
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soft_enable "$feature"
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fi
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}
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write_common_config_banner() {
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print_webm_license config.mk "##" ""
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echo '# This file automatically generated by configure. Do not edit!' >> config.mk
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@ -1237,6 +1254,13 @@ EOF
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AS=msvs
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msvs_arch_dir=x86-msvs
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vc_version=${tgt_cc##vs}
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case $vc_version in
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7|8|9|10|11|12|13|14)
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echo "${tgt_cc} does not support avx512, disabling....."
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RTCD_OPTIONS="${RTCD_OPTIONS}--disable-avx512 "
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soft_disable avx512
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;;
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esac
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case $vc_version in
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7|8|9|10)
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echo "${tgt_cc} does not support avx/avx2, disabling....."
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@ -1281,8 +1305,12 @@ EOF
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elif disabled $ext; then
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disable_exts="yes"
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else
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# use the shortened version for the flag: sse4_1 -> sse4
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check_gcc_machine_option ${ext%_*} $ext
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if [ "$ext" = "avx512" ]; then
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check_gcc_machine_options $ext avx512f avx512cd avx512bw avx512dq avx512vl
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else
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# use the shortened version for the flag: sse4_1 -> sse4
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check_gcc_machine_option ${ext%_*} $ext
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fi
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fi
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done
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@ -391,10 +391,10 @@ EOF
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&require("c");
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if ($opts{arch} eq 'x86') {
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@ALL_ARCHS = filter(qw/mmx sse sse2 sse3 ssse3 sse4_1 avx avx2/);
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@ALL_ARCHS = filter(qw/mmx sse sse2 sse3 ssse3 sse4_1 avx avx2 avx512/);
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x86;
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} elsif ($opts{arch} eq 'x86_64') {
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@ALL_ARCHS = filter(qw/mmx sse sse2 sse3 ssse3 sse4_1 avx avx2/);
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@ALL_ARCHS = filter(qw/mmx sse sse2 sse3 ssse3 sse4_1 avx avx2 avx512/);
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@REQUIRES = filter(keys %required ? keys %required : qw/mmx sse sse2/);
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&require(@REQUIRES);
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x86;
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1
configure
vendored
1
configure
vendored
@ -244,6 +244,7 @@ ARCH_EXT_LIST_X86="
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sse4_1
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avx
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avx2
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avx512
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"
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ARCH_EXT_LIST_LOONGSON="
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@ -896,6 +896,14 @@ const SadMxNx4Param x4d_avx2_tests[] = {
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INSTANTIATE_TEST_CASE_P(AVX2, SADx4Test, ::testing::ValuesIn(x4d_avx2_tests));
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#endif // HAVE_AVX2
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#if HAVE_AVX512
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const SadMxNx4Param x4d_avx512_tests[] = {
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SadMxNx4Param(64, 64, &vpx_sad64x64x4d_avx512),
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};
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INSTANTIATE_TEST_CASE_P(AVX512, SADx4Test,
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::testing::ValuesIn(x4d_avx512_tests));
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#endif // HAVE_AVX512
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//------------------------------------------------------------------------------
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// MIPS functions
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#if HAVE_MSA
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@ -53,6 +53,9 @@ int main(int argc, char **argv) {
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}
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if (!(simd_caps & HAS_AVX)) append_negative_gtest_filter(":AVX.*:AVX/*");
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if (!(simd_caps & HAS_AVX2)) append_negative_gtest_filter(":AVX2.*:AVX2/*");
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if (!(simd_caps & HAS_AVX512)) {
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append_negative_gtest_filter(":AVX512.*:AVX512/*");
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}
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#endif // ARCH_X86 || ARCH_X86_64
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#if !CONFIG_SHARED
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@ -30,6 +30,7 @@ if ($opts{arch} eq "x86_64") {
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$ssse3_x86_64 = 'ssse3';
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$avx_x86_64 = 'avx';
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$avx2_x86_64 = 'avx2';
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$avx512_x86_64 = 'avx512';
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}
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#
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@ -327,6 +327,7 @@ DSP_SRCS-$(HAVE_SSSE3) += x86/sad_ssse3.asm
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DSP_SRCS-$(HAVE_SSE4_1) += x86/sad_sse4.asm
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DSP_SRCS-$(HAVE_AVX2) += x86/sad4d_avx2.c
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DSP_SRCS-$(HAVE_AVX2) += x86/sad_avx2.c
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DSP_SRCS-$(HAVE_AVX512) += x86/sad4d_avx512.c
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DSP_SRCS-$(HAVE_SSE) += x86/sad4d_sse2.asm
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DSP_SRCS-$(HAVE_SSE) += x86/sad_sse2.asm
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@ -20,6 +20,7 @@ if ($opts{arch} eq "x86_64") {
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$ssse3_x86_64 = 'ssse3';
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$avx_x86_64 = 'avx';
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$avx2_x86_64 = 'avx2';
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$avx512_x86_64 = 'avx512';
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}
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#
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@ -872,7 +873,7 @@ specialize qw/vpx_sad4x4x8 sse4_1 msa mmi/;
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# Multi-block SAD, comparing a reference to N independent blocks
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#
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add_proto qw/void vpx_sad64x64x4d/, "const uint8_t *src_ptr, int src_stride, const uint8_t * const ref_ptr[], int ref_stride, uint32_t *sad_array";
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specialize qw/vpx_sad64x64x4d avx2 neon msa sse2 vsx mmi/;
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specialize qw/vpx_sad64x64x4d avx512 avx2 neon msa sse2 vsx mmi/;
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add_proto qw/void vpx_sad64x32x4d/, "const uint8_t *src_ptr, int src_stride, const uint8_t * const ref_ptr[], int ref_stride, uint32_t *sad_array";
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specialize qw/vpx_sad64x32x4d neon msa sse2 vsx mmi/;
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83
vpx_dsp/x86/sad4d_avx512.c
Normal file
83
vpx_dsp/x86/sad4d_avx512.c
Normal file
@ -0,0 +1,83 @@
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/*
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* Copyright (c) 2017 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <immintrin.h> // AVX512
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#include "./vpx_dsp_rtcd.h"
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#include "vpx/vpx_integer.h"
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void vpx_sad64x64x4d_avx512(const uint8_t *src, int src_stride,
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const uint8_t *const ref[4], int ref_stride,
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uint32_t res[4]) {
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__m512i src_reg, ref0_reg, ref1_reg, ref2_reg, ref3_reg;
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__m512i sum_ref0, sum_ref1, sum_ref2, sum_ref3;
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__m512i sum_mlow, sum_mhigh;
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int i;
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const uint8_t *ref0, *ref1, *ref2, *ref3;
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ref0 = ref[0];
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ref1 = ref[1];
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ref2 = ref[2];
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ref3 = ref[3];
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sum_ref0 = _mm512_set1_epi16(0);
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sum_ref1 = _mm512_set1_epi16(0);
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sum_ref2 = _mm512_set1_epi16(0);
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sum_ref3 = _mm512_set1_epi16(0);
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for (i = 0; i < 64; i++) {
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// load src and all refs
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src_reg = _mm512_loadu_si512((const __m512i *)src);
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ref0_reg = _mm512_loadu_si512((const __m512i *)ref0);
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ref1_reg = _mm512_loadu_si512((const __m512i *)ref1);
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ref2_reg = _mm512_loadu_si512((const __m512i *)ref2);
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ref3_reg = _mm512_loadu_si512((const __m512i *)ref3);
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// sum of the absolute differences between every ref-i to src
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ref0_reg = _mm512_sad_epu8(ref0_reg, src_reg);
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ref1_reg = _mm512_sad_epu8(ref1_reg, src_reg);
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ref2_reg = _mm512_sad_epu8(ref2_reg, src_reg);
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ref3_reg = _mm512_sad_epu8(ref3_reg, src_reg);
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// sum every ref-i
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sum_ref0 = _mm512_add_epi32(sum_ref0, ref0_reg);
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sum_ref1 = _mm512_add_epi32(sum_ref1, ref1_reg);
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sum_ref2 = _mm512_add_epi32(sum_ref2, ref2_reg);
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sum_ref3 = _mm512_add_epi32(sum_ref3, ref3_reg);
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src += src_stride;
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ref0 += ref_stride;
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ref1 += ref_stride;
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ref2 += ref_stride;
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ref3 += ref_stride;
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}
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{
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__m256i sum256;
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__m128i sum128;
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// in sum_ref-i the result is saved in the first 4 bytes
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// the other 4 bytes are zeroed.
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// sum_ref1 and sum_ref3 are shifted left by 4 bytes
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sum_ref1 = _mm512_bslli_epi128(sum_ref1, 4);
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sum_ref3 = _mm512_bslli_epi128(sum_ref3, 4);
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// merge sum_ref0 and sum_ref1 also sum_ref2 and sum_ref3
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sum_ref0 = _mm512_or_si512(sum_ref0, sum_ref1);
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sum_ref2 = _mm512_or_si512(sum_ref2, sum_ref3);
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// merge every 64 bit from each sum_ref-i
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sum_mlow = _mm512_unpacklo_epi64(sum_ref0, sum_ref2);
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sum_mhigh = _mm512_unpackhi_epi64(sum_ref0, sum_ref2);
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// add the low 64 bit to the high 64 bit
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sum_mlow = _mm512_add_epi32(sum_mlow, sum_mhigh);
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// add the low 128 bit to the high 128 bit
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sum256 = _mm256_add_epi32(_mm512_castsi512_si256(sum_mlow),
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_mm512_extracti32x8_epi32(sum_mlow, 1));
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sum128 = _mm_add_epi32(_mm256_castsi256_si128(sum256),
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_mm256_extractf128_si256(sum256, 1));
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_mm_storeu_si128((__m128i *)(res), sum128);
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}
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}
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#endif
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#endif
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#define HAS_MMX 0x01
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#define HAS_SSE 0x02
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#define HAS_SSE2 0x04
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#define HAS_SSE3 0x08
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#define HAS_SSSE3 0x10
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#define HAS_SSE4_1 0x20
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#define HAS_AVX 0x40
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#define HAS_AVX2 0x80
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#define HAS_MMX 0x001
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#define HAS_SSE 0x002
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#define HAS_SSE2 0x004
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#define HAS_SSE3 0x008
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#define HAS_SSSE3 0x010
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#define HAS_SSE4_1 0x020
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#define HAS_AVX 0x040
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#define HAS_AVX2 0x080
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#define HAS_AVX512 0x100
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#ifndef BIT
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#define BIT(n) (1 << n)
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#define BIT(n) (1u << n)
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#endif
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static INLINE int x86_simd_caps(void) {
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@ -209,6 +210,12 @@ static INLINE int x86_simd_caps(void) {
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cpuid(7, 0, reg_eax, reg_ebx, reg_ecx, reg_edx);
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if (reg_ebx & BIT(5)) flags |= HAS_AVX2;
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// bits 16 (AVX-512F) & 17 (AVX-512DQ) & 28 (AVX-512CD) &
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// 30 (AVX-512BW) & 32 (AVX-512VL)
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if ((reg_ebx & (BIT(16) | BIT(17) | BIT(28) | BIT(30) | BIT(31))) ==
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(BIT(16) | BIT(17) | BIT(28) | BIT(30) | BIT(31)))
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flags |= HAS_AVX512;
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}
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}
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}
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