Merge changes I267050a5,Iebade0ef,Id96a8df3
* changes: quantize_fp_32x32 highbd ssse3: enable existing function quantize_fp highbd ssse3: use tran_low_t for coeff quantize_fp highbd sse2: use tran_low_t for coeff
This commit is contained in:
commit
cc43012674
@ -136,9 +136,10 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") {
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specialize qw/vp9_block_error_fp sse2/;
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add_proto qw/void vp9_quantize_fp/, "const tran_low_t *coeff_ptr, intptr_t n_coeffs, int skip_block, const int16_t *zbin_ptr, const int16_t *round_ptr, const int16_t *quant_ptr, const int16_t *quant_shift_ptr, tran_low_t *qcoeff_ptr, tran_low_t *dqcoeff_ptr, const int16_t *dequant_ptr, uint16_t *eob_ptr, const int16_t *scan, const int16_t *iscan";
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specialize qw/vp9_quantize_fp neon/;
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specialize qw/vp9_quantize_fp neon sse2/, "$ssse3_x86_64";
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add_proto qw/void vp9_quantize_fp_32x32/, "const tran_low_t *coeff_ptr, intptr_t n_coeffs, int skip_block, const int16_t *zbin_ptr, const int16_t *round_ptr, const int16_t *quant_ptr, const int16_t *quant_shift_ptr, tran_low_t *qcoeff_ptr, tran_low_t *dqcoeff_ptr, const int16_t *dequant_ptr, uint16_t *eob_ptr, const int16_t *scan, const int16_t *iscan";
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specialize qw/vp9_quantize_fp_32x32/, "$ssse3_x86_64";
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add_proto qw/void vp9_fdct8x8_quant/, "const int16_t *input, int stride, tran_low_t *coeff_ptr, intptr_t n_coeffs, int skip_block, const int16_t *zbin_ptr, const int16_t *round_ptr, const int16_t *quant_ptr, const int16_t *quant_shift_ptr, tran_low_t *qcoeff_ptr, tran_low_t *dqcoeff_ptr, const int16_t *dequant_ptr, uint16_t *eob_ptr, const int16_t *scan, const int16_t *iscan";
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specialize qw/vp9_fdct8x8_quant neon ssse3/;
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@ -13,14 +13,16 @@
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#include "./vp9_rtcd.h"
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#include "vpx/vpx_integer.h"
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#include "vpx_dsp/vpx_dsp_common.h"
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#include "vpx_dsp/x86/bitdepth_conversion_sse2.h"
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void vp9_quantize_fp_sse2(const int16_t *coeff_ptr, intptr_t n_coeffs,
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void vp9_quantize_fp_sse2(const tran_low_t *coeff_ptr, intptr_t n_coeffs,
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int skip_block, const int16_t *zbin_ptr,
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const int16_t *round_ptr, const int16_t *quant_ptr,
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const int16_t *quant_shift_ptr, int16_t *qcoeff_ptr,
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int16_t *dqcoeff_ptr, const int16_t *dequant_ptr,
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uint16_t *eob_ptr, const int16_t *scan_ptr,
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const int16_t *iscan_ptr) {
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const int16_t *quant_shift_ptr,
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tran_low_t *qcoeff_ptr, tran_low_t *dqcoeff_ptr,
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const int16_t *dequant_ptr, uint16_t *eob_ptr,
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const int16_t *scan_ptr, const int16_t *iscan_ptr) {
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__m128i zero;
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__m128i thr;
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int16_t nzflag;
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@ -53,8 +55,8 @@ void vp9_quantize_fp_sse2(const int16_t *coeff_ptr, intptr_t n_coeffs,
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__m128i qcoeff0, qcoeff1;
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__m128i qtmp0, qtmp1;
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// Do DC and first 15 AC
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coeff0 = _mm_load_si128((const __m128i *)(coeff_ptr + n_coeffs));
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coeff1 = _mm_load_si128((const __m128i *)(coeff_ptr + n_coeffs) + 1);
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coeff0 = load_tran_low(coeff_ptr + n_coeffs);
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coeff1 = load_tran_low(coeff_ptr + n_coeffs + 8);
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// Poor man's sign extract
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coeff0_sign = _mm_srai_epi16(coeff0, 15);
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@ -77,15 +79,15 @@ void vp9_quantize_fp_sse2(const int16_t *coeff_ptr, intptr_t n_coeffs,
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qcoeff0 = _mm_sub_epi16(qcoeff0, coeff0_sign);
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qcoeff1 = _mm_sub_epi16(qcoeff1, coeff1_sign);
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_mm_store_si128((__m128i *)(qcoeff_ptr + n_coeffs), qcoeff0);
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_mm_store_si128((__m128i *)(qcoeff_ptr + n_coeffs) + 1, qcoeff1);
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store_tran_low(qcoeff0, qcoeff_ptr + n_coeffs);
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store_tran_low(qcoeff1, qcoeff_ptr + n_coeffs + 8);
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coeff0 = _mm_mullo_epi16(qcoeff0, dequant);
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dequant = _mm_unpackhi_epi64(dequant, dequant);
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coeff1 = _mm_mullo_epi16(qcoeff1, dequant);
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_mm_store_si128((__m128i *)(dqcoeff_ptr + n_coeffs), coeff0);
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_mm_store_si128((__m128i *)(dqcoeff_ptr + n_coeffs) + 1, coeff1);
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store_tran_low(coeff0, dqcoeff_ptr + n_coeffs);
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store_tran_low(coeff1, dqcoeff_ptr + n_coeffs + 8);
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}
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{
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@ -120,8 +122,8 @@ void vp9_quantize_fp_sse2(const int16_t *coeff_ptr, intptr_t n_coeffs,
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__m128i qcoeff0, qcoeff1;
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__m128i qtmp0, qtmp1;
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coeff0 = _mm_load_si128((const __m128i *)(coeff_ptr + n_coeffs));
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coeff1 = _mm_load_si128((const __m128i *)(coeff_ptr + n_coeffs) + 1);
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coeff0 = load_tran_low(coeff_ptr + n_coeffs);
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coeff1 = load_tran_low(coeff_ptr + n_coeffs + 8);
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// Poor man's sign extract
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coeff0_sign = _mm_srai_epi16(coeff0, 15);
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@ -146,20 +148,20 @@ void vp9_quantize_fp_sse2(const int16_t *coeff_ptr, intptr_t n_coeffs,
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qcoeff0 = _mm_sub_epi16(qcoeff0, coeff0_sign);
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qcoeff1 = _mm_sub_epi16(qcoeff1, coeff1_sign);
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_mm_store_si128((__m128i *)(qcoeff_ptr + n_coeffs), qcoeff0);
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_mm_store_si128((__m128i *)(qcoeff_ptr + n_coeffs) + 1, qcoeff1);
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store_tran_low(qcoeff0, qcoeff_ptr + n_coeffs);
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store_tran_low(qcoeff1, qcoeff_ptr + n_coeffs + 8);
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coeff0 = _mm_mullo_epi16(qcoeff0, dequant);
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coeff1 = _mm_mullo_epi16(qcoeff1, dequant);
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_mm_store_si128((__m128i *)(dqcoeff_ptr + n_coeffs), coeff0);
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_mm_store_si128((__m128i *)(dqcoeff_ptr + n_coeffs) + 1, coeff1);
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store_tran_low(coeff0, dqcoeff_ptr + n_coeffs);
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store_tran_low(coeff1, dqcoeff_ptr + n_coeffs + 8);
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} else {
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_mm_store_si128((__m128i *)(qcoeff_ptr + n_coeffs), zero);
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_mm_store_si128((__m128i *)(qcoeff_ptr + n_coeffs) + 1, zero);
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store_zero_tran_low(qcoeff_ptr + n_coeffs);
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store_zero_tran_low(qcoeff_ptr + n_coeffs + 8);
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_mm_store_si128((__m128i *)(dqcoeff_ptr + n_coeffs), zero);
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_mm_store_si128((__m128i *)(dqcoeff_ptr + n_coeffs) + 1, zero);
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store_zero_tran_low(dqcoeff_ptr + n_coeffs);
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store_zero_tran_low(dqcoeff_ptr + n_coeffs + 8);
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}
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}
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@ -199,10 +201,11 @@ void vp9_quantize_fp_sse2(const int16_t *coeff_ptr, intptr_t n_coeffs,
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}
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} else {
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do {
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_mm_store_si128((__m128i *)(dqcoeff_ptr + n_coeffs), zero);
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_mm_store_si128((__m128i *)(dqcoeff_ptr + n_coeffs) + 1, zero);
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_mm_store_si128((__m128i *)(qcoeff_ptr + n_coeffs), zero);
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_mm_store_si128((__m128i *)(qcoeff_ptr + n_coeffs) + 1, zero);
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store_zero_tran_low(qcoeff_ptr + n_coeffs);
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store_zero_tran_low(qcoeff_ptr + n_coeffs + 8);
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store_zero_tran_low(dqcoeff_ptr + n_coeffs);
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store_zero_tran_low(dqcoeff_ptr + n_coeffs + 8);
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n_coeffs += 8 * 2;
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} while (n_coeffs < 0);
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*eob_ptr = 0;
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@ -11,6 +11,7 @@
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%define private_prefix vp9
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%include "third_party/x86inc/x86inc.asm"
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%include "vpx_dsp/x86/bitdepth_conversion_sse2.asm"
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SECTION_RODATA
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pw_1: times 8 dw 1
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@ -48,15 +49,15 @@ cglobal quantize_%1, 0, %2, 15, coeff, ncoeff, skip, zbin, round, quant, \
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%endif
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pxor m5, m5 ; m5 = dedicated zero
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lea coeffq, [ coeffq+ncoeffq*2]
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lea r5q, [ r5q+ncoeffq*2]
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lea r3q, [ r3q+ncoeffq*2]
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lea r4q, [r4q+ncoeffq*2]
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INCREMENT_ELEMENTS_TRAN_LOW coeffq, ncoeffq
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lea r5q, [r5q+ncoeffq*2]
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INCREMENT_ELEMENTS_TRAN_LOW r3q, ncoeffq
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INCREMENT_ELEMENTS_TRAN_LOW r4q, ncoeffq
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neg ncoeffq
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; get DC and first 15 AC coeffs
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mova m9, [ coeffq+ncoeffq*2+ 0] ; m9 = c[i]
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mova m10, [ coeffq+ncoeffq*2+16] ; m10 = c[i]
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LOAD_TRAN_LOW 9, coeffq, ncoeffq ; m9 = c[i]
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LOAD_TRAN_LOW 10, coeffq, ncoeffq + 8 ; m10 = c[i]
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pabsw m6, m9 ; m6 = abs(m9)
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pabsw m11, m10 ; m11 = abs(m10)
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pcmpeqw m7, m7
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@ -69,8 +70,8 @@ cglobal quantize_%1, 0, %2, 15, coeff, ncoeff, skip, zbin, round, quant, \
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pmulhw m13, m11, m2 ; m13 = m11*q>>16
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psignw m8, m9 ; m8 = reinsert sign
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psignw m13, m10 ; m13 = reinsert sign
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mova [r3q+ncoeffq*2+ 0], m8
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mova [r3q+ncoeffq*2+16], m13
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STORE_TRAN_LOW 8, r3q, ncoeffq, 6, 11, 12
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STORE_TRAN_LOW 13, r3q, ncoeffq + 8, 6, 11, 12
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%ifidn %1, fp_32x32
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pabsw m8, m8
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pabsw m13, m13
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@ -87,8 +88,8 @@ cglobal quantize_%1, 0, %2, 15, coeff, ncoeff, skip, zbin, round, quant, \
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%else
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psrlw m0, m3, 1
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%endif
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mova [r4q+ncoeffq*2+ 0], m8
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mova [r4q+ncoeffq*2+16], m13
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STORE_TRAN_LOW 8, r4q, ncoeffq, 6, 11, 12
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STORE_TRAN_LOW 13, r4q, ncoeffq + 8, 6, 11, 12
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pcmpeqw m8, m5 ; m8 = c[i] == 0
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pcmpeqw m13, m5 ; m13 = c[i] == 0
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mova m6, [ r5q+ncoeffq*2+ 0] ; m6 = scan[i]
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@ -102,8 +103,8 @@ cglobal quantize_%1, 0, %2, 15, coeff, ncoeff, skip, zbin, round, quant, \
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jz .accumulate_eob
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.ac_only_loop:
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mova m9, [ coeffq+ncoeffq*2+ 0] ; m9 = c[i]
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mova m10, [ coeffq+ncoeffq*2+16] ; m10 = c[i]
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LOAD_TRAN_LOW 9, coeffq, ncoeffq ; m9 = c[i]
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LOAD_TRAN_LOW 10, coeffq, ncoeffq + 8 ; m10 = c[i]
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pabsw m6, m9 ; m6 = abs(m9)
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pabsw m11, m10 ; m11 = abs(m10)
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@ -123,8 +124,8 @@ cglobal quantize_%1, 0, %2, 15, coeff, ncoeff, skip, zbin, round, quant, \
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pmulhw m13, m11, m2 ; m13 = m11*q>>16
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psignw m14, m9 ; m14 = reinsert sign
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psignw m13, m10 ; m13 = reinsert sign
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mova [r3q+ncoeffq*2+ 0], m14
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mova [r3q+ncoeffq*2+16], m13
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STORE_TRAN_LOW 14, r3q, ncoeffq, 6, 11, 12
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STORE_TRAN_LOW 13, r3q, ncoeffq + 8, 6, 11, 12
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%ifidn %1, fp_32x32
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pabsw m14, m14
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pabsw m13, m13
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@ -137,8 +138,8 @@ cglobal quantize_%1, 0, %2, 15, coeff, ncoeff, skip, zbin, round, quant, \
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psignw m14, m9
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psignw m13, m10
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%endif
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mova [r4q+ncoeffq*2+ 0], m14
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mova [r4q+ncoeffq*2+16], m13
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STORE_TRAN_LOW 14, r4q, ncoeffq, 6, 11, 12
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STORE_TRAN_LOW 13, r4q, ncoeffq + 8, 6, 11, 12
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pcmpeqw m14, m5 ; m14 = c[i] == 0
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pcmpeqw m13, m5 ; m13 = c[i] == 0
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mova m6, [ r5q+ncoeffq*2+ 0] ; m6 = scan[i]
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@ -154,10 +155,10 @@ cglobal quantize_%1, 0, %2, 15, coeff, ncoeff, skip, zbin, round, quant, \
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jmp .accumulate_eob
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.skip_iter:
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mova [r3q+ncoeffq*2+ 0], m5
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mova [r3q+ncoeffq*2+16], m5
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mova [r4q+ncoeffq*2+ 0], m5
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mova [r4q+ncoeffq*2+16], m5
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STORE_ZERO_TRAN_LOW 5, r3q, ncoeffq
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STORE_ZERO_TRAN_LOW 5, r3q, ncoeffq + 8
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STORE_ZERO_TRAN_LOW 5, r4q, ncoeffq
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STORE_ZERO_TRAN_LOW 5, r4q, ncoeffq + 8
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add ncoeffq, mmsize
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jl .ac_only_loop
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@ -186,10 +187,10 @@ cglobal quantize_%1, 0, %2, 15, coeff, ncoeff, skip, zbin, round, quant, \
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neg ncoeffq
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pxor m7, m7
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.blank_loop:
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mova [r0q+ncoeffq*2+ 0], m7
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mova [r0q+ncoeffq*2+16], m7
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mova [r2q+ncoeffq*2+ 0], m7
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mova [r2q+ncoeffq*2+16], m7
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STORE_ZERO_TRAN_LOW 7, r0q, ncoeffq
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STORE_ZERO_TRAN_LOW 7, r0q, ncoeffq + 8
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STORE_ZERO_TRAN_LOW 7, r2q, ncoeffq
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STORE_ZERO_TRAN_LOW 7, r2q, ncoeffq + 8
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add ncoeffq, mmsize
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jl .blank_loop
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mov word [r3q], 0
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@ -38,29 +38,53 @@
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; the values down to 16 bits.
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%macro LOAD_TRAN_LOW 3
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%if CONFIG_VP9_HIGHBITDEPTH
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mova m%1, [%2 + %3 * 4]
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packssdw m%1, [%2 + %3 * 4 + 16]
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mova m%1, [%2 + (%3) * 4]
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packssdw m%1, [%2 + (%3) * 4 + 16]
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%else
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mova m%1, [%2 + %3 * 2]
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mova m%1, [%2 + (%3) * 2]
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%endif
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%endmacro
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; Store m%1 to %2 + %3.
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; %3 is the offset in elements, not bytes.
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; If 5 arguments are provided then m%1 is corrupted.
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; If 6 arguments are provided then m%1 is preserved.
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; If tran_low_t is 16 bits (low bit depth configuration) then store the value
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; directly. If tran_low_t is 32 bits (high bit depth configuration) then sign
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; extend the values first.
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; Uses m%4-m%6 as scratch registers for high bit depth.
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%macro STORE_TRAN_LOW 5
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%macro STORE_TRAN_LOW 5-6
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%if CONFIG_VP9_HIGHBITDEPTH
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pxor m%4, m%4
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mova m%5, m%1
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%if %0 == 6
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mova m%6, m%1
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%endif
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pcmpgtw m%4, m%1
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punpcklwd m%5, m%4
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%if %0 == 5
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punpckhwd m%1, m%4
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mova [%2 + %3 * 4 + 0], m%5
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mova [%2 + %3 * 4 + 16], m%1
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%else
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punpckhwd m%6, m%4
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%endif
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mova [%2 + (%3) * 4 + 0], m%5
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%if %0 == 5
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mova [%2 + (%3) * 4 + 16], m%1
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%else
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mova [%2 + (%3) * 4 + 16], m%6
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%endif
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%else
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mova [%2 + %3 * 2], m%1
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mova [%2 + (%3) * 2], m%1
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%endif
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%endmacro
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; Store zeros (in m%1) to %2 + %3.
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; %3 is the offset in elements, not bytes.
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%macro STORE_ZERO_TRAN_LOW 3
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%if CONFIG_VP9_HIGHBITDEPTH
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mova [%2 + (%3) * 4 + 0], m%1
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mova [%2 + (%3) * 4 + 16], m%1
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%else
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mova [%2 + (%3) * 2], m%1
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%endif
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%endmacro
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