Enable arbitrary tile size support
This commit allows the encoder to process tile coding per 64x64 block. The supported upper limit of tile resolution is the minimum of frame size and 4096 in each dimension. To turn on, set --experiment --row-tile and compile. It overwrite the old --tile-columns and --tile-rows configurations. These two parameters now tell the encoder the width and height of tile in the unit of 64x64 block. For example, --tile-columns=1 --tile-rows=1 will make a tile contains a single 64x64 block. Change-Id: Id515749a05cfeb9e9d008291b76bdfb720de0948
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@ -1862,6 +1862,27 @@ static void setup_frame_size_with_refs(VP9_COMMON *cm,
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}
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static void setup_tile_info(VP9_COMMON *cm, struct vp9_read_bit_buffer *rb) {
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#if CONFIG_ROW_TILE
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cm->tile_width = vp9_rb_read_literal(rb, 6);
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cm->tile_height = vp9_rb_read_literal(rb, 6);
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cm->tile_width = clamp(cm->tile_width,
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1, 64) << MI_BLOCK_SIZE_LOG2;
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cm->tile_height = clamp(cm->tile_height,
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1, 64) << MI_BLOCK_SIZE_LOG2;
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cm->tile_width = MIN(cm->tile_width, cm->mi_cols);
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cm->tile_height = MIN(cm->tile_height, cm->mi_rows);
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// Get tile numbers
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cm->tile_cols = 1;
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while (cm->tile_cols * cm->tile_width < cm->mi_cols)
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++cm->tile_cols;
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cm->tile_rows = 1;
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while (cm->tile_rows * cm->tile_height < cm->mi_rows)
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++cm->tile_rows;
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#else
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int min_log2_tiles, max_log2_tiles, max_ones;
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vp9_get_tile_n_bits(cm->mi_cols, &min_log2_tiles, &max_log2_tiles);
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@ -1876,21 +1897,9 @@ static void setup_tile_info(VP9_COMMON *cm, struct vp9_read_bit_buffer *rb) {
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"Invalid number of tile columns");
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// rows
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#if CONFIG_ROW_TILE
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vp9_get_tile_n_bits(cm->mi_rows, &min_log2_tiles, &max_log2_tiles);
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max_ones = max_log2_tiles - min_log2_tiles;
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cm->log2_tile_rows = min_log2_tiles;
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while (max_ones-- && vp9_rb_read_bit(rb))
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++cm->log2_tile_rows;
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if (cm->log2_tile_rows > 10)
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vpx_internal_error(&cm->error, VPX_CODEC_CORRUPT_FRAME,
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"Invalid number of tile rows");
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#else
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cm->log2_tile_rows = vp9_rb_read_bit(rb);
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if (cm->log2_tile_rows)
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cm->log2_tile_rows += vp9_rb_read_bit(rb);
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#endif
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cm->tile_cols = 1 << cm->log2_tile_cols;
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cm->tile_rows = 1 << cm->log2_tile_rows;
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@ -1900,6 +1909,7 @@ static void setup_tile_info(VP9_COMMON *cm, struct vp9_read_bit_buffer *rb) {
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// round to integer multiples of 8
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cm->tile_width = mi_cols_aligned_to_sb(cm->tile_width);
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cm->tile_height = mi_cols_aligned_to_sb(cm->tile_height);
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#endif
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}
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// Reads the next tile returning its size and adjusting '*data' accordingly
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@ -1866,6 +1866,13 @@ static void fix_interp_filter(VP9_COMMON *cm) {
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static void write_tile_info(const VP9_COMMON *const cm,
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struct vp9_write_bit_buffer *wb) {
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#if CONFIG_ROW_TILE
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int tile_width = mi_cols_aligned_to_sb(cm->tile_width) >> MI_BLOCK_SIZE_LOG2;
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int tile_height =
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mi_cols_aligned_to_sb(cm->tile_height) >> MI_BLOCK_SIZE_LOG2;
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vp9_wb_write_literal(wb, tile_width, 6);
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vp9_wb_write_literal(wb, tile_height, 6);
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#else
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int min_log2_tiles, max_log2_tiles, ones;
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vp9_get_tile_n_bits(cm->mi_cols, &min_log2_tiles, &max_log2_tiles);
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@ -1878,15 +1885,6 @@ static void write_tile_info(const VP9_COMMON *const cm,
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vp9_wb_write_bit(wb, 0);
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// rows
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#if CONFIG_ROW_TILE
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vp9_get_tile_n_bits(cm->mi_rows, &min_log2_tiles, &max_log2_tiles);
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ones = cm->log2_tile_rows - min_log2_tiles;
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while (ones--)
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vp9_wb_write_bit(wb, 1);
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if (cm->log2_tile_rows < max_log2_tiles)
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vp9_wb_write_bit(wb, 0);
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#else
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vp9_wb_write_bit(wb, cm->log2_tile_rows != 0);
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if (cm->log2_tile_rows != 0)
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vp9_wb_write_bit(wb, cm->log2_tile_rows != 1);
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@ -1924,11 +1922,17 @@ static size_t encode_tiles(VP9_COMP *cpi, uint8_t *data_ptr) {
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vp9_writer residual_bc;
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int tile_row, tile_col;
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TOKENEXTRA *tok[4][1 << 6], *tok_end;
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#if CONFIG_ROW_TILE
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TOKENEXTRA *(*tok)[1024] = cpi->tile_tok;
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TileInfo (*tile)[1024] = cpi->tile_info;
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#else
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TOKENEXTRA *tok[4][1 << 6];
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TileInfo tile[4][1 << 6];
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#endif
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TOKENEXTRA *tok_end;
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size_t total_size = 0;
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const int tile_cols = cm->tile_cols;
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const int tile_rows = cm->tile_rows;
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TileInfo tile[4][1 << 6];
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TOKENEXTRA *pre_tok = cpi->tok;
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int tile_tok = 0;
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@ -572,19 +572,32 @@ void vp9_new_framerate(VP9_COMP *cpi, double framerate) {
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static void set_tile_limits(VP9_COMP *cpi) {
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VP9_COMMON *const cm = &cpi->common;
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#if CONFIG_ROW_TILE
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cm->tile_width = clamp(cpi->oxcf.tile_columns + 1,
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1, 64) << MI_BLOCK_SIZE_LOG2;
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cm->tile_height = clamp(cpi->oxcf.tile_rows + 1,
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1, 64) << MI_BLOCK_SIZE_LOG2;
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cm->tile_width = MIN(cm->tile_width, cm->mi_cols);
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cm->tile_height = MIN(cm->tile_height, cm->mi_rows);
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// Get tile numbers
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cm->tile_cols = 1;
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while (cm->tile_cols * cm->tile_width < cm->mi_cols)
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++cm->tile_cols;
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cm->tile_rows = 1;
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while (cm->tile_rows * cm->tile_height < cm->mi_rows)
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++cm->tile_rows;
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#else
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int min_log2_tiles, max_log2_tiles;
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vp9_get_tile_n_bits(cm->mi_cols, &min_log2_tiles, &max_log2_tiles);
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cm->log2_tile_cols = clamp(cpi->oxcf.tile_columns,
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min_log2_tiles, max_log2_tiles);
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#if CONFIG_ROW_TILE
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vp9_get_tile_n_bits(cm->mi_rows, &min_log2_tiles, &max_log2_tiles);
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cm->log2_tile_rows = clamp(cpi->oxcf.tile_rows,
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min_log2_tiles, max_log2_tiles);
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#else
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cm->log2_tile_rows = cpi->oxcf.tile_rows;
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#endif
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cm->log2_tile_rows = cpi->oxcf.tile_rows;
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cm->tile_cols = 1 << cm->log2_tile_cols;
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cm->tile_rows = 1 << cm->log2_tile_rows;
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@ -593,6 +606,7 @@ static void set_tile_limits(VP9_COMP *cpi) {
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// round to integer multiples of 8
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cm->tile_width = mi_cols_aligned_to_sb(cm->tile_width);
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cm->tile_height = mi_cols_aligned_to_sb(cm->tile_height);
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#endif
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}
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static void init_buffer_indices(VP9_COMP *cpi) {
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@ -207,8 +207,13 @@ static vpx_codec_err_t validate_config(vpx_codec_alg_priv_t *ctx,
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RANGE_CHECK(extra_cfg, enable_auto_alt_ref, 0, 2);
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RANGE_CHECK(extra_cfg, cpu_used, -16, 16);
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RANGE_CHECK_HI(extra_cfg, noise_sensitivity, 6);
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#if CONFIG_ROW_TILE
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RANGE_CHECK(extra_cfg, tile_columns, 0, 63);
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RANGE_CHECK(extra_cfg, tile_rows, 0, 63);
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#else
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RANGE_CHECK(extra_cfg, tile_columns, 0, 6);
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RANGE_CHECK(extra_cfg, tile_rows, 0, 6);
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RANGE_CHECK(extra_cfg, tile_rows, 0, 2);
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#endif
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RANGE_CHECK_HI(extra_cfg, sharpness, 7);
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RANGE_CHECK(extra_cfg, arnr_max_frames, 0, 15);
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RANGE_CHECK_HI(extra_cfg, arnr_strength, 6);
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