Merge "Refactor x86/vpx_subpixel_8t_intrin_avx2.c"
This commit is contained in:
Kyle Siefring
Gerrit Code Review
commit
b3a36f7946
@ -89,6 +89,7 @@ DSP_SRCS-yes += vpx_filter.h
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DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/convolve.h
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DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/vpx_asm_stubs.c
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DSP_SRCS-$(HAVE_SSSE3) += x86/convolve_ssse3.h
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DSP_SRCS-$(HAVE_AVX2) += x86/convolve_avx2.h
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DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_8t_sse2.asm
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DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_bilinear_sse2.asm
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DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_ssse3.asm
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99
vpx_dsp/x86/convolve_avx2.h
Normal file
99
vpx_dsp/x86/convolve_avx2.h
Normal file
@ -0,0 +1,99 @@
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/*
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* Copyright (c) 2017 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#ifndef VPX_DSP_X86_CONVOLVE_AVX2_H_
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#define VPX_DSP_X86_CONVOLVE_AVX2_H_
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#include <immintrin.h> // AVX2
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#include "./vpx_config.h"
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#if defined(__clang__)
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#if (__clang_major__ > 0 && __clang_major__ < 3) || \
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(__clang_major__ == 3 && __clang_minor__ <= 3) || \
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(defined(__APPLE__) && defined(__apple_build_version__) && \
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((__clang_major__ == 4 && __clang_minor__ <= 2) || \
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(__clang_major__ == 5 && __clang_minor__ == 0)))
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#define MM256_BROADCASTSI128_SI256(x) \
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_mm_broadcastsi128_si256((__m128i const *)&(x))
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#else // clang > 3.3, and not 5.0 on macosx.
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#define MM256_BROADCASTSI128_SI256(x) _mm256_broadcastsi128_si256(x)
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#endif // clang <= 3.3
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#elif defined(__GNUC__)
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#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ <= 6)
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#define MM256_BROADCASTSI128_SI256(x) \
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_mm_broadcastsi128_si256((__m128i const *)&(x))
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#elif __GNUC__ == 4 && __GNUC_MINOR__ == 7
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#define MM256_BROADCASTSI128_SI256(x) _mm_broadcastsi128_si256(x)
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#else // gcc > 4.7
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#define MM256_BROADCASTSI128_SI256(x) _mm256_broadcastsi128_si256(x)
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#endif // gcc <= 4.6
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#else // !(gcc || clang)
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#define MM256_BROADCASTSI128_SI256(x) _mm256_broadcastsi128_si256(x)
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#endif // __clang__
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static INLINE void shuffle_filter_avx2(const int16_t *const filter,
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__m256i *const f) {
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const __m256i f_values =
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MM256_BROADCASTSI128_SI256(_mm_load_si128((const __m128i *)filter));
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// pack and duplicate the filter values
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f[0] = _mm256_shuffle_epi8(f_values, _mm256_set1_epi16(0x0200u));
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f[1] = _mm256_shuffle_epi8(f_values, _mm256_set1_epi16(0x0604u));
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f[2] = _mm256_shuffle_epi8(f_values, _mm256_set1_epi16(0x0a08u));
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f[3] = _mm256_shuffle_epi8(f_values, _mm256_set1_epi16(0x0e0cu));
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}
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static INLINE __m256i convolve8_16_avx2(const __m256i *const s,
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const __m256i *const f) {
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// multiply 2 adjacent elements with the filter and add the result
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const __m256i k_64 = _mm256_set1_epi16(1 << 6);
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const __m256i x0 = _mm256_maddubs_epi16(s[0], f[0]);
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const __m256i x1 = _mm256_maddubs_epi16(s[1], f[1]);
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const __m256i x2 = _mm256_maddubs_epi16(s[2], f[2]);
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const __m256i x3 = _mm256_maddubs_epi16(s[3], f[3]);
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// add and saturate the results together
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const __m256i min_x2x1 = _mm256_min_epi16(x2, x1);
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const __m256i max_x2x1 = _mm256_max_epi16(x2, x1);
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__m256i temp = _mm256_adds_epi16(x0, x3);
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temp = _mm256_adds_epi16(temp, min_x2x1);
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temp = _mm256_adds_epi16(temp, max_x2x1);
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// round and shift by 7 bit each 16 bit
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temp = _mm256_adds_epi16(temp, k_64);
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temp = _mm256_srai_epi16(temp, 7);
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return temp;
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}
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static INLINE __m128i convolve8_8_avx2(const __m256i *const s,
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const __m256i *const f) {
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// multiply 2 adjacent elements with the filter and add the result
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const __m128i k_64 = _mm_set1_epi16(1 << 6);
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const __m128i x0 = _mm_maddubs_epi16(_mm256_castsi256_si128(s[0]),
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_mm256_castsi256_si128(f[0]));
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const __m128i x1 = _mm_maddubs_epi16(_mm256_castsi256_si128(s[1]),
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_mm256_castsi256_si128(f[1]));
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const __m128i x2 = _mm_maddubs_epi16(_mm256_castsi256_si128(s[2]),
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_mm256_castsi256_si128(f[2]));
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const __m128i x3 = _mm_maddubs_epi16(_mm256_castsi256_si128(s[3]),
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_mm256_castsi256_si128(f[3]));
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// add and saturate the results together
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const __m128i min_x2x1 = _mm_min_epi16(x2, x1);
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const __m128i max_x2x1 = _mm_max_epi16(x2, x1);
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__m128i temp = _mm_adds_epi16(x0, x3);
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temp = _mm_adds_epi16(temp, min_x2x1);
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temp = _mm_adds_epi16(temp, max_x2x1);
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// round and shift by 7 bit each 16 bit
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temp = _mm_adds_epi16(temp, k_64);
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temp = _mm_srai_epi16(temp, 7);
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return temp;
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}
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#undef MM256_BROADCASTSI128_SI256
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#endif // VPX_DSP_X86_CONVOLVE_AVX2_H_
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@ -12,9 +12,10 @@
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#include "./vpx_dsp_rtcd.h"
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#include "vpx_dsp/x86/convolve.h"
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#include "vpx_dsp/x86/convolve_avx2.h"
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#include "vpx_ports/mem.h"
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// filters for 16_h8 and 16_v8
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// filters for 16_h8
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DECLARE_ALIGNED(32, static const uint8_t, filt1_global_avx2[32]) = {
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0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8,
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0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8
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@ -35,160 +36,68 @@ DECLARE_ALIGNED(32, static const uint8_t, filt4_global_avx2[32]) = {
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6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14
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};
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#if defined(__clang__)
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#if (__clang_major__ > 0 && __clang_major__ < 3) || \
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(__clang_major__ == 3 && __clang_minor__ <= 3) || \
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(defined(__APPLE__) && defined(__apple_build_version__) && \
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((__clang_major__ == 4 && __clang_minor__ <= 2) || \
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(__clang_major__ == 5 && __clang_minor__ == 0)))
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#define MM256_BROADCASTSI128_SI256(x) \
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_mm_broadcastsi128_si256((__m128i const *)&(x))
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#else // clang > 3.3, and not 5.0 on macosx.
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#define MM256_BROADCASTSI128_SI256(x) _mm256_broadcastsi128_si256(x)
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#endif // clang <= 3.3
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#elif defined(__GNUC__)
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#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ <= 6)
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#define MM256_BROADCASTSI128_SI256(x) \
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_mm_broadcastsi128_si256((__m128i const *)&(x))
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#elif __GNUC__ == 4 && __GNUC_MINOR__ == 7
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#define MM256_BROADCASTSI128_SI256(x) _mm_broadcastsi128_si256(x)
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#else // gcc > 4.7
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#define MM256_BROADCASTSI128_SI256(x) _mm256_broadcastsi128_si256(x)
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#endif // gcc <= 4.6
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#else // !(gcc || clang)
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#define MM256_BROADCASTSI128_SI256(x) _mm256_broadcastsi128_si256(x)
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#endif // __clang__
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static INLINE void vpx_filter_block1d16_h8_X_avx2(
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static INLINE void vpx_filter_block1d16_h8_x_avx2(
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const uint8_t *src_ptr, ptrdiff_t src_pixels_per_line, uint8_t *output_ptr,
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ptrdiff_t output_pitch, uint32_t output_height, const int16_t *filter,
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const int avg) {
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__m128i filtersReg, outReg1, outReg2;
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__m256i addFilterReg64, filt1Reg, filt2Reg, filt3Reg, filt4Reg;
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__m256i firstFilters, secondFilters, thirdFilters, forthFilters;
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__m256i srcRegFilt32b1_1, srcRegFilt32b2_1, srcRegFilt32b2, srcRegFilt32b3;
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__m256i srcReg32b1, srcReg32b2, filtersReg32;
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__m128i outReg1, outReg2;
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__m256i outReg32b1, outReg32b2;
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unsigned int i;
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ptrdiff_t src_stride, dst_stride;
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__m256i f[4], filt[4], s[4];
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// create a register with 0,64,0,64,0,64,0,64,0,64,0,64,0,64,0,64
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addFilterReg64 = _mm256_set1_epi32((int)0x0400040u);
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filtersReg = _mm_loadu_si128((const __m128i *)filter);
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// converting the 16 bit (short) to 8 bit (byte) and have the same data
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// in both lanes of 128 bit register.
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filtersReg = _mm_packs_epi16(filtersReg, filtersReg);
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// have the same data in both lanes of a 256 bit register
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filtersReg32 = MM256_BROADCASTSI128_SI256(filtersReg);
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// duplicate only the first 16 bits (first and second byte)
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// across 256 bit register
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firstFilters = _mm256_shuffle_epi8(filtersReg32, _mm256_set1_epi16(0x100u));
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// duplicate only the second 16 bits (third and forth byte)
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// across 256 bit register
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secondFilters = _mm256_shuffle_epi8(filtersReg32, _mm256_set1_epi16(0x302u));
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// duplicate only the third 16 bits (fifth and sixth byte)
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// across 256 bit register
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thirdFilters = _mm256_shuffle_epi8(filtersReg32, _mm256_set1_epi16(0x504u));
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// duplicate only the forth 16 bits (seventh and eighth byte)
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// across 256 bit register
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forthFilters = _mm256_shuffle_epi8(filtersReg32, _mm256_set1_epi16(0x706u));
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filt1Reg = _mm256_load_si256((__m256i const *)filt1_global_avx2);
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filt2Reg = _mm256_load_si256((__m256i const *)filt2_global_avx2);
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filt3Reg = _mm256_load_si256((__m256i const *)filt3_global_avx2);
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filt4Reg = _mm256_load_si256((__m256i const *)filt4_global_avx2);
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shuffle_filter_avx2(filter, f);
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filt[0] = _mm256_load_si256((__m256i const *)filt1_global_avx2);
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filt[1] = _mm256_load_si256((__m256i const *)filt2_global_avx2);
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filt[2] = _mm256_load_si256((__m256i const *)filt3_global_avx2);
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filt[3] = _mm256_load_si256((__m256i const *)filt4_global_avx2);
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// multiple the size of the source and destination stride by two
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src_stride = src_pixels_per_line << 1;
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dst_stride = output_pitch << 1;
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for (i = output_height; i > 1; i -= 2) {
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__m256i srcReg;
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// load the 2 strides of source
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srcReg32b1 =
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srcReg =
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_mm256_castsi128_si256(_mm_loadu_si128((const __m128i *)(src_ptr - 3)));
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srcReg32b1 = _mm256_inserti128_si256(
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srcReg32b1,
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srcReg = _mm256_inserti128_si256(
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srcReg,
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_mm_loadu_si128((const __m128i *)(src_ptr + src_pixels_per_line - 3)),
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1);
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// filter the source buffer
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srcRegFilt32b1_1 = _mm256_shuffle_epi8(srcReg32b1, filt1Reg);
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srcRegFilt32b2 = _mm256_shuffle_epi8(srcReg32b1, filt4Reg);
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// multiply 2 adjacent elements with the filter and add the result
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srcRegFilt32b1_1 = _mm256_maddubs_epi16(srcRegFilt32b1_1, firstFilters);
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srcRegFilt32b2 = _mm256_maddubs_epi16(srcRegFilt32b2, forthFilters);
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// add and saturate the results together
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srcRegFilt32b1_1 = _mm256_adds_epi16(srcRegFilt32b1_1, srcRegFilt32b2);
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// filter the source buffer
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srcRegFilt32b3 = _mm256_shuffle_epi8(srcReg32b1, filt2Reg);
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srcRegFilt32b2 = _mm256_shuffle_epi8(srcReg32b1, filt3Reg);
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// multiply 2 adjacent elements with the filter and add the result
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srcRegFilt32b3 = _mm256_maddubs_epi16(srcRegFilt32b3, secondFilters);
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srcRegFilt32b2 = _mm256_maddubs_epi16(srcRegFilt32b2, thirdFilters);
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// add and saturate the results together
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srcRegFilt32b1_1 = _mm256_adds_epi16(
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srcRegFilt32b1_1, _mm256_min_epi16(srcRegFilt32b3, srcRegFilt32b2));
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s[0] = _mm256_shuffle_epi8(srcReg, filt[0]);
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s[1] = _mm256_shuffle_epi8(srcReg, filt[1]);
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s[2] = _mm256_shuffle_epi8(srcReg, filt[2]);
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s[3] = _mm256_shuffle_epi8(srcReg, filt[3]);
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outReg32b1 = convolve8_16_avx2(s, f);
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// reading 2 strides of the next 16 bytes
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// (part of it was being read by earlier read)
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srcReg32b2 =
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srcReg =
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_mm256_castsi128_si256(_mm_loadu_si128((const __m128i *)(src_ptr + 5)));
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srcReg32b2 = _mm256_inserti128_si256(
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srcReg32b2,
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srcReg = _mm256_inserti128_si256(
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srcReg,
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_mm_loadu_si128((const __m128i *)(src_ptr + src_pixels_per_line + 5)),
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1);
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// add and saturate the results together
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srcRegFilt32b1_1 = _mm256_adds_epi16(
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srcRegFilt32b1_1, _mm256_max_epi16(srcRegFilt32b3, srcRegFilt32b2));
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// filter the source buffer
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srcRegFilt32b2_1 = _mm256_shuffle_epi8(srcReg32b2, filt1Reg);
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srcRegFilt32b2 = _mm256_shuffle_epi8(srcReg32b2, filt4Reg);
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s[0] = _mm256_shuffle_epi8(srcReg, filt[0]);
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s[1] = _mm256_shuffle_epi8(srcReg, filt[1]);
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s[2] = _mm256_shuffle_epi8(srcReg, filt[2]);
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s[3] = _mm256_shuffle_epi8(srcReg, filt[3]);
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outReg32b2 = convolve8_16_avx2(s, f);
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// multiply 2 adjacent elements with the filter and add the result
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srcRegFilt32b2_1 = _mm256_maddubs_epi16(srcRegFilt32b2_1, firstFilters);
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srcRegFilt32b2 = _mm256_maddubs_epi16(srcRegFilt32b2, forthFilters);
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// add and saturate the results together
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srcRegFilt32b2_1 = _mm256_adds_epi16(srcRegFilt32b2_1, srcRegFilt32b2);
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// filter the source buffer
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srcRegFilt32b3 = _mm256_shuffle_epi8(srcReg32b2, filt2Reg);
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srcRegFilt32b2 = _mm256_shuffle_epi8(srcReg32b2, filt3Reg);
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// multiply 2 adjacent elements with the filter and add the result
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srcRegFilt32b3 = _mm256_maddubs_epi16(srcRegFilt32b3, secondFilters);
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srcRegFilt32b2 = _mm256_maddubs_epi16(srcRegFilt32b2, thirdFilters);
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// add and saturate the results together
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srcRegFilt32b2_1 = _mm256_adds_epi16(
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srcRegFilt32b2_1, _mm256_min_epi16(srcRegFilt32b3, srcRegFilt32b2));
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srcRegFilt32b2_1 = _mm256_adds_epi16(
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srcRegFilt32b2_1, _mm256_max_epi16(srcRegFilt32b3, srcRegFilt32b2));
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srcRegFilt32b1_1 = _mm256_adds_epi16(srcRegFilt32b1_1, addFilterReg64);
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srcRegFilt32b2_1 = _mm256_adds_epi16(srcRegFilt32b2_1, addFilterReg64);
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// shift by 7 bit each 16 bit
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srcRegFilt32b1_1 = _mm256_srai_epi16(srcRegFilt32b1_1, 7);
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srcRegFilt32b2_1 = _mm256_srai_epi16(srcRegFilt32b2_1, 7);
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// shrink to 8 bit each 16 bits, the first lane contain the first
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// convolve result and the second lane contain the second convolve
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// result
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srcRegFilt32b1_1 = _mm256_packus_epi16(srcRegFilt32b1_1, srcRegFilt32b2_1);
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// shrink to 8 bit each 16 bits, the low and high 64-bits of each lane
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// contain the first and second convolve result respectively
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outReg32b1 = _mm256_packus_epi16(outReg32b1, outReg32b2);
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src_ptr += src_stride;
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// average if necessary
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outReg1 = _mm256_castsi256_si128(srcRegFilt32b1_1);
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outReg2 = _mm256_extractf128_si256(srcRegFilt32b1_1, 1);
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outReg1 = _mm256_castsi256_si128(outReg32b1);
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outReg2 = _mm256_extractf128_si256(outReg32b1, 1);
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if (avg) {
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outReg1 = _mm_avg_epu8(outReg1, _mm_load_si128((__m128i *)output_ptr));
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outReg2 = _mm_avg_epu8(
|
||||
@ -207,89 +116,40 @@ static INLINE void vpx_filter_block1d16_h8_X_avx2(
|
||||
// if the number of strides is odd.
|
||||
// process only 16 bytes
|
||||
if (i > 0) {
|
||||
__m128i srcReg1, srcReg2, srcRegFilt1_1, srcRegFilt2_1;
|
||||
__m128i srcRegFilt2, srcRegFilt3;
|
||||
__m128i srcReg;
|
||||
|
||||
srcReg1 = _mm_loadu_si128((const __m128i *)(src_ptr - 3));
|
||||
// load the first 16 bytes of the last row
|
||||
srcReg = _mm_loadu_si128((const __m128i *)(src_ptr - 3));
|
||||
|
||||
// filter the source buffer
|
||||
srcRegFilt1_1 = _mm_shuffle_epi8(srcReg1, _mm256_castsi256_si128(filt1Reg));
|
||||
srcRegFilt2 = _mm_shuffle_epi8(srcReg1, _mm256_castsi256_si128(filt4Reg));
|
||||
|
||||
// multiply 2 adjacent elements with the filter and add the result
|
||||
srcRegFilt1_1 =
|
||||
_mm_maddubs_epi16(srcRegFilt1_1, _mm256_castsi256_si128(firstFilters));
|
||||
srcRegFilt2 =
|
||||
_mm_maddubs_epi16(srcRegFilt2, _mm256_castsi256_si128(forthFilters));
|
||||
|
||||
// add and saturate the results together
|
||||
srcRegFilt1_1 = _mm_adds_epi16(srcRegFilt1_1, srcRegFilt2);
|
||||
|
||||
// filter the source buffer
|
||||
srcRegFilt3 = _mm_shuffle_epi8(srcReg1, _mm256_castsi256_si128(filt2Reg));
|
||||
srcRegFilt2 = _mm_shuffle_epi8(srcReg1, _mm256_castsi256_si128(filt3Reg));
|
||||
|
||||
// multiply 2 adjacent elements with the filter and add the result
|
||||
srcRegFilt3 =
|
||||
_mm_maddubs_epi16(srcRegFilt3, _mm256_castsi256_si128(secondFilters));
|
||||
srcRegFilt2 =
|
||||
_mm_maddubs_epi16(srcRegFilt2, _mm256_castsi256_si128(thirdFilters));
|
||||
|
||||
// add and saturate the results together
|
||||
srcRegFilt1_1 =
|
||||
_mm_adds_epi16(srcRegFilt1_1, _mm_min_epi16(srcRegFilt3, srcRegFilt2));
|
||||
s[0] = _mm256_castsi128_si256(
|
||||
_mm_shuffle_epi8(srcReg, _mm256_castsi256_si128(filt[0])));
|
||||
s[1] = _mm256_castsi128_si256(
|
||||
_mm_shuffle_epi8(srcReg, _mm256_castsi256_si128(filt[1])));
|
||||
s[2] = _mm256_castsi128_si256(
|
||||
_mm_shuffle_epi8(srcReg, _mm256_castsi256_si128(filt[2])));
|
||||
s[3] = _mm256_castsi128_si256(
|
||||
_mm_shuffle_epi8(srcReg, _mm256_castsi256_si128(filt[3])));
|
||||
outReg1 = convolve8_8_avx2(s, f);
|
||||
|
||||
// reading the next 16 bytes
|
||||
// (part of it was being read by earlier read)
|
||||
srcReg2 = _mm_loadu_si128((const __m128i *)(src_ptr + 5));
|
||||
|
||||
// add and saturate the results together
|
||||
srcRegFilt1_1 =
|
||||
_mm_adds_epi16(srcRegFilt1_1, _mm_max_epi16(srcRegFilt3, srcRegFilt2));
|
||||
srcReg = _mm_loadu_si128((const __m128i *)(src_ptr + 5));
|
||||
|
||||
// filter the source buffer
|
||||
srcRegFilt2_1 = _mm_shuffle_epi8(srcReg2, _mm256_castsi256_si128(filt1Reg));
|
||||
srcRegFilt2 = _mm_shuffle_epi8(srcReg2, _mm256_castsi256_si128(filt4Reg));
|
||||
s[0] = _mm256_castsi128_si256(
|
||||
_mm_shuffle_epi8(srcReg, _mm256_castsi256_si128(filt[0])));
|
||||
s[1] = _mm256_castsi128_si256(
|
||||
_mm_shuffle_epi8(srcReg, _mm256_castsi256_si128(filt[1])));
|
||||
s[2] = _mm256_castsi128_si256(
|
||||
_mm_shuffle_epi8(srcReg, _mm256_castsi256_si128(filt[2])));
|
||||
s[3] = _mm256_castsi128_si256(
|
||||
_mm_shuffle_epi8(srcReg, _mm256_castsi256_si128(filt[3])));
|
||||
outReg2 = convolve8_8_avx2(s, f);
|
||||
|
||||
// multiply 2 adjacent elements with the filter and add the result
|
||||
srcRegFilt2_1 =
|
||||
_mm_maddubs_epi16(srcRegFilt2_1, _mm256_castsi256_si128(firstFilters));
|
||||
srcRegFilt2 =
|
||||
_mm_maddubs_epi16(srcRegFilt2, _mm256_castsi256_si128(forthFilters));
|
||||
|
||||
// add and saturate the results together
|
||||
srcRegFilt2_1 = _mm_adds_epi16(srcRegFilt2_1, srcRegFilt2);
|
||||
|
||||
// filter the source buffer
|
||||
srcRegFilt3 = _mm_shuffle_epi8(srcReg2, _mm256_castsi256_si128(filt2Reg));
|
||||
srcRegFilt2 = _mm_shuffle_epi8(srcReg2, _mm256_castsi256_si128(filt3Reg));
|
||||
|
||||
// multiply 2 adjacent elements with the filter and add the result
|
||||
srcRegFilt3 =
|
||||
_mm_maddubs_epi16(srcRegFilt3, _mm256_castsi256_si128(secondFilters));
|
||||
srcRegFilt2 =
|
||||
_mm_maddubs_epi16(srcRegFilt2, _mm256_castsi256_si128(thirdFilters));
|
||||
|
||||
// add and saturate the results together
|
||||
srcRegFilt2_1 =
|
||||
_mm_adds_epi16(srcRegFilt2_1, _mm_min_epi16(srcRegFilt3, srcRegFilt2));
|
||||
srcRegFilt2_1 =
|
||||
_mm_adds_epi16(srcRegFilt2_1, _mm_max_epi16(srcRegFilt3, srcRegFilt2));
|
||||
|
||||
srcRegFilt1_1 =
|
||||
_mm_adds_epi16(srcRegFilt1_1, _mm256_castsi256_si128(addFilterReg64));
|
||||
|
||||
srcRegFilt2_1 =
|
||||
_mm_adds_epi16(srcRegFilt2_1, _mm256_castsi256_si128(addFilterReg64));
|
||||
|
||||
// shift by 7 bit each 16 bit
|
||||
srcRegFilt1_1 = _mm_srai_epi16(srcRegFilt1_1, 7);
|
||||
srcRegFilt2_1 = _mm_srai_epi16(srcRegFilt2_1, 7);
|
||||
|
||||
// shrink to 8 bit each 16 bits, the first lane contain the first
|
||||
// convolve result and the second lane contain the second convolve
|
||||
// result
|
||||
outReg1 = _mm_packus_epi16(srcRegFilt1_1, srcRegFilt2_1);
|
||||
// shrink to 8 bit each 16 bits, the low and high 64-bits of each lane
|
||||
// contain the first and second convolve result respectively
|
||||
outReg1 = _mm_packus_epi16(outReg1, outReg2);
|
||||
|
||||
// average if necessary
|
||||
if (avg) {
|
||||
@ -304,169 +164,99 @@ static INLINE void vpx_filter_block1d16_h8_X_avx2(
|
||||
static void vpx_filter_block1d16_h8_avx2(
|
||||
const uint8_t *src_ptr, ptrdiff_t src_stride, uint8_t *output_ptr,
|
||||
ptrdiff_t dst_stride, uint32_t output_height, const int16_t *filter) {
|
||||
vpx_filter_block1d16_h8_X_avx2(src_ptr, src_stride, output_ptr, dst_stride,
|
||||
vpx_filter_block1d16_h8_x_avx2(src_ptr, src_stride, output_ptr, dst_stride,
|
||||
output_height, filter, 0);
|
||||
}
|
||||
|
||||
static void vpx_filter_block1d16_h8_avg_avx2(
|
||||
const uint8_t *src_ptr, ptrdiff_t src_stride, uint8_t *output_ptr,
|
||||
ptrdiff_t dst_stride, uint32_t output_height, const int16_t *filter) {
|
||||
vpx_filter_block1d16_h8_X_avx2(src_ptr, src_stride, output_ptr, dst_stride,
|
||||
vpx_filter_block1d16_h8_x_avx2(src_ptr, src_stride, output_ptr, dst_stride,
|
||||
output_height, filter, 1);
|
||||
}
|
||||
|
||||
static INLINE void vpx_filter_block1d16_v8_X_avx2(
|
||||
static INLINE void vpx_filter_block1d16_v8_x_avx2(
|
||||
const uint8_t *src_ptr, ptrdiff_t src_pitch, uint8_t *output_ptr,
|
||||
ptrdiff_t out_pitch, uint32_t output_height, const int16_t *filter,
|
||||
const int avg) {
|
||||
__m128i filtersReg, outReg1, outReg2;
|
||||
__m256i addFilterReg64;
|
||||
__m256i srcReg32b1, srcReg32b2, srcReg32b3, srcReg32b4, srcReg32b5;
|
||||
__m256i srcReg32b6, srcReg32b7, srcReg32b8, srcReg32b9, srcReg32b10;
|
||||
__m256i srcReg32b11, srcReg32b12, filtersReg32;
|
||||
__m256i firstFilters, secondFilters, thirdFilters, forthFilters;
|
||||
__m128i outReg1, outReg2;
|
||||
__m256i srcRegHead1;
|
||||
unsigned int i;
|
||||
ptrdiff_t src_stride, dst_stride;
|
||||
__m256i f[4], s1[4], s2[4];
|
||||
|
||||
// create a register with 0,64,0,64,0,64,0,64,0,64,0,64,0,64,0,64
|
||||
addFilterReg64 = _mm256_set1_epi32((int)0x0400040u);
|
||||
filtersReg = _mm_loadu_si128((const __m128i *)filter);
|
||||
// converting the 16 bit (short) to 8 bit (byte) and have the
|
||||
// same data in both lanes of 128 bit register.
|
||||
filtersReg = _mm_packs_epi16(filtersReg, filtersReg);
|
||||
// have the same data in both lanes of a 256 bit register
|
||||
filtersReg32 = MM256_BROADCASTSI128_SI256(filtersReg);
|
||||
|
||||
// duplicate only the first 16 bits (first and second byte)
|
||||
// across 256 bit register
|
||||
firstFilters = _mm256_shuffle_epi8(filtersReg32, _mm256_set1_epi16(0x100u));
|
||||
// duplicate only the second 16 bits (third and forth byte)
|
||||
// across 256 bit register
|
||||
secondFilters = _mm256_shuffle_epi8(filtersReg32, _mm256_set1_epi16(0x302u));
|
||||
// duplicate only the third 16 bits (fifth and sixth byte)
|
||||
// across 256 bit register
|
||||
thirdFilters = _mm256_shuffle_epi8(filtersReg32, _mm256_set1_epi16(0x504u));
|
||||
// duplicate only the forth 16 bits (seventh and eighth byte)
|
||||
// across 256 bit register
|
||||
forthFilters = _mm256_shuffle_epi8(filtersReg32, _mm256_set1_epi16(0x706u));
|
||||
shuffle_filter_avx2(filter, f);
|
||||
|
||||
// multiple the size of the source and destination stride by two
|
||||
src_stride = src_pitch << 1;
|
||||
dst_stride = out_pitch << 1;
|
||||
|
||||
{
|
||||
__m128i s[6];
|
||||
__m256i s32b[6];
|
||||
|
||||
// load 16 bytes 7 times in stride of src_pitch
|
||||
srcReg32b1 =
|
||||
_mm256_castsi128_si256(_mm_loadu_si128((const __m128i *)(src_ptr)));
|
||||
srcReg32b2 = _mm256_castsi128_si256(
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + src_pitch)));
|
||||
srcReg32b3 = _mm256_castsi128_si256(
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + src_pitch * 2)));
|
||||
srcReg32b4 = _mm256_castsi128_si256(
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + src_pitch * 3)));
|
||||
srcReg32b5 = _mm256_castsi128_si256(
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + src_pitch * 4)));
|
||||
srcReg32b6 = _mm256_castsi128_si256(
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + src_pitch * 5)));
|
||||
srcReg32b7 = _mm256_castsi128_si256(
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + src_pitch * 6)));
|
||||
s[0] = _mm_loadu_si128((const __m128i *)(src_ptr + 0 * src_pitch));
|
||||
s[1] = _mm_loadu_si128((const __m128i *)(src_ptr + 1 * src_pitch));
|
||||
s[2] = _mm_loadu_si128((const __m128i *)(src_ptr + 2 * src_pitch));
|
||||
s[3] = _mm_loadu_si128((const __m128i *)(src_ptr + 3 * src_pitch));
|
||||
s[4] = _mm_loadu_si128((const __m128i *)(src_ptr + 4 * src_pitch));
|
||||
s[5] = _mm_loadu_si128((const __m128i *)(src_ptr + 5 * src_pitch));
|
||||
srcRegHead1 = _mm256_castsi128_si256(
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + 6 * src_pitch)));
|
||||
|
||||
// have each consecutive loads on the same 256 register
|
||||
srcReg32b1 = _mm256_inserti128_si256(srcReg32b1,
|
||||
_mm256_castsi256_si128(srcReg32b2), 1);
|
||||
srcReg32b2 = _mm256_inserti128_si256(srcReg32b2,
|
||||
_mm256_castsi256_si128(srcReg32b3), 1);
|
||||
srcReg32b3 = _mm256_inserti128_si256(srcReg32b3,
|
||||
_mm256_castsi256_si128(srcReg32b4), 1);
|
||||
srcReg32b4 = _mm256_inserti128_si256(srcReg32b4,
|
||||
_mm256_castsi256_si128(srcReg32b5), 1);
|
||||
srcReg32b5 = _mm256_inserti128_si256(srcReg32b5,
|
||||
_mm256_castsi256_si128(srcReg32b6), 1);
|
||||
srcReg32b6 = _mm256_inserti128_si256(srcReg32b6,
|
||||
_mm256_castsi256_si128(srcReg32b7), 1);
|
||||
s32b[0] = _mm256_inserti128_si256(_mm256_castsi128_si256(s[0]), s[1], 1);
|
||||
s32b[1] = _mm256_inserti128_si256(_mm256_castsi128_si256(s[1]), s[2], 1);
|
||||
s32b[2] = _mm256_inserti128_si256(_mm256_castsi128_si256(s[2]), s[3], 1);
|
||||
s32b[3] = _mm256_inserti128_si256(_mm256_castsi128_si256(s[3]), s[4], 1);
|
||||
s32b[4] = _mm256_inserti128_si256(_mm256_castsi128_si256(s[4]), s[5], 1);
|
||||
s32b[5] = _mm256_inserti128_si256(_mm256_castsi128_si256(s[5]),
|
||||
_mm256_castsi256_si128(srcRegHead1), 1);
|
||||
|
||||
// merge every two consecutive registers except the last one
|
||||
srcReg32b10 = _mm256_unpacklo_epi8(srcReg32b1, srcReg32b2);
|
||||
srcReg32b1 = _mm256_unpackhi_epi8(srcReg32b1, srcReg32b2);
|
||||
|
||||
// save
|
||||
srcReg32b11 = _mm256_unpacklo_epi8(srcReg32b3, srcReg32b4);
|
||||
|
||||
// save
|
||||
srcReg32b3 = _mm256_unpackhi_epi8(srcReg32b3, srcReg32b4);
|
||||
|
||||
// save
|
||||
srcReg32b2 = _mm256_unpacklo_epi8(srcReg32b5, srcReg32b6);
|
||||
|
||||
// save
|
||||
srcReg32b5 = _mm256_unpackhi_epi8(srcReg32b5, srcReg32b6);
|
||||
// the first lanes contain values for filtering odd rows (1,3,5...) and
|
||||
// the second lanes contain values for filtering even rows (2,4,6...)
|
||||
s1[0] = _mm256_unpacklo_epi8(s32b[0], s32b[1]);
|
||||
s2[0] = _mm256_unpackhi_epi8(s32b[0], s32b[1]);
|
||||
s1[1] = _mm256_unpacklo_epi8(s32b[2], s32b[3]);
|
||||
s2[1] = _mm256_unpackhi_epi8(s32b[2], s32b[3]);
|
||||
s1[2] = _mm256_unpacklo_epi8(s32b[4], s32b[5]);
|
||||
s2[2] = _mm256_unpackhi_epi8(s32b[4], s32b[5]);
|
||||
}
|
||||
|
||||
for (i = output_height; i > 1; i -= 2) {
|
||||
// load the last 2 loads of 16 bytes and have every two
|
||||
__m256i srcRegHead2, srcRegHead3;
|
||||
|
||||
// load the next 2 loads of 16 bytes and have every two
|
||||
// consecutive loads in the same 256 bit register
|
||||
srcReg32b8 = _mm256_castsi128_si256(
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + src_pitch * 7)));
|
||||
srcReg32b7 = _mm256_inserti128_si256(srcReg32b7,
|
||||
_mm256_castsi256_si128(srcReg32b8), 1);
|
||||
srcReg32b9 = _mm256_castsi128_si256(
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + src_pitch * 8)));
|
||||
srcReg32b8 = _mm256_inserti128_si256(srcReg32b8,
|
||||
_mm256_castsi256_si128(srcReg32b9), 1);
|
||||
srcRegHead2 = _mm256_castsi128_si256(
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + 7 * src_pitch)));
|
||||
srcRegHead1 = _mm256_inserti128_si256(
|
||||
srcRegHead1, _mm256_castsi256_si128(srcRegHead2), 1);
|
||||
srcRegHead3 = _mm256_castsi128_si256(
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + 8 * src_pitch)));
|
||||
srcRegHead2 = _mm256_inserti128_si256(
|
||||
srcRegHead2, _mm256_castsi256_si128(srcRegHead3), 1);
|
||||
|
||||
// merge every two consecutive registers
|
||||
// save
|
||||
srcReg32b4 = _mm256_unpacklo_epi8(srcReg32b7, srcReg32b8);
|
||||
srcReg32b7 = _mm256_unpackhi_epi8(srcReg32b7, srcReg32b8);
|
||||
// merge the two new consecutive registers
|
||||
// the first lane contain values for filtering odd rows (1,3,5...) and
|
||||
// the second lane contain values for filtering even rows (2,4,6...)
|
||||
s1[3] = _mm256_unpacklo_epi8(srcRegHead1, srcRegHead2);
|
||||
s2[3] = _mm256_unpackhi_epi8(srcRegHead1, srcRegHead2);
|
||||
|
||||
// multiply 2 adjacent elements with the filter and add the result
|
||||
srcReg32b10 = _mm256_maddubs_epi16(srcReg32b10, firstFilters);
|
||||
srcReg32b6 = _mm256_maddubs_epi16(srcReg32b4, forthFilters);
|
||||
s1[0] = convolve8_16_avx2(s1, f);
|
||||
s2[0] = convolve8_16_avx2(s2, f);
|
||||
|
||||
// add and saturate the results together
|
||||
srcReg32b10 = _mm256_adds_epi16(srcReg32b10, srcReg32b6);
|
||||
|
||||
// multiply 2 adjacent elements with the filter and add the result
|
||||
srcReg32b8 = _mm256_maddubs_epi16(srcReg32b11, secondFilters);
|
||||
srcReg32b12 = _mm256_maddubs_epi16(srcReg32b2, thirdFilters);
|
||||
|
||||
// add and saturate the results together
|
||||
srcReg32b10 = _mm256_adds_epi16(srcReg32b10,
|
||||
_mm256_min_epi16(srcReg32b8, srcReg32b12));
|
||||
srcReg32b10 = _mm256_adds_epi16(srcReg32b10,
|
||||
_mm256_max_epi16(srcReg32b8, srcReg32b12));
|
||||
|
||||
// multiply 2 adjacent elements with the filter and add the result
|
||||
srcReg32b1 = _mm256_maddubs_epi16(srcReg32b1, firstFilters);
|
||||
srcReg32b6 = _mm256_maddubs_epi16(srcReg32b7, forthFilters);
|
||||
|
||||
srcReg32b1 = _mm256_adds_epi16(srcReg32b1, srcReg32b6);
|
||||
|
||||
// multiply 2 adjacent elements with the filter and add the result
|
||||
srcReg32b8 = _mm256_maddubs_epi16(srcReg32b3, secondFilters);
|
||||
srcReg32b12 = _mm256_maddubs_epi16(srcReg32b5, thirdFilters);
|
||||
|
||||
// add and saturate the results together
|
||||
srcReg32b1 = _mm256_adds_epi16(srcReg32b1,
|
||||
_mm256_min_epi16(srcReg32b8, srcReg32b12));
|
||||
srcReg32b1 = _mm256_adds_epi16(srcReg32b1,
|
||||
_mm256_max_epi16(srcReg32b8, srcReg32b12));
|
||||
|
||||
srcReg32b10 = _mm256_adds_epi16(srcReg32b10, addFilterReg64);
|
||||
srcReg32b1 = _mm256_adds_epi16(srcReg32b1, addFilterReg64);
|
||||
|
||||
// shift by 7 bit each 16 bit
|
||||
srcReg32b10 = _mm256_srai_epi16(srcReg32b10, 7);
|
||||
srcReg32b1 = _mm256_srai_epi16(srcReg32b1, 7);
|
||||
|
||||
// shrink to 8 bit each 16 bits, the first lane contain the first
|
||||
// convolve result and the second lane contain the second convolve
|
||||
// result
|
||||
srcReg32b1 = _mm256_packus_epi16(srcReg32b10, srcReg32b1);
|
||||
// shrink to 8 bit each 16 bits, the low and high 64-bits of each lane
|
||||
// contain the first and second convolve result respectively
|
||||
s1[0] = _mm256_packus_epi16(s1[0], s2[0]);
|
||||
|
||||
src_ptr += src_stride;
|
||||
|
||||
// average if necessary
|
||||
outReg1 = _mm256_castsi256_si128(srcReg32b1);
|
||||
outReg2 = _mm256_extractf128_si256(srcReg32b1, 1);
|
||||
outReg1 = _mm256_castsi256_si128(s1[0]);
|
||||
outReg2 = _mm256_extractf128_si256(s1[0], 1);
|
||||
if (avg) {
|
||||
outReg1 = _mm_avg_epu8(outReg1, _mm_load_si128((__m128i *)output_ptr));
|
||||
outReg2 = _mm_avg_epu8(
|
||||
@ -481,78 +271,35 @@ static INLINE void vpx_filter_block1d16_v8_X_avx2(
|
||||
|
||||
output_ptr += dst_stride;
|
||||
|
||||
// save part of the registers for next strides
|
||||
srcReg32b10 = srcReg32b11;
|
||||
srcReg32b1 = srcReg32b3;
|
||||
srcReg32b11 = srcReg32b2;
|
||||
srcReg32b3 = srcReg32b5;
|
||||
srcReg32b2 = srcReg32b4;
|
||||
srcReg32b5 = srcReg32b7;
|
||||
srcReg32b7 = srcReg32b9;
|
||||
// shift down by two rows
|
||||
s1[0] = s1[1];
|
||||
s2[0] = s2[1];
|
||||
s1[1] = s1[2];
|
||||
s2[1] = s2[2];
|
||||
s1[2] = s1[3];
|
||||
s2[2] = s2[3];
|
||||
srcRegHead1 = srcRegHead3;
|
||||
}
|
||||
|
||||
// if the number of strides is odd.
|
||||
// process only 16 bytes
|
||||
if (i > 0) {
|
||||
__m128i srcRegFilt1, srcRegFilt3, srcRegFilt4, srcRegFilt5;
|
||||
__m128i srcRegFilt6, srcRegFilt7, srcRegFilt8;
|
||||
// load the last 16 bytes
|
||||
srcRegFilt8 = _mm_loadu_si128((const __m128i *)(src_ptr + src_pitch * 7));
|
||||
const __m128i srcRegHead2 =
|
||||
_mm_loadu_si128((const __m128i *)(src_ptr + src_pitch * 7));
|
||||
|
||||
// merge the last 2 results together
|
||||
srcRegFilt4 =
|
||||
_mm_unpacklo_epi8(_mm256_castsi256_si128(srcReg32b7), srcRegFilt8);
|
||||
srcRegFilt7 =
|
||||
_mm_unpackhi_epi8(_mm256_castsi256_si128(srcReg32b7), srcRegFilt8);
|
||||
s1[0] = _mm256_castsi128_si256(
|
||||
_mm_unpacklo_epi8(_mm256_castsi256_si128(srcRegHead1), srcRegHead2));
|
||||
s2[0] = _mm256_castsi128_si256(
|
||||
_mm_unpackhi_epi8(_mm256_castsi256_si128(srcRegHead1), srcRegHead2));
|
||||
|
||||
// multiply 2 adjacent elements with the filter and add the result
|
||||
srcRegFilt1 = _mm_maddubs_epi16(_mm256_castsi256_si128(srcReg32b10),
|
||||
_mm256_castsi256_si128(firstFilters));
|
||||
srcRegFilt4 =
|
||||
_mm_maddubs_epi16(srcRegFilt4, _mm256_castsi256_si128(forthFilters));
|
||||
srcRegFilt3 = _mm_maddubs_epi16(_mm256_castsi256_si128(srcReg32b1),
|
||||
_mm256_castsi256_si128(firstFilters));
|
||||
srcRegFilt7 =
|
||||
_mm_maddubs_epi16(srcRegFilt7, _mm256_castsi256_si128(forthFilters));
|
||||
outReg1 = convolve8_8_avx2(s1, f);
|
||||
outReg2 = convolve8_8_avx2(s2, f);
|
||||
|
||||
// add and saturate the results together
|
||||
srcRegFilt1 = _mm_adds_epi16(srcRegFilt1, srcRegFilt4);
|
||||
srcRegFilt3 = _mm_adds_epi16(srcRegFilt3, srcRegFilt7);
|
||||
|
||||
// multiply 2 adjacent elements with the filter and add the result
|
||||
srcRegFilt4 = _mm_maddubs_epi16(_mm256_castsi256_si128(srcReg32b11),
|
||||
_mm256_castsi256_si128(secondFilters));
|
||||
srcRegFilt5 = _mm_maddubs_epi16(_mm256_castsi256_si128(srcReg32b3),
|
||||
_mm256_castsi256_si128(secondFilters));
|
||||
|
||||
// multiply 2 adjacent elements with the filter and add the result
|
||||
srcRegFilt6 = _mm_maddubs_epi16(_mm256_castsi256_si128(srcReg32b2),
|
||||
_mm256_castsi256_si128(thirdFilters));
|
||||
srcRegFilt7 = _mm_maddubs_epi16(_mm256_castsi256_si128(srcReg32b5),
|
||||
_mm256_castsi256_si128(thirdFilters));
|
||||
|
||||
// add and saturate the results together
|
||||
srcRegFilt1 =
|
||||
_mm_adds_epi16(srcRegFilt1, _mm_min_epi16(srcRegFilt4, srcRegFilt6));
|
||||
srcRegFilt3 =
|
||||
_mm_adds_epi16(srcRegFilt3, _mm_min_epi16(srcRegFilt5, srcRegFilt7));
|
||||
|
||||
// add and saturate the results together
|
||||
srcRegFilt1 =
|
||||
_mm_adds_epi16(srcRegFilt1, _mm_max_epi16(srcRegFilt4, srcRegFilt6));
|
||||
srcRegFilt3 =
|
||||
_mm_adds_epi16(srcRegFilt3, _mm_max_epi16(srcRegFilt5, srcRegFilt7));
|
||||
|
||||
srcRegFilt1 =
|
||||
_mm_adds_epi16(srcRegFilt1, _mm256_castsi256_si128(addFilterReg64));
|
||||
srcRegFilt3 =
|
||||
_mm_adds_epi16(srcRegFilt3, _mm256_castsi256_si128(addFilterReg64));
|
||||
|
||||
// shift by 7 bit each 16 bit
|
||||
srcRegFilt1 = _mm_srai_epi16(srcRegFilt1, 7);
|
||||
srcRegFilt3 = _mm_srai_epi16(srcRegFilt3, 7);
|
||||
|
||||
// shrink to 8 bit each 16 bits, the first lane contain the first
|
||||
// convolve result and the second lane contain the second convolve
|
||||
// result
|
||||
outReg1 = _mm_packus_epi16(srcRegFilt1, srcRegFilt3);
|
||||
// shrink to 8 bit each 16 bits, the low and high 64-bits of each lane
|
||||
// contain the first and second convolve result respectively
|
||||
outReg1 = _mm_packus_epi16(outReg1, outReg2);
|
||||
|
||||
// average if necessary
|
||||
if (avg) {
|
||||
@ -568,14 +315,14 @@ static void vpx_filter_block1d16_v8_avx2(const uint8_t *src_ptr,
|
||||
ptrdiff_t src_stride, uint8_t *dst_ptr,
|
||||
ptrdiff_t dst_stride, uint32_t height,
|
||||
const int16_t *filter) {
|
||||
vpx_filter_block1d16_v8_X_avx2(src_ptr, src_stride, dst_ptr, dst_stride,
|
||||
vpx_filter_block1d16_v8_x_avx2(src_ptr, src_stride, dst_ptr, dst_stride,
|
||||
height, filter, 0);
|
||||
}
|
||||
|
||||
static void vpx_filter_block1d16_v8_avg_avx2(
|
||||
const uint8_t *src_ptr, ptrdiff_t src_stride, uint8_t *dst_ptr,
|
||||
ptrdiff_t dst_stride, uint32_t height, const int16_t *filter) {
|
||||
vpx_filter_block1d16_v8_X_avx2(src_ptr, src_stride, dst_ptr, dst_stride,
|
||||
vpx_filter_block1d16_v8_x_avx2(src_ptr, src_stride, dst_ptr, dst_stride,
|
||||
height, filter, 1);
|
||||
}
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user