Merge "Fix warnings reported by -Wshadow: Part1: vpx_dsp directory"
This commit is contained in:
James Zern
@@ -196,18 +196,18 @@
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out2, out3) \
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{ \
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v8i16 madd_s0_m, madd_s1_m, madd_s2_m, madd_s3_m; \
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v4i32 tmp0_m, tmp1_m, tmp2_m, tmp3_m; \
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v4i32 tmp0_madd, tmp1_madd, tmp2_madd, tmp3_madd; \
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\
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ILVRL_H2_SH(inp1, inp0, madd_s1_m, madd_s0_m); \
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ILVRL_H2_SH(inp3, inp2, madd_s3_m, madd_s2_m); \
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DOTP_SH4_SW(madd_s1_m, madd_s0_m, madd_s1_m, madd_s0_m, cst0, cst0, cst1, \
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cst1, tmp0_m, tmp1_m, tmp2_m, tmp3_m); \
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SRARI_W4_SW(tmp0_m, tmp1_m, tmp2_m, tmp3_m, DCT_CONST_BITS); \
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PCKEV_H2_SH(tmp1_m, tmp0_m, tmp3_m, tmp2_m, out0, out1); \
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cst1, tmp0_madd, tmp1_madd, tmp2_madd, tmp3_madd); \
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SRARI_W4_SW(tmp0_madd, tmp1_madd, tmp2_madd, tmp3_madd, DCT_CONST_BITS); \
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PCKEV_H2_SH(tmp1_madd, tmp0_madd, tmp3_madd, tmp2_madd, out0, out1); \
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DOTP_SH4_SW(madd_s3_m, madd_s2_m, madd_s3_m, madd_s2_m, cst2, cst2, cst3, \
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cst3, tmp0_m, tmp1_m, tmp2_m, tmp3_m); \
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SRARI_W4_SW(tmp0_m, tmp1_m, tmp2_m, tmp3_m, DCT_CONST_BITS); \
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PCKEV_H2_SH(tmp1_m, tmp0_m, tmp3_m, tmp2_m, out2, out3); \
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cst3, tmp0_madd, tmp1_madd, tmp2_madd, tmp3_madd); \
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SRARI_W4_SW(tmp0_madd, tmp1_madd, tmp2_madd, tmp3_madd, DCT_CONST_BITS); \
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PCKEV_H2_SH(tmp1_madd, tmp0_madd, tmp3_madd, tmp2_madd, out2, out3); \
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}
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/* idct 8x8 macro */
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@@ -49,35 +49,35 @@
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p1_out = __msa_xori_b((v16u8)p1_m, 0x80); \
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}
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#define VP9_FLAT4(p3_in, p2_in, p0_in, q0_in, q2_in, q3_in, flat_out) \
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{ \
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v16u8 tmp, p2_a_sub_p0, q2_a_sub_q0, p3_a_sub_p0, q3_a_sub_q0; \
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v16u8 zero_in = { 0 }; \
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\
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tmp = __msa_ori_b(zero_in, 1); \
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p2_a_sub_p0 = __msa_asub_u_b(p2_in, p0_in); \
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q2_a_sub_q0 = __msa_asub_u_b(q2_in, q0_in); \
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p3_a_sub_p0 = __msa_asub_u_b(p3_in, p0_in); \
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q3_a_sub_q0 = __msa_asub_u_b(q3_in, q0_in); \
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\
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p2_a_sub_p0 = __msa_max_u_b(p2_a_sub_p0, q2_a_sub_q0); \
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flat_out = __msa_max_u_b(p2_a_sub_p0, flat_out); \
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p3_a_sub_p0 = __msa_max_u_b(p3_a_sub_p0, q3_a_sub_q0); \
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flat_out = __msa_max_u_b(p3_a_sub_p0, flat_out); \
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\
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flat_out = (tmp < (v16u8)flat_out); \
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flat_out = __msa_xori_b(flat_out, 0xff); \
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flat_out = flat_out & (mask); \
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#define VP9_FLAT4(p3_in, p2_in, p0_in, q0_in, q2_in, q3_in, flat_out) \
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{ \
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v16u8 tmp_flat4, p2_a_sub_p0, q2_a_sub_q0, p3_a_sub_p0, q3_a_sub_q0; \
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v16u8 zero_in = { 0 }; \
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\
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tmp_flat4 = __msa_ori_b(zero_in, 1); \
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p2_a_sub_p0 = __msa_asub_u_b(p2_in, p0_in); \
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q2_a_sub_q0 = __msa_asub_u_b(q2_in, q0_in); \
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p3_a_sub_p0 = __msa_asub_u_b(p3_in, p0_in); \
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q3_a_sub_q0 = __msa_asub_u_b(q3_in, q0_in); \
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\
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p2_a_sub_p0 = __msa_max_u_b(p2_a_sub_p0, q2_a_sub_q0); \
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flat_out = __msa_max_u_b(p2_a_sub_p0, flat_out); \
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p3_a_sub_p0 = __msa_max_u_b(p3_a_sub_p0, q3_a_sub_q0); \
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flat_out = __msa_max_u_b(p3_a_sub_p0, flat_out); \
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\
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flat_out = (tmp_flat4 < (v16u8)flat_out); \
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flat_out = __msa_xori_b(flat_out, 0xff); \
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flat_out = flat_out & (mask); \
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}
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#define VP9_FLAT5(p7_in, p6_in, p5_in, p4_in, p0_in, q0_in, q4_in, q5_in, \
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q6_in, q7_in, flat_in, flat2_out) \
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{ \
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v16u8 tmp, zero_in = { 0 }; \
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v16u8 tmp_flat5, zero_in = { 0 }; \
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v16u8 p4_a_sub_p0, q4_a_sub_q0, p5_a_sub_p0, q5_a_sub_q0; \
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v16u8 p6_a_sub_p0, q6_a_sub_q0, p7_a_sub_p0, q7_a_sub_q0; \
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\
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tmp = __msa_ori_b(zero_in, 1); \
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tmp_flat5 = __msa_ori_b(zero_in, 1); \
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p4_a_sub_p0 = __msa_asub_u_b(p4_in, p0_in); \
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q4_a_sub_q0 = __msa_asub_u_b(q4_in, q0_in); \
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p5_a_sub_p0 = __msa_asub_u_b(p5_in, p0_in); \
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@@ -95,7 +95,7 @@
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p7_a_sub_p0 = __msa_max_u_b(p7_a_sub_p0, q7_a_sub_q0); \
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flat2_out = __msa_max_u_b(p7_a_sub_p0, flat2_out); \
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\
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flat2_out = (tmp < (v16u8)flat2_out); \
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flat2_out = (tmp_flat5 < (v16u8)flat2_out); \
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flat2_out = __msa_xori_b(flat2_out, 0xff); \
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flat2_out = flat2_out & flat_in; \
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}
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@@ -104,38 +104,38 @@
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p2_filt8_out, p1_filt8_out, p0_filt8_out, q0_filt8_out, \
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q1_filt8_out, q2_filt8_out) \
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{ \
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v8u16 tmp0, tmp1, tmp2; \
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v8u16 tmp_filt8_0, tmp_filt8_1, tmp_filt8_2; \
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\
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tmp2 = p2_in + p1_in + p0_in; \
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tmp0 = p3_in << 1; \
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tmp_filt8_2 = p2_in + p1_in + p0_in; \
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tmp_filt8_0 = p3_in << 1; \
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\
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tmp0 = tmp0 + tmp2 + q0_in; \
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tmp1 = tmp0 + p3_in + p2_in; \
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p2_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp1, 3); \
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tmp_filt8_0 = tmp_filt8_0 + tmp_filt8_2 + q0_in; \
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tmp_filt8_1 = tmp_filt8_0 + p3_in + p2_in; \
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p2_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp_filt8_1, 3); \
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\
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tmp1 = tmp0 + p1_in + q1_in; \
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p1_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp1, 3); \
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tmp_filt8_1 = tmp_filt8_0 + p1_in + q1_in; \
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p1_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp_filt8_1, 3); \
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\
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tmp1 = q2_in + q1_in + q0_in; \
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tmp2 = tmp2 + tmp1; \
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tmp0 = tmp2 + (p0_in); \
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tmp0 = tmp0 + (p3_in); \
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p0_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp0, 3); \
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tmp_filt8_1 = q2_in + q1_in + q0_in; \
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tmp_filt8_2 = tmp_filt8_2 + tmp_filt8_1; \
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tmp_filt8_0 = tmp_filt8_2 + (p0_in); \
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tmp_filt8_0 = tmp_filt8_0 + (p3_in); \
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p0_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp_filt8_0, 3); \
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\
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tmp0 = q2_in + q3_in; \
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tmp0 = p0_in + tmp1 + tmp0; \
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tmp1 = q3_in + q3_in; \
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tmp1 = tmp1 + tmp0; \
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q2_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp1, 3); \
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tmp_filt8_0 = q2_in + q3_in; \
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tmp_filt8_0 = p0_in + tmp_filt8_1 + tmp_filt8_0; \
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tmp_filt8_1 = q3_in + q3_in; \
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tmp_filt8_1 = tmp_filt8_1 + tmp_filt8_0; \
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q2_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp_filt8_1, 3); \
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\
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tmp0 = tmp2 + q3_in; \
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tmp1 = tmp0 + q0_in; \
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q0_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp1, 3); \
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tmp_filt8_0 = tmp_filt8_2 + q3_in; \
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tmp_filt8_1 = tmp_filt8_0 + q0_in; \
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q0_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp_filt8_1, 3); \
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\
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tmp1 = tmp0 - p2_in; \
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tmp0 = q1_in + q3_in; \
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tmp1 = tmp0 + tmp1; \
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q1_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp1, 3); \
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tmp_filt8_1 = tmp_filt8_0 - p2_in; \
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tmp_filt8_0 = q1_in + q3_in; \
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tmp_filt8_1 = tmp_filt8_0 + tmp_filt8_1; \
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q1_filt8_out = (v8i16)__msa_srari_h((v8i16)tmp_filt8_1, 3); \
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}
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#define LPF_MASK_HEV(p3_in, p2_in, p1_in, p0_in, q0_in, q1_in, q2_in, q3_in, \
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@@ -168,20 +168,20 @@
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val_m; \
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})
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#else // !(__mips == 64)
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#define LD(psrc) \
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({ \
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const uint8_t *psrc_m1 = (const uint8_t *)(psrc); \
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uint32_t val0_m, val1_m; \
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uint64_t val_m = 0; \
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\
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val0_m = LW(psrc_m1); \
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val1_m = LW(psrc_m1 + 4); \
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\
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val_m = (uint64_t)(val1_m); \
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val_m = (uint64_t)((val_m << 32) & 0xFFFFFFFF00000000); \
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val_m = (uint64_t)(val_m | (uint64_t)val0_m); \
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\
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val_m; \
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#define LD(psrc) \
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({ \
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const uint8_t *psrc_m1 = (const uint8_t *)(psrc); \
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uint32_t val0_m, val1_m; \
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uint64_t val_m_combined = 0; \
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\
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val0_m = LW(psrc_m1); \
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val1_m = LW(psrc_m1 + 4); \
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\
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val_m_combined = (uint64_t)(val1_m); \
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val_m_combined = (uint64_t)((val_m_combined << 32) & 0xFFFFFFFF00000000); \
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val_m_combined = (uint64_t)(val_m_combined | (uint64_t)val0_m); \
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\
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val_m_combined; \
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})
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#endif // (__mips == 64)
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@@ -2034,13 +2034,12 @@
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pdst, stride) \
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{ \
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v16u8 tmp0_m, tmp1_m, tmp2_m, tmp3_m; \
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uint8_t *pdst_m = (uint8_t *)(pdst); \
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\
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tmp0_m = PCKEV_XORI128_UB(in0, in1); \
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tmp1_m = PCKEV_XORI128_UB(in2, in3); \
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ILVR_D2_UB(dst1, dst0, dst3, dst2, tmp2_m, tmp3_m); \
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AVER_UB2_UB(tmp0_m, tmp2_m, tmp1_m, tmp3_m, tmp0_m, tmp1_m); \
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ST8x4_UB(tmp0_m, tmp1_m, pdst_m, stride); \
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ST8x4_UB(tmp0_m, tmp1_m, pdst, stride); \
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}
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/* Description : Pack even byte elements and store byte vector in destination
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@@ -16,18 +16,18 @@
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extern const uint8_t mc_filt_mask_arr[16 * 3];
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#define FILT_8TAP_DPADD_S_H(vec0, vec1, vec2, vec3, filt0, filt1, filt2, \
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filt3) \
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({ \
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v8i16 tmp0, tmp1; \
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\
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tmp0 = __msa_dotp_s_h((v16i8)vec0, (v16i8)filt0); \
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tmp0 = __msa_dpadd_s_h(tmp0, (v16i8)vec1, (v16i8)filt1); \
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tmp1 = __msa_dotp_s_h((v16i8)vec2, (v16i8)filt2); \
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tmp1 = __msa_dpadd_s_h(tmp1, (v16i8)vec3, (v16i8)filt3); \
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tmp0 = __msa_adds_s_h(tmp0, tmp1); \
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\
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tmp0; \
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#define FILT_8TAP_DPADD_S_H(vec0, vec1, vec2, vec3, filt0, filt1, filt2, \
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filt3) \
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({ \
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v8i16 tmp_dpadd_0, tmp_dpadd_1; \
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\
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tmp_dpadd_0 = __msa_dotp_s_h((v16i8)vec0, (v16i8)filt0); \
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tmp_dpadd_0 = __msa_dpadd_s_h(tmp_dpadd_0, (v16i8)vec1, (v16i8)filt1); \
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tmp_dpadd_1 = __msa_dotp_s_h((v16i8)vec2, (v16i8)filt2); \
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tmp_dpadd_1 = __msa_dpadd_s_h(tmp_dpadd_1, (v16i8)vec3, (v16i8)filt3); \
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tmp_dpadd_0 = __msa_adds_s_h(tmp_dpadd_0, tmp_dpadd_1); \
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\
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tmp_dpadd_0; \
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})
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#define HORIZ_8TAP_FILT(src0, src1, mask0, mask1, mask2, mask3, filt_h0, \
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@@ -114,11 +114,10 @@ extern const uint8_t mc_filt_mask_arr[16 * 3];
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stride) \
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{ \
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v16u8 tmp0_m, tmp1_m, tmp2_m, tmp3_m; \
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uint8_t *pdst_m = (uint8_t *)(pdst); \
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\
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PCKEV_B2_UB(in2, in1, in4, in3, tmp0_m, tmp1_m); \
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PCKEV_D2_UB(dst1, dst0, dst3, dst2, tmp2_m, tmp3_m); \
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AVER_UB2_UB(tmp0_m, tmp2_m, tmp1_m, tmp3_m, tmp0_m, tmp1_m); \
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ST8x4_UB(tmp0_m, tmp1_m, pdst_m, stride); \
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ST8x4_UB(tmp0_m, tmp1_m, pdst, stride); \
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}
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#endif /* VPX_DSP_MIPS_VPX_CONVOLVE_MSA_H_ */
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