Merge "Add vp9_iht16x16_256_add_neon()"
This commit is contained in:
commit
932835677f
@ -255,11 +255,14 @@ class TransTestBase : public ::testing::TestWithParam<DctParam> {
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}
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EXPECT_GE(static_cast<uint32_t>(limit), max_error)
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<< "Error: 4x4 FHT/IHT has an individual round trip error > " << limit;
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<< "Error: " << size_ << "x" << size_
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<< " transform/inverse transform has an individual round trip error > "
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<< limit;
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EXPECT_GE(count_test_block * limit, total_error)
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<< "Error: 4x4 FHT/IHT has average round trip error > " << limit
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<< " per block";
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<< "Error: " << size_ << "x" << size_
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<< " transform/inverse transform has average round trip error > "
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<< limit << " per block";
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}
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void RunCoeffCheck() {
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@ -330,8 +333,8 @@ class TransTestBase : public ::testing::TestWithParam<DctParam> {
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EXPECT_GE(
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4 * DCT_MAX_VALUE << (bit_depth_ - 8),
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abs(output_block.TopLeftPixel()[h * output_block.stride() + w]))
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<< "Error: 4x4 FDCT has coefficient larger than "
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"4*DCT_MAX_VALUE"
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<< "Error: " << size_ << "x" << size_
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<< " transform has coefficient larger than 4*DCT_MAX_VALUE"
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<< " at " << w << "," << h;
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if (::testing::Test::HasFailure()) {
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printf("Size: %d Transform type: %d\n", size_, tx_type_);
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@ -396,8 +399,14 @@ class TransTestBase : public ::testing::TestWithParam<DctParam> {
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}
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const uint32_t error = diff * diff;
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EXPECT_GE(static_cast<uint32_t>(limit), error)
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<< "Error: " << size_ << "x" << size_ << " IDCT has error "
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<< error << " at " << w << "," << h;
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<< "Error: " << size_ << "x" << size_
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<< " inverse transform has error " << error << " at " << w << ","
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<< h << " org:" << (int)src_[h * stride_ + w]
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<< " opt:" << (int)dst_[h * stride_ + w];
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if (::testing::Test::HasFailure()) {
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printf("Size: %d Transform type: %d\n", size_, tx_type_);
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return;
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}
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}
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}
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}
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@ -626,7 +635,8 @@ static const FuncInfo ht_neon_func_info[] = {
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2 },
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#endif
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{ &vp9_fht4x4_c, &iht_wrapper<vp9_iht4x4_16_add_neon>, 4, 1 },
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{ &vp9_fht8x8_c, &iht_wrapper<vp9_iht8x8_64_add_neon>, 8, 1 }
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{ &vp9_fht8x8_c, &iht_wrapper<vp9_iht8x8_64_add_neon>, 8, 1 },
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{ &vp9_fht16x16_c, &iht_wrapper<vp9_iht16x16_256_add_neon>, 16, 1 }
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};
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INSTANTIATE_TEST_CASE_P(
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306
vp9/common/arm/neon/vp9_iht16x16_add_neon.c
Normal file
306
vp9/common/arm/neon/vp9_iht16x16_add_neon.c
Normal file
@ -0,0 +1,306 @@
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/*
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* Copyright (c) 2018 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <arm_neon.h>
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#include <assert.h>
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#include "./vp9_rtcd.h"
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#include "./vpx_config.h"
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#include "vp9/common/vp9_common.h"
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#include "vp9/common/arm/neon/vp9_iht_neon.h"
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#include "vpx_dsp/arm/idct_neon.h"
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#include "vpx_dsp/arm/mem_neon.h"
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#include "vpx_dsp/arm/transpose_neon.h"
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static void iadst16x16_256_add_half1d(const void *const input, int16_t *output,
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void *const dest, const int stride,
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const int highbd_flag) {
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int16x8_t in[16], out[16];
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const int16x4_t c_1_31_5_27 =
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create_s16x4_neon(cospi_1_64, cospi_31_64, cospi_5_64, cospi_27_64);
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const int16x4_t c_9_23_13_19 =
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create_s16x4_neon(cospi_9_64, cospi_23_64, cospi_13_64, cospi_19_64);
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const int16x4_t c_17_15_21_11 =
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create_s16x4_neon(cospi_17_64, cospi_15_64, cospi_21_64, cospi_11_64);
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const int16x4_t c_25_7_29_3 =
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create_s16x4_neon(cospi_25_64, cospi_7_64, cospi_29_64, cospi_3_64);
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const int16x4_t c_4_28_20_12 =
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create_s16x4_neon(cospi_4_64, cospi_28_64, cospi_20_64, cospi_12_64);
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const int16x4_t c_16_n16_8_24 =
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create_s16x4_neon(cospi_16_64, -cospi_16_64, cospi_8_64, cospi_24_64);
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int16x8_t x[16], t[8];
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int32x4_t s0[2], s1[2], s2[2], s3[2], s4[2], s5[2], s6[2], s7[2];
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int32x4_t s8[2], s9[2], s10[2], s11[2], s12[2], s13[2], s14[2], s15[2];
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// Load input (16x8)
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if (output) {
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const tran_low_t *inputT = (const tran_low_t *)input;
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in[0] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[8] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[1] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[9] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[2] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[10] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[3] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[11] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[4] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[12] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[5] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[13] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[6] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[14] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[7] = load_tran_low_to_s16q(inputT);
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inputT += 8;
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in[15] = load_tran_low_to_s16q(inputT);
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} else {
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const int16_t *inputT = (const int16_t *)input;
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in[0] = vld1q_s16(inputT);
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inputT += 8;
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in[8] = vld1q_s16(inputT);
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inputT += 8;
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in[1] = vld1q_s16(inputT);
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inputT += 8;
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in[9] = vld1q_s16(inputT);
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inputT += 8;
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in[2] = vld1q_s16(inputT);
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inputT += 8;
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in[10] = vld1q_s16(inputT);
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inputT += 8;
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in[3] = vld1q_s16(inputT);
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inputT += 8;
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in[11] = vld1q_s16(inputT);
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inputT += 8;
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in[4] = vld1q_s16(inputT);
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inputT += 8;
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in[12] = vld1q_s16(inputT);
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inputT += 8;
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in[5] = vld1q_s16(inputT);
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inputT += 8;
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in[13] = vld1q_s16(inputT);
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inputT += 8;
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in[6] = vld1q_s16(inputT);
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inputT += 8;
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in[14] = vld1q_s16(inputT);
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inputT += 8;
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in[7] = vld1q_s16(inputT);
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inputT += 8;
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in[15] = vld1q_s16(inputT);
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}
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// Transpose
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transpose_s16_8x8(&in[0], &in[1], &in[2], &in[3], &in[4], &in[5], &in[6],
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&in[7]);
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transpose_s16_8x8(&in[8], &in[9], &in[10], &in[11], &in[12], &in[13], &in[14],
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&in[15]);
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x[0] = in[15];
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x[1] = in[0];
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x[2] = in[13];
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x[3] = in[2];
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x[4] = in[11];
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x[5] = in[4];
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x[6] = in[9];
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x[7] = in[6];
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x[8] = in[7];
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x[9] = in[8];
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x[10] = in[5];
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x[11] = in[10];
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x[12] = in[3];
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x[13] = in[12];
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x[14] = in[1];
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x[15] = in[14];
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// stage 1
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iadst_butterfly_lane_0_1_neon(x[0], x[1], c_1_31_5_27, s0, s1);
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iadst_butterfly_lane_2_3_neon(x[2], x[3], c_1_31_5_27, s2, s3);
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iadst_butterfly_lane_0_1_neon(x[4], x[5], c_9_23_13_19, s4, s5);
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iadst_butterfly_lane_2_3_neon(x[6], x[7], c_9_23_13_19, s6, s7);
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iadst_butterfly_lane_0_1_neon(x[8], x[9], c_17_15_21_11, s8, s9);
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iadst_butterfly_lane_2_3_neon(x[10], x[11], c_17_15_21_11, s10, s11);
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iadst_butterfly_lane_0_1_neon(x[12], x[13], c_25_7_29_3, s12, s13);
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iadst_butterfly_lane_2_3_neon(x[14], x[15], c_25_7_29_3, s14, s15);
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x[0] = add_dct_const_round_shift_low_8(s0, s8);
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x[1] = add_dct_const_round_shift_low_8(s1, s9);
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x[2] = add_dct_const_round_shift_low_8(s2, s10);
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x[3] = add_dct_const_round_shift_low_8(s3, s11);
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x[4] = add_dct_const_round_shift_low_8(s4, s12);
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x[5] = add_dct_const_round_shift_low_8(s5, s13);
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x[6] = add_dct_const_round_shift_low_8(s6, s14);
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x[7] = add_dct_const_round_shift_low_8(s7, s15);
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x[8] = sub_dct_const_round_shift_low_8(s0, s8);
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x[9] = sub_dct_const_round_shift_low_8(s1, s9);
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x[10] = sub_dct_const_round_shift_low_8(s2, s10);
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x[11] = sub_dct_const_round_shift_low_8(s3, s11);
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x[12] = sub_dct_const_round_shift_low_8(s4, s12);
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x[13] = sub_dct_const_round_shift_low_8(s5, s13);
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x[14] = sub_dct_const_round_shift_low_8(s6, s14);
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x[15] = sub_dct_const_round_shift_low_8(s7, s15);
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// stage 2
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t[0] = x[0];
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t[1] = x[1];
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t[2] = x[2];
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t[3] = x[3];
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t[4] = x[4];
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t[5] = x[5];
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t[6] = x[6];
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t[7] = x[7];
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iadst_butterfly_lane_0_1_neon(x[8], x[9], c_4_28_20_12, s8, s9);
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iadst_butterfly_lane_2_3_neon(x[10], x[11], c_4_28_20_12, s10, s11);
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iadst_butterfly_lane_1_0_neon(x[13], x[12], c_4_28_20_12, s13, s12);
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iadst_butterfly_lane_3_2_neon(x[15], x[14], c_4_28_20_12, s15, s14);
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x[0] = vaddq_s16(t[0], t[4]);
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x[1] = vaddq_s16(t[1], t[5]);
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x[2] = vaddq_s16(t[2], t[6]);
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x[3] = vaddq_s16(t[3], t[7]);
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x[4] = vsubq_s16(t[0], t[4]);
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x[5] = vsubq_s16(t[1], t[5]);
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x[6] = vsubq_s16(t[2], t[6]);
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x[7] = vsubq_s16(t[3], t[7]);
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x[8] = add_dct_const_round_shift_low_8(s8, s12);
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x[9] = add_dct_const_round_shift_low_8(s9, s13);
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x[10] = add_dct_const_round_shift_low_8(s10, s14);
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x[11] = add_dct_const_round_shift_low_8(s11, s15);
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x[12] = sub_dct_const_round_shift_low_8(s8, s12);
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x[13] = sub_dct_const_round_shift_low_8(s9, s13);
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x[14] = sub_dct_const_round_shift_low_8(s10, s14);
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x[15] = sub_dct_const_round_shift_low_8(s11, s15);
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// stage 3
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t[0] = x[0];
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t[1] = x[1];
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t[2] = x[2];
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t[3] = x[3];
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iadst_butterfly_lane_2_3_neon(x[4], x[5], c_16_n16_8_24, s4, s5);
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iadst_butterfly_lane_3_2_neon(x[7], x[6], c_16_n16_8_24, s7, s6);
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t[8] = x[8];
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t[9] = x[9];
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t[10] = x[10];
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t[11] = x[11];
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iadst_butterfly_lane_2_3_neon(x[12], x[13], c_16_n16_8_24, s12, s13);
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iadst_butterfly_lane_3_2_neon(x[15], x[14], c_16_n16_8_24, s15, s14);
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x[0] = vaddq_s16(t[0], t[2]);
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x[1] = vaddq_s16(t[1], t[3]);
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x[2] = vsubq_s16(t[0], t[2]);
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x[3] = vsubq_s16(t[1], t[3]);
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x[4] = add_dct_const_round_shift_low_8(s4, s6);
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x[5] = add_dct_const_round_shift_low_8(s5, s7);
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x[6] = sub_dct_const_round_shift_low_8(s4, s6);
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x[7] = sub_dct_const_round_shift_low_8(s5, s7);
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x[8] = vaddq_s16(t[8], t[10]);
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x[9] = vaddq_s16(t[9], t[11]);
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x[10] = vsubq_s16(t[8], t[10]);
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x[11] = vsubq_s16(t[9], t[11]);
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x[12] = add_dct_const_round_shift_low_8(s12, s14);
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x[13] = add_dct_const_round_shift_low_8(s13, s15);
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x[14] = sub_dct_const_round_shift_low_8(s12, s14);
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x[15] = sub_dct_const_round_shift_low_8(s13, s15);
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// stage 4
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{
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const int16x8_t sum = vaddq_s16(x[2], x[3]);
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const int16x8_t sub = vsubq_s16(x[2], x[3]);
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x[2] = iadst_half_butterfly_neg_neon(sum, c_16_n16_8_24);
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x[3] = iadst_half_butterfly_pos_neon(sub, c_16_n16_8_24);
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}
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{
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const int16x8_t sum = vaddq_s16(x[7], x[6]);
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const int16x8_t sub = vsubq_s16(x[7], x[6]);
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x[6] = iadst_half_butterfly_pos_neon(sum, c_16_n16_8_24);
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x[7] = iadst_half_butterfly_pos_neon(sub, c_16_n16_8_24);
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}
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{
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const int16x8_t sum = vaddq_s16(x[11], x[10]);
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const int16x8_t sub = vsubq_s16(x[11], x[10]);
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x[10] = iadst_half_butterfly_pos_neon(sum, c_16_n16_8_24);
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x[11] = iadst_half_butterfly_pos_neon(sub, c_16_n16_8_24);
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}
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{
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const int16x8_t sum = vaddq_s16(x[14], x[15]);
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const int16x8_t sub = vsubq_s16(x[14], x[15]);
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x[14] = iadst_half_butterfly_neg_neon(sum, c_16_n16_8_24);
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x[15] = iadst_half_butterfly_pos_neon(sub, c_16_n16_8_24);
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}
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out[0] = x[0];
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out[1] = vnegq_s16(x[8]);
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out[2] = x[12];
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out[3] = vnegq_s16(x[4]);
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out[4] = x[6];
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out[5] = x[14];
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out[6] = x[10];
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out[7] = x[2];
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out[8] = x[3];
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out[9] = x[11];
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out[10] = x[15];
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out[11] = x[7];
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out[12] = x[5];
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out[13] = vnegq_s16(x[13]);
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out[14] = x[9];
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out[15] = vnegq_s16(x[1]);
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if (output) {
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idct16x16_store_pass1(out, output);
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} else {
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if (highbd_flag) {
|
||||
idct16x16_add_store_bd8(out, dest, stride);
|
||||
} else {
|
||||
idct16x16_add_store(out, dest, stride);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
typedef void (*iht_1d)(const void *const input, int16_t *output,
|
||||
void *const dest, const int stride,
|
||||
const int highbd_flag);
|
||||
|
||||
typedef struct {
|
||||
iht_1d cols, rows; // vertical and horizontal
|
||||
} iht_2d;
|
||||
|
||||
void vp9_iht16x16_256_add_neon(const tran_low_t *input, uint8_t *dest,
|
||||
int stride, int tx_type) {
|
||||
static const iht_2d IHT_16[] = {
|
||||
{ vpx_idct16x16_256_add_half1d,
|
||||
vpx_idct16x16_256_add_half1d }, // DCT_DCT = 0
|
||||
{ iadst16x16_256_add_half1d,
|
||||
vpx_idct16x16_256_add_half1d }, // ADST_DCT = 1
|
||||
{ vpx_idct16x16_256_add_half1d,
|
||||
iadst16x16_256_add_half1d }, // DCT_ADST = 2
|
||||
{ iadst16x16_256_add_half1d, iadst16x16_256_add_half1d } // ADST_ADST = 3
|
||||
};
|
||||
const iht_2d ht = IHT_16[tx_type];
|
||||
int16_t row_output[16 * 16];
|
||||
|
||||
// pass 1
|
||||
ht.rows(input, row_output, dest, stride, 0); // upper 8 rows
|
||||
ht.rows(input + 8 * 16, row_output + 8, dest, stride, 0); // lower 8 rows
|
||||
|
||||
// pass 2
|
||||
ht.cols(row_output, NULL, dest, stride, 0); // left 8 columns
|
||||
ht.cols(row_output + 16 * 8, NULL, dest + 8, stride, 0); // right 8 columns
|
||||
}
|
@ -71,6 +71,24 @@ static INLINE void iadst_half_butterfly_neon(int16x8_t *const x,
|
||||
x[1] = dct_const_round_shift_low_8(t1);
|
||||
}
|
||||
|
||||
static INLINE int16x8_t iadst_half_butterfly_neg_neon(const int16x8_t in,
|
||||
const int16x4_t c) {
|
||||
int32x4_t t[2];
|
||||
|
||||
t[0] = vmull_lane_s16(vget_low_s16(in), c, 1);
|
||||
t[1] = vmull_lane_s16(vget_high_s16(in), c, 1);
|
||||
return dct_const_round_shift_low_8(t);
|
||||
}
|
||||
|
||||
static INLINE int16x8_t iadst_half_butterfly_pos_neon(const int16x8_t in,
|
||||
const int16x4_t c) {
|
||||
int32x4_t t[2];
|
||||
|
||||
t[0] = vmull_lane_s16(vget_low_s16(in), c, 0);
|
||||
t[1] = vmull_lane_s16(vget_high_s16(in), c, 0);
|
||||
return dct_const_round_shift_low_8(t);
|
||||
}
|
||||
|
||||
static INLINE void iadst_butterfly_lane_0_1_neon(const int16x8_t in0,
|
||||
const int16x8_t in1,
|
||||
const int16x4_t c,
|
||||
@ -103,6 +121,22 @@ static INLINE void iadst_butterfly_lane_2_3_neon(const int16x8_t in0,
|
||||
s1[1] = vmlsl_lane_s16(s1[1], vget_high_s16(in1), c, 2);
|
||||
}
|
||||
|
||||
static INLINE void iadst_butterfly_lane_1_0_neon(const int16x8_t in0,
|
||||
const int16x8_t in1,
|
||||
const int16x4_t c,
|
||||
int32x4_t *const s0,
|
||||
int32x4_t *const s1) {
|
||||
s0[0] = vmull_lane_s16(vget_low_s16(in0), c, 1);
|
||||
s0[1] = vmull_lane_s16(vget_high_s16(in0), c, 1);
|
||||
s1[0] = vmull_lane_s16(vget_low_s16(in0), c, 0);
|
||||
s1[1] = vmull_lane_s16(vget_high_s16(in0), c, 0);
|
||||
|
||||
s0[0] = vmlal_lane_s16(s0[0], vget_low_s16(in1), c, 0);
|
||||
s0[1] = vmlal_lane_s16(s0[1], vget_high_s16(in1), c, 0);
|
||||
s1[0] = vmlsl_lane_s16(s1[0], vget_low_s16(in1), c, 1);
|
||||
s1[1] = vmlsl_lane_s16(s1[1], vget_high_s16(in1), c, 1);
|
||||
}
|
||||
|
||||
static INLINE void iadst_butterfly_lane_3_2_neon(const int16x8_t in0,
|
||||
const int16x8_t in1,
|
||||
const int16x4_t c,
|
||||
|
@ -69,7 +69,7 @@ if (vpx_config("CONFIG_EMULATE_HARDWARE") ne "yes") {
|
||||
# CONFIG_VP9_HIGHBITDEPTH is off.
|
||||
specialize qw/vp9_iht4x4_16_add neon sse2/;
|
||||
specialize qw/vp9_iht8x8_64_add neon sse2/;
|
||||
specialize qw/vp9_iht16x16_256_add sse2/;
|
||||
specialize qw/vp9_iht16x16_256_add neon sse2/;
|
||||
if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") ne "yes") {
|
||||
# Note that these specializations are appended to the above ones.
|
||||
specialize qw/vp9_iht4x4_16_add dspr2 msa/;
|
||||
|
@ -70,6 +70,7 @@ VP9_COMMON_SRCS-$(HAVE_MSA) += common/mips/msa/vp9_idct16x16_msa.c
|
||||
VP9_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp9_idct_intrin_sse2.c
|
||||
VP9_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/vp9_iht4x4_add_neon.c
|
||||
VP9_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/vp9_iht8x8_add_neon.c
|
||||
VP9_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/vp9_iht16x16_add_neon.c
|
||||
VP9_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/vp9_iht_neon.h
|
||||
|
||||
ifeq ($(CONFIG_VP9_POSTPROC),yes)
|
||||
|
@ -63,65 +63,6 @@ static INLINE void idct_cospi_16_16_d(const int16x4_t s0, const int16x4_t s1,
|
||||
wrap_low_4x2(t32, d0, d1);
|
||||
}
|
||||
|
||||
static INLINE void idct16x16_add_store(const int16x8_t *const out,
|
||||
uint8_t *dest, const int stride) {
|
||||
// Add the result to dest
|
||||
idct16x16_add8x1(out[0], &dest, stride);
|
||||
idct16x16_add8x1(out[1], &dest, stride);
|
||||
idct16x16_add8x1(out[2], &dest, stride);
|
||||
idct16x16_add8x1(out[3], &dest, stride);
|
||||
idct16x16_add8x1(out[4], &dest, stride);
|
||||
idct16x16_add8x1(out[5], &dest, stride);
|
||||
idct16x16_add8x1(out[6], &dest, stride);
|
||||
idct16x16_add8x1(out[7], &dest, stride);
|
||||
idct16x16_add8x1(out[8], &dest, stride);
|
||||
idct16x16_add8x1(out[9], &dest, stride);
|
||||
idct16x16_add8x1(out[10], &dest, stride);
|
||||
idct16x16_add8x1(out[11], &dest, stride);
|
||||
idct16x16_add8x1(out[12], &dest, stride);
|
||||
idct16x16_add8x1(out[13], &dest, stride);
|
||||
idct16x16_add8x1(out[14], &dest, stride);
|
||||
idct16x16_add8x1(out[15], &dest, stride);
|
||||
}
|
||||
|
||||
static INLINE void idct16x16_add_store_bd8(int16x8_t *const out, uint16_t *dest,
|
||||
const int stride) {
|
||||
// Add the result to dest
|
||||
const int16x8_t max = vdupq_n_s16((1 << 8) - 1);
|
||||
out[0] = vrshrq_n_s16(out[0], 6);
|
||||
out[1] = vrshrq_n_s16(out[1], 6);
|
||||
out[2] = vrshrq_n_s16(out[2], 6);
|
||||
out[3] = vrshrq_n_s16(out[3], 6);
|
||||
out[4] = vrshrq_n_s16(out[4], 6);
|
||||
out[5] = vrshrq_n_s16(out[5], 6);
|
||||
out[6] = vrshrq_n_s16(out[6], 6);
|
||||
out[7] = vrshrq_n_s16(out[7], 6);
|
||||
out[8] = vrshrq_n_s16(out[8], 6);
|
||||
out[9] = vrshrq_n_s16(out[9], 6);
|
||||
out[10] = vrshrq_n_s16(out[10], 6);
|
||||
out[11] = vrshrq_n_s16(out[11], 6);
|
||||
out[12] = vrshrq_n_s16(out[12], 6);
|
||||
out[13] = vrshrq_n_s16(out[13], 6);
|
||||
out[14] = vrshrq_n_s16(out[14], 6);
|
||||
out[15] = vrshrq_n_s16(out[15], 6);
|
||||
highbd_idct16x16_add8x1(out[0], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[1], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[2], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[3], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[4], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[5], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[6], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[7], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[8], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[9], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[10], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[11], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[12], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[13], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[14], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[15], max, &dest, stride);
|
||||
}
|
||||
|
||||
void vpx_idct16x16_256_add_half1d(const void *const input, int16_t *output,
|
||||
void *const dest, const int stride,
|
||||
const int highbd_flag) {
|
||||
|
@ -773,6 +773,27 @@ static INLINE void idct16x16_add8x1(const int16x8_t a, uint8_t **const dest,
|
||||
*dest += stride;
|
||||
}
|
||||
|
||||
static INLINE void idct16x16_add_store(const int16x8_t *const out,
|
||||
uint8_t *dest, const int stride) {
|
||||
// Add the result to dest
|
||||
idct16x16_add8x1(out[0], &dest, stride);
|
||||
idct16x16_add8x1(out[1], &dest, stride);
|
||||
idct16x16_add8x1(out[2], &dest, stride);
|
||||
idct16x16_add8x1(out[3], &dest, stride);
|
||||
idct16x16_add8x1(out[4], &dest, stride);
|
||||
idct16x16_add8x1(out[5], &dest, stride);
|
||||
idct16x16_add8x1(out[6], &dest, stride);
|
||||
idct16x16_add8x1(out[7], &dest, stride);
|
||||
idct16x16_add8x1(out[8], &dest, stride);
|
||||
idct16x16_add8x1(out[9], &dest, stride);
|
||||
idct16x16_add8x1(out[10], &dest, stride);
|
||||
idct16x16_add8x1(out[11], &dest, stride);
|
||||
idct16x16_add8x1(out[12], &dest, stride);
|
||||
idct16x16_add8x1(out[13], &dest, stride);
|
||||
idct16x16_add8x1(out[14], &dest, stride);
|
||||
idct16x16_add8x1(out[15], &dest, stride);
|
||||
}
|
||||
|
||||
static INLINE void highbd_idct16x16_add8x1(const int16x8_t a,
|
||||
const int16x8_t max,
|
||||
uint16_t **const dest,
|
||||
@ -785,6 +806,44 @@ static INLINE void highbd_idct16x16_add8x1(const int16x8_t a,
|
||||
*dest += stride;
|
||||
}
|
||||
|
||||
static INLINE void idct16x16_add_store_bd8(int16x8_t *const out, uint16_t *dest,
|
||||
const int stride) {
|
||||
// Add the result to dest
|
||||
const int16x8_t max = vdupq_n_s16((1 << 8) - 1);
|
||||
out[0] = vrshrq_n_s16(out[0], 6);
|
||||
out[1] = vrshrq_n_s16(out[1], 6);
|
||||
out[2] = vrshrq_n_s16(out[2], 6);
|
||||
out[3] = vrshrq_n_s16(out[3], 6);
|
||||
out[4] = vrshrq_n_s16(out[4], 6);
|
||||
out[5] = vrshrq_n_s16(out[5], 6);
|
||||
out[6] = vrshrq_n_s16(out[6], 6);
|
||||
out[7] = vrshrq_n_s16(out[7], 6);
|
||||
out[8] = vrshrq_n_s16(out[8], 6);
|
||||
out[9] = vrshrq_n_s16(out[9], 6);
|
||||
out[10] = vrshrq_n_s16(out[10], 6);
|
||||
out[11] = vrshrq_n_s16(out[11], 6);
|
||||
out[12] = vrshrq_n_s16(out[12], 6);
|
||||
out[13] = vrshrq_n_s16(out[13], 6);
|
||||
out[14] = vrshrq_n_s16(out[14], 6);
|
||||
out[15] = vrshrq_n_s16(out[15], 6);
|
||||
highbd_idct16x16_add8x1(out[0], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[1], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[2], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[3], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[4], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[5], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[6], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[7], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[8], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[9], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[10], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[11], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[12], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[13], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[14], max, &dest, stride);
|
||||
highbd_idct16x16_add8x1(out[15], max, &dest, stride);
|
||||
}
|
||||
|
||||
static INLINE void highbd_idct16x16_add8x1_bd8(const int16x8_t a,
|
||||
uint16_t **const dest,
|
||||
const int stride) {
|
||||
|
Loading…
Reference in New Issue
Block a user