Add vpx_highbd_idct4x4_16_add_sse4_1()
BUG=webm:1412 Change-Id: Ie33482409351a01be4e89466b0441834eb1e905a
This commit is contained in:
Linfeng Zhang
parent
b8a4b5dd8d
commit
8253a27904
@ -477,7 +477,9 @@ const PartialInvTxfmParam c_partial_idct_tests[] = {
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INSTANTIATE_TEST_CASE_P(C, PartialIDctTest,
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::testing::ValuesIn(c_partial_idct_tests));
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#if HAVE_NEON && !CONFIG_EMULATE_HARDWARE
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#if !CONFIG_EMULATE_HARDWARE
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#if HAVE_NEON
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const PartialInvTxfmParam neon_partial_idct_tests[] = {
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#if CONFIG_VP9_HIGHBITDEPTH
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make_tuple(&vpx_highbd_fdct32x32_c,
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@ -625,9 +627,9 @@ const PartialInvTxfmParam neon_partial_idct_tests[] = {
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INSTANTIATE_TEST_CASE_P(NEON, PartialIDctTest,
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::testing::ValuesIn(neon_partial_idct_tests));
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#endif // HAVE_NEON && !CONFIG_EMULATE_HARDWARE
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#endif // HAVE_NEON
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#if HAVE_SSE2 && !CONFIG_EMULATE_HARDWARE
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#if HAVE_SSE2
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// 32x32_135_ is implemented using the 1024 version.
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const PartialInvTxfmParam sse2_partial_idct_tests[] = {
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#if CONFIG_VP9_HIGHBITDEPTH
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@ -734,9 +736,9 @@ const PartialInvTxfmParam sse2_partial_idct_tests[] = {
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INSTANTIATE_TEST_CASE_P(SSE2, PartialIDctTest,
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::testing::ValuesIn(sse2_partial_idct_tests));
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#endif // HAVE_SSE2 && !CONFIG_EMULATE_HARDWARE
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#endif // HAVE_SSE2
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#if HAVE_SSSE3 && !CONFIG_EMULATE_HARDWARE
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#if HAVE_SSSE3
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const PartialInvTxfmParam ssse3_partial_idct_tests[] = {
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make_tuple(&vpx_fdct32x32_c, &wrapper<vpx_idct32x32_135_add_c>,
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&wrapper<vpx_idct32x32_135_add_ssse3>, TX_32X32, 135, 8, 1),
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@ -748,9 +750,26 @@ const PartialInvTxfmParam ssse3_partial_idct_tests[] = {
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INSTANTIATE_TEST_CASE_P(SSSE3, PartialIDctTest,
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::testing::ValuesIn(ssse3_partial_idct_tests));
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#endif // HAVE_SSSE3 && ARCH_X86_64 && !CONFIG_EMULATE_HARDWARE
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#endif // HAVE_SSSE3
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#if HAVE_DSPR2 && !CONFIG_EMULATE_HARDWARE && !CONFIG_VP9_HIGHBITDEPTH
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#if HAVE_SSE4_1 && CONFIG_VP9_HIGHBITDEPTH
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const PartialInvTxfmParam sse4_1_partial_idct_tests[] = {
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make_tuple(
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&vpx_highbd_fdct4x4_c, &highbd_wrapper<vpx_highbd_idct4x4_16_add_c>,
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&highbd_wrapper<vpx_highbd_idct4x4_16_add_sse4_1>, TX_4X4, 16, 8, 2),
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make_tuple(
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&vpx_highbd_fdct4x4_c, &highbd_wrapper<vpx_highbd_idct4x4_16_add_c>,
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&highbd_wrapper<vpx_highbd_idct4x4_16_add_sse4_1>, TX_4X4, 16, 10, 2),
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make_tuple(
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&vpx_highbd_fdct4x4_c, &highbd_wrapper<vpx_highbd_idct4x4_16_add_c>,
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&highbd_wrapper<vpx_highbd_idct4x4_16_add_sse4_1>, TX_4X4, 16, 12, 2)
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};
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INSTANTIATE_TEST_CASE_P(SSE4_1, PartialIDctTest,
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::testing::ValuesIn(sse4_1_partial_idct_tests));
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#endif // HAVE_SSE4_1 && CONFIG_VP9_HIGHBITDEPTH
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#if HAVE_DSPR2 && !CONFIG_VP9_HIGHBITDEPTH
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const PartialInvTxfmParam dspr2_partial_idct_tests[] = {
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make_tuple(&vpx_fdct32x32_c, &wrapper<vpx_idct32x32_1024_add_c>,
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&wrapper<vpx_idct32x32_1024_add_dspr2>, TX_32X32, 1024, 8, 1),
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@ -778,9 +797,9 @@ const PartialInvTxfmParam dspr2_partial_idct_tests[] = {
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INSTANTIATE_TEST_CASE_P(DSPR2, PartialIDctTest,
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::testing::ValuesIn(dspr2_partial_idct_tests));
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#endif // HAVE_DSPR2 && !CONFIG_EMULATE_HARDWARE && !CONFIG_VP9_HIGHBITDEPTH
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#endif // HAVE_DSPR2 && !CONFIG_VP9_HIGHBITDEPTH
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#if HAVE_MSA && !CONFIG_EMULATE_HARDWARE && !CONFIG_VP9_HIGHBITDEPTH
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#if HAVE_MSA && !CONFIG_VP9_HIGHBITDEPTH
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// 32x32_135_ is implemented using the 1024 version.
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const PartialInvTxfmParam msa_partial_idct_tests[] = {
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make_tuple(&vpx_fdct32x32_c, &wrapper<vpx_idct32x32_1024_add_c>,
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@ -809,6 +828,8 @@ const PartialInvTxfmParam msa_partial_idct_tests[] = {
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INSTANTIATE_TEST_CASE_P(MSA, PartialIDctTest,
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::testing::ValuesIn(msa_partial_idct_tests));
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#endif // HAVE_MSA && !CONFIG_EMULATE_HARDWARE && !CONFIG_VP9_HIGHBITDEPTH
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#endif // HAVE_MSA && !CONFIG_VP9_HIGHBITDEPTH
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#endif // !CONFIG_EMULATE_HARDWARE
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} // namespace
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@ -239,6 +239,7 @@ DSP_SRCS-$(HAVE_SSE2) += x86/highbd_idct4x4_add_sse2.c
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DSP_SRCS-$(HAVE_SSE2) += x86/highbd_idct8x8_add_sse2.c
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DSP_SRCS-$(HAVE_SSE2) += x86/highbd_idct16x16_add_sse2.c
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DSP_SRCS-$(HAVE_SSE2) += x86/highbd_idct32x32_add_sse2.c
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DSP_SRCS-$(HAVE_SSE4_1) += x86/highbd_idct4x4_add_sse4.c
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endif # !CONFIG_VP9_HIGHBITDEPTH
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ifeq ($(HAVE_NEON_ASM),yes)
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@ -652,7 +652,7 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") {
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add_proto qw/void vpx_highbd_iwht4x4_1_add/, "const tran_low_t *input, uint16_t *dest, int stride, int bd";
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if (vpx_config("CONFIG_EMULATE_HARDWARE") ne "yes") {
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specialize qw/vpx_highbd_idct4x4_16_add neon sse2/;
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specialize qw/vpx_highbd_idct4x4_16_add neon sse2 sse4_1/;
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specialize qw/vpx_highbd_idct8x8_64_add neon sse2/;
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specialize qw/vpx_highbd_idct8x8_12_add neon sse2/;
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specialize qw/vpx_highbd_idct16x16_256_add neon sse2/;
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@ -12,7 +12,6 @@
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#include "vpx_dsp/x86/highbd_inv_txfm_sse2.h"
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#include "vpx_dsp/x86/inv_txfm_sse2.h"
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#include "vpx_dsp/x86/transpose_sse2.h"
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#include "vpx_dsp/x86/txfm_common_sse2.h"
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static INLINE __m128i dct_const_round_shift_4_sse2(const __m128i in0,
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const __m128i in1) {
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@ -22,16 +21,6 @@ static INLINE __m128i dct_const_round_shift_4_sse2(const __m128i in0,
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return dct_const_round_shift_sse2(t2);
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}
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static INLINE __m128i wraplow_16bit_sse2(const __m128i in0, const __m128i in1,
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const __m128i rounding) {
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__m128i temp[2];
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temp[0] = _mm_add_epi32(in0, rounding);
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temp[1] = _mm_add_epi32(in1, rounding);
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temp[0] = _mm_srai_epi32(temp[0], 4);
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temp[1] = _mm_srai_epi32(temp[1], 4);
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return _mm_packs_epi32(temp[0], temp[1]);
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}
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static INLINE void highbd_idct4_small_sse2(__m128i *const io) {
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const __m128i cospi_p16_p16 = _mm_setr_epi32(cospi_16_64, 0, cospi_16_64, 0);
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const __m128i cospi_p08_p08 = _mm_setr_epi32(cospi_8_64, 0, cospi_8_64, 0);
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@ -100,19 +89,6 @@ static INLINE __m128i multiply_apply_sign_sse2(const __m128i in,
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return _mm_sub_epi64(out, sign);
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}
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static INLINE __m128i dct_const_round_shift_64bit_sse2(const __m128i in) {
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const __m128i t = _mm_add_epi64(
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in,
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_mm_setr_epi32(DCT_CONST_ROUNDING << 2, 0, DCT_CONST_ROUNDING << 2, 0));
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return _mm_srli_si128(t, 2);
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}
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static INLINE __m128i pack_4_sse2(const __m128i in0, const __m128i in1) {
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const __m128i t0 = _mm_unpacklo_epi32(in0, in1); // 0, 2
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const __m128i t1 = _mm_unpackhi_epi32(in0, in1); // 1, 3
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return _mm_unpacklo_epi32(t0, t1); // 0, 1, 2, 3
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}
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static INLINE void highbd_idct4_large_sse2(__m128i *const io) {
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const __m128i cospi_p16_p16 =
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_mm_setr_epi32(cospi_16_64 << 2, 0, cospi_16_64 << 2, 0);
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@ -133,12 +109,12 @@ static INLINE void highbd_idct4_large_sse2(__m128i *const io) {
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temp1[1] = multiply_apply_sign_sse2(temp1[1], sign1[1], cospi_p16_p16);
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temp2[0] = multiply_apply_sign_sse2(temp2[0], sign2[0], cospi_p16_p16);
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temp2[1] = multiply_apply_sign_sse2(temp2[1], sign2[1], cospi_p16_p16);
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temp1[0] = dct_const_round_shift_64bit_sse2(temp1[0]);
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temp1[1] = dct_const_round_shift_64bit_sse2(temp1[1]);
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temp2[0] = dct_const_round_shift_64bit_sse2(temp2[0]);
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temp2[1] = dct_const_round_shift_64bit_sse2(temp2[1]);
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step[0] = pack_4_sse2(temp1[0], temp1[1]);
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step[1] = pack_4_sse2(temp2[0], temp2[1]);
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temp1[0] = dct_const_round_shift_64bit(temp1[0]);
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temp1[1] = dct_const_round_shift_64bit(temp1[1]);
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temp2[0] = dct_const_round_shift_64bit(temp2[0]);
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temp2[1] = dct_const_round_shift_64bit(temp2[1]);
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step[0] = pack_4(temp1[0], temp1[1]);
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step[1] = pack_4(temp2[0], temp2[1]);
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abs_extend_64bit_sse2(io[1], temp1, sign1);
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abs_extend_64bit_sse2(io[3], temp2, sign2);
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@ -154,12 +130,12 @@ static INLINE void highbd_idct4_large_sse2(__m128i *const io) {
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temp1[1] = _mm_sub_epi64(temp1[1], temp2[1]); // [1]*cospi_24 - [3]*cospi_8
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temp2[0] = _mm_add_epi64(temp1[2], temp2[2]); // [1]*cospi_8 + [3]*cospi_24
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temp2[1] = _mm_add_epi64(temp1[3], temp2[3]); // [1]*cospi_8 + [3]*cospi_24
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temp1[0] = dct_const_round_shift_64bit_sse2(temp1[0]);
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temp1[1] = dct_const_round_shift_64bit_sse2(temp1[1]);
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temp2[0] = dct_const_round_shift_64bit_sse2(temp2[0]);
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temp2[1] = dct_const_round_shift_64bit_sse2(temp2[1]);
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step[2] = pack_4_sse2(temp1[0], temp1[1]);
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step[3] = pack_4_sse2(temp2[0], temp2[1]);
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temp1[0] = dct_const_round_shift_64bit(temp1[0]);
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temp1[1] = dct_const_round_shift_64bit(temp1[1]);
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temp2[0] = dct_const_round_shift_64bit(temp2[0]);
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temp2[1] = dct_const_round_shift_64bit(temp2[1]);
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step[2] = pack_4(temp1[0], temp1[1]);
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step[3] = pack_4(temp2[0], temp2[1]);
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// stage 2
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io[0] = _mm_add_epi32(step[0], step[3]); // step[0] + step[3]
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@ -211,31 +187,11 @@ void vpx_highbd_idct4x4_16_add_sse2(const tran_low_t *input, uint16_t *dest,
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highbd_idct4_large_sse2(io);
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highbd_idct4_large_sse2(io);
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}
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io[0] = wraplow_16bit_sse2(io[0], io[1], _mm_set1_epi32(8));
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io[1] = wraplow_16bit_sse2(io[2], io[3], _mm_set1_epi32(8));
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io[0] = wraplow_16bit(io[0], io[1], _mm_set1_epi32(8));
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io[1] = wraplow_16bit(io[2], io[3], _mm_set1_epi32(8));
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}
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// Reconstruction and Store
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{
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__m128i d0 = _mm_loadl_epi64((const __m128i *)dest);
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__m128i d2 = _mm_loadl_epi64((const __m128i *)(dest + stride * 2));
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d0 = _mm_unpacklo_epi64(d0,
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_mm_loadl_epi64((const __m128i *)(dest + stride)));
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d2 = _mm_unpacklo_epi64(
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d2, _mm_loadl_epi64((const __m128i *)(dest + stride * 3)));
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d0 = clamp_high_sse2(_mm_adds_epi16(d0, io[0]), bd);
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d2 = clamp_high_sse2(_mm_adds_epi16(d2, io[1]), bd);
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// store input0
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_mm_storel_epi64((__m128i *)dest, d0);
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// store input1
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d0 = _mm_srli_si128(d0, 8);
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_mm_storel_epi64((__m128i *)(dest + stride), d0);
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// store input2
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_mm_storel_epi64((__m128i *)(dest + stride * 2), d2);
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// store input3
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d2 = _mm_srli_si128(d2, 8);
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_mm_storel_epi64((__m128i *)(dest + stride * 3), d2);
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}
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recon_and_store_4(dest, io, stride, bd);
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}
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void vpx_highbd_idct4x4_1_add_sse2(const tran_low_t *input, uint16_t *dest,
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107
vpx_dsp/x86/highbd_idct4x4_add_sse4.c
Normal file
107
vpx_dsp/x86/highbd_idct4x4_add_sse4.c
Normal file
@ -0,0 +1,107 @@
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/*
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* Copyright (c) 2017 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <smmintrin.h>
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#include "./vpx_dsp_rtcd.h"
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#include "vpx_dsp/x86/highbd_inv_txfm_sse2.h"
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#include "vpx_dsp/x86/inv_txfm_sse2.h"
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#include "vpx_dsp/x86/transpose_sse2.h"
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static INLINE void extend_64bit(const __m128i in,
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__m128i *const out /*out[2]*/) {
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out[0] = _mm_unpacklo_epi32(in, in); // 0, 0, 1, 1
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out[1] = _mm_unpackhi_epi32(in, in); // 2, 2, 3, 3
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}
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static INLINE void highbd_idct4(__m128i *const io) {
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const __m128i cospi_p16_p16 =
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_mm_setr_epi32(cospi_16_64 << 2, 0, cospi_16_64 << 2, 0);
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const __m128i cospi_p08_p08 =
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_mm_setr_epi32(cospi_8_64 << 2, 0, cospi_8_64 << 2, 0);
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const __m128i cospi_p24_p24 =
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_mm_setr_epi32(cospi_24_64 << 2, 0, cospi_24_64 << 2, 0);
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__m128i temp1[4], temp2[4], step[4];
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transpose_32bit_4x4(&io[0], &io[1], &io[2], &io[3]);
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// stage 1
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temp1[0] = _mm_add_epi32(io[0], io[2]); // input[0] + input[2]
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temp2[0] = _mm_sub_epi32(io[0], io[2]); // input[0] - input[2]
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extend_64bit(temp1[0], temp1);
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extend_64bit(temp2[0], temp2);
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temp1[0] = _mm_mul_epi32(temp1[0], cospi_p16_p16);
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temp1[1] = _mm_mul_epi32(temp1[1], cospi_p16_p16);
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temp2[0] = _mm_mul_epi32(temp2[0], cospi_p16_p16);
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temp2[1] = _mm_mul_epi32(temp2[1], cospi_p16_p16);
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temp1[0] = dct_const_round_shift_64bit(temp1[0]);
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temp1[1] = dct_const_round_shift_64bit(temp1[1]);
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temp2[0] = dct_const_round_shift_64bit(temp2[0]);
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temp2[1] = dct_const_round_shift_64bit(temp2[1]);
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step[0] = pack_4(temp1[0], temp1[1]);
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step[1] = pack_4(temp2[0], temp2[1]);
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extend_64bit(io[1], temp1);
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extend_64bit(io[3], temp2);
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temp1[2] = _mm_mul_epi32(temp1[0], cospi_p08_p08);
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temp1[3] = _mm_mul_epi32(temp1[1], cospi_p08_p08);
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temp1[0] = _mm_mul_epi32(temp1[0], cospi_p24_p24);
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temp1[1] = _mm_mul_epi32(temp1[1], cospi_p24_p24);
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temp2[2] = _mm_mul_epi32(temp2[0], cospi_p24_p24);
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temp2[3] = _mm_mul_epi32(temp2[1], cospi_p24_p24);
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temp2[0] = _mm_mul_epi32(temp2[0], cospi_p08_p08);
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temp2[1] = _mm_mul_epi32(temp2[1], cospi_p08_p08);
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temp1[0] = _mm_sub_epi64(temp1[0], temp2[0]); // [1]*cospi_24 - [3]*cospi_8
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temp1[1] = _mm_sub_epi64(temp1[1], temp2[1]); // [1]*cospi_24 - [3]*cospi_8
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temp2[0] = _mm_add_epi64(temp1[2], temp2[2]); // [1]*cospi_8 + [3]*cospi_24
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temp2[1] = _mm_add_epi64(temp1[3], temp2[3]); // [1]*cospi_8 + [3]*cospi_24
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temp1[0] = dct_const_round_shift_64bit(temp1[0]);
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temp1[1] = dct_const_round_shift_64bit(temp1[1]);
|
||||
temp2[0] = dct_const_round_shift_64bit(temp2[0]);
|
||||
temp2[1] = dct_const_round_shift_64bit(temp2[1]);
|
||||
step[2] = pack_4(temp1[0], temp1[1]);
|
||||
step[3] = pack_4(temp2[0], temp2[1]);
|
||||
|
||||
// stage 2
|
||||
io[0] = _mm_add_epi32(step[0], step[3]); // step[0] + step[3]
|
||||
io[1] = _mm_add_epi32(step[1], step[2]); // step[1] + step[2]
|
||||
io[2] = _mm_sub_epi32(step[1], step[2]); // step[1] - step[2]
|
||||
io[3] = _mm_sub_epi32(step[0], step[3]); // step[0] - step[3]
|
||||
}
|
||||
|
||||
void vpx_highbd_idct4x4_16_add_sse4_1(const tran_low_t *input, uint16_t *dest,
|
||||
int stride, int bd) {
|
||||
__m128i io[4];
|
||||
|
||||
io[0] = _mm_load_si128((const __m128i *)(input + 0));
|
||||
io[1] = _mm_load_si128((const __m128i *)(input + 4));
|
||||
io[2] = _mm_load_si128((const __m128i *)(input + 8));
|
||||
io[3] = _mm_load_si128((const __m128i *)(input + 12));
|
||||
|
||||
if (bd == 8) {
|
||||
__m128i io_short[2];
|
||||
|
||||
io_short[0] = _mm_packs_epi32(io[0], io[1]);
|
||||
io_short[1] = _mm_packs_epi32(io[2], io[3]);
|
||||
idct4_sse2(io_short);
|
||||
idct4_sse2(io_short);
|
||||
io_short[0] = _mm_add_epi16(io_short[0], _mm_set1_epi16(8));
|
||||
io_short[1] = _mm_add_epi16(io_short[1], _mm_set1_epi16(8));
|
||||
io[0] = _mm_srai_epi16(io_short[0], 4);
|
||||
io[1] = _mm_srai_epi16(io_short[1], 4);
|
||||
} else {
|
||||
highbd_idct4(io);
|
||||
highbd_idct4(io);
|
||||
io[0] = wraplow_16bit(io[0], io[1], _mm_set1_epi32(8));
|
||||
io[1] = wraplow_16bit(io[2], io[3], _mm_set1_epi32(8));
|
||||
}
|
||||
|
||||
recon_and_store_4(dest, io, stride, bd);
|
||||
}
|
||||
@ -17,6 +17,29 @@
|
||||
#include "vpx_dsp/inv_txfm.h"
|
||||
#include "vpx_dsp/x86/txfm_common_sse2.h"
|
||||
|
||||
static INLINE __m128i wraplow_16bit(const __m128i in0, const __m128i in1,
|
||||
const __m128i rounding) {
|
||||
__m128i temp[2];
|
||||
temp[0] = _mm_add_epi32(in0, rounding);
|
||||
temp[1] = _mm_add_epi32(in1, rounding);
|
||||
temp[0] = _mm_srai_epi32(temp[0], 4);
|
||||
temp[1] = _mm_srai_epi32(temp[1], 4);
|
||||
return _mm_packs_epi32(temp[0], temp[1]);
|
||||
}
|
||||
|
||||
static INLINE __m128i dct_const_round_shift_64bit(const __m128i in) {
|
||||
const __m128i t = _mm_add_epi64(
|
||||
in,
|
||||
_mm_setr_epi32(DCT_CONST_ROUNDING << 2, 0, DCT_CONST_ROUNDING << 2, 0));
|
||||
return _mm_srli_si128(t, 2);
|
||||
}
|
||||
|
||||
static INLINE __m128i pack_4(const __m128i in0, const __m128i in1) {
|
||||
const __m128i t0 = _mm_unpacklo_epi32(in0, in1); // 0, 2
|
||||
const __m128i t1 = _mm_unpackhi_epi32(in0, in1); // 1, 3
|
||||
return _mm_unpacklo_epi32(t0, t1); // 0, 1, 2, 3
|
||||
}
|
||||
|
||||
static INLINE __m128i add_dc_clamp(const __m128i *const min,
|
||||
const __m128i *const max,
|
||||
const __m128i *const dc,
|
||||
@ -67,4 +90,23 @@ static INLINE __m128i clamp_high_sse2(__m128i value, int bd) {
|
||||
return retval;
|
||||
}
|
||||
|
||||
static INLINE void recon_and_store_4(uint16_t *const dest,
|
||||
const __m128i *const io, const int stride,
|
||||
int bd) {
|
||||
__m128i d0 = _mm_loadl_epi64((const __m128i *)dest);
|
||||
__m128i d2 = _mm_loadl_epi64((const __m128i *)(dest + stride * 2));
|
||||
d0 =
|
||||
_mm_unpacklo_epi64(d0, _mm_loadl_epi64((const __m128i *)(dest + stride)));
|
||||
d2 = _mm_unpacklo_epi64(
|
||||
d2, _mm_loadl_epi64((const __m128i *)(dest + stride * 3)));
|
||||
d0 = clamp_high_sse2(_mm_adds_epi16(d0, io[0]), bd);
|
||||
d2 = clamp_high_sse2(_mm_adds_epi16(d2, io[1]), bd);
|
||||
_mm_storel_epi64((__m128i *)dest, d0);
|
||||
d0 = _mm_srli_si128(d0, 8);
|
||||
_mm_storel_epi64((__m128i *)(dest + stride), d0);
|
||||
_mm_storel_epi64((__m128i *)(dest + stride * 2), d2);
|
||||
d2 = _mm_srli_si128(d2, 8);
|
||||
_mm_storel_epi64((__m128i *)(dest + stride * 3), d2);
|
||||
}
|
||||
|
||||
#endif // VPX_DSP_X86_HIGHBD_INV_TXFM_SSE2_H_
|
||||
|
||||
Loading…
Reference in New Issue
Block a user