diff --git a/vp10/common/mips/msa/idct4x4_msa.c b/vp10/common/mips/msa/idct4x4_msa.c index 866f321ab..e38889f27 100644 --- a/vp10/common/mips/msa/idct4x4_msa.c +++ b/vp10/common/mips/msa/idct4x4_msa.c @@ -24,31 +24,31 @@ void vp10_iht4x4_16_add_msa(const int16_t *input, uint8_t *dst, switch (tx_type) { case DCT_DCT: /* DCT in horizontal */ - VP9_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); + VPX_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); /* DCT in vertical */ TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); - VP9_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); + VPX_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); break; case ADST_DCT: /* DCT in horizontal */ - VP9_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); + VPX_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); /* ADST in vertical */ TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); - VP9_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); + VPX_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); break; case DCT_ADST: /* ADST in horizontal */ - VP9_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); + VPX_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); /* DCT in vertical */ TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); - VP9_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); + VPX_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); break; case ADST_ADST: /* ADST in horizontal */ - VP9_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); + VPX_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); /* ADST in vertical */ TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); - VP9_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); + VPX_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); break; default: assert(0); diff --git a/vp10/common/mips/msa/idct8x8_msa.c b/vp10/common/mips/msa/idct8x8_msa.c index 726af4e9e..ede6751c4 100644 --- a/vp10/common/mips/msa/idct8x8_msa.c +++ b/vp10/common/mips/msa/idct8x8_msa.c @@ -26,42 +26,42 @@ void vp10_iht8x8_64_add_msa(const int16_t *input, uint8_t *dst, switch (tx_type) { case DCT_DCT: /* DCT in horizontal */ - VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); /* DCT in vertical */ TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); - VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); break; case ADST_DCT: /* DCT in horizontal */ - VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); /* ADST in vertical */ TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); - VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); break; case DCT_ADST: /* ADST in horizontal */ - VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); /* DCT in vertical */ TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); - VP9_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_IDCT8x8_1D(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); break; case ADST_ADST: /* ADST in horizontal */ - VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); /* ADST in vertical */ TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); - VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); break; default: @@ -74,7 +74,7 @@ void vp10_iht8x8_64_add_msa(const int16_t *input, uint8_t *dst, SRARI_H4_SH(in4, in5, in6, in7, 5); /* add block and store 8x8 */ - VP9_ADDBLK_ST8x4_UB(dst, dst_stride, in0, in1, in2, in3); + VPX_ADDBLK_ST8x4_UB(dst, dst_stride, in0, in1, in2, in3); dst += (4 * dst_stride); - VP9_ADDBLK_ST8x4_UB(dst, dst_stride, in4, in5, in6, in7); + VPX_ADDBLK_ST8x4_UB(dst, dst_stride, in4, in5, in6, in7); } diff --git a/vp10/encoder/mips/msa/fdct8x8_msa.c b/vp10/encoder/mips/msa/fdct8x8_msa.c index 4283eb946..5ce9a656c 100644 --- a/vp10/encoder/mips/msa/fdct8x8_msa.c +++ b/vp10/encoder/mips/msa/fdct8x8_msa.c @@ -31,7 +31,7 @@ void vp10_fht8x8_msa(const int16_t *input, int16_t *output, int32_t stride, in0, in1, in2, in3, in4, in5, in6, in7); break; case ADST_DCT: - VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); @@ -43,15 +43,15 @@ void vp10_fht8x8_msa(const int16_t *input, int16_t *output, int32_t stride, in0, in1, in2, in3, in4, in5, in6, in7); TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); - VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); break; case ADST_ADST: - VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); - VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, + VPX_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); break; default: diff --git a/vp10/encoder/mips/msa/fdct_msa.h b/vp10/encoder/mips/msa/fdct_msa.h index d7d40cb72..74a756e44 100644 --- a/vp10/encoder/mips/msa/fdct_msa.h +++ b/vp10/encoder/mips/msa/fdct_msa.h @@ -15,7 +15,7 @@ #include "vpx_dsp/mips/txfm_macros_msa.h" #include "vpx_ports/mem.h" -#define VP9_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, \ +#define VPX_ADST8(in0, in1, in2, in3, in4, in5, in6, in7, \ out0, out1, out2, out3, out4, out5, out6, out7) { \ v8i16 cnst0_m, cnst1_m, cnst2_m, cnst3_m, cnst4_m; \ v8i16 vec0_m, vec1_m, vec2_m, vec3_m, s0_m, s1_m; \