Merge "d45 intra prediction SSSE3 optimizations."
This commit is contained in:
@@ -47,7 +47,7 @@ prototype void vp9_d27_predictor_4x4 "uint8_t *ypred_ptr, ptrdiff_t y_stride, ui
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specialize vp9_d27_predictor_4x4
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specialize vp9_d27_predictor_4x4
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prototype void vp9_d45_predictor_4x4 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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prototype void vp9_d45_predictor_4x4 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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specialize vp9_d45_predictor_4x4
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specialize vp9_d45_predictor_4x4 ssse3
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prototype void vp9_d63_predictor_4x4 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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prototype void vp9_d63_predictor_4x4 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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specialize vp9_d63_predictor_4x4
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specialize vp9_d63_predictor_4x4
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@@ -86,7 +86,7 @@ prototype void vp9_d27_predictor_8x8 "uint8_t *ypred_ptr, ptrdiff_t y_stride, ui
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specialize vp9_d27_predictor_8x8
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specialize vp9_d27_predictor_8x8
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prototype void vp9_d45_predictor_8x8 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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prototype void vp9_d45_predictor_8x8 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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specialize vp9_d45_predictor_8x8
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specialize vp9_d45_predictor_8x8 ssse3
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prototype void vp9_d63_predictor_8x8 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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prototype void vp9_d63_predictor_8x8 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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specialize vp9_d63_predictor_8x8
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specialize vp9_d63_predictor_8x8
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@@ -125,7 +125,7 @@ prototype void vp9_d27_predictor_16x16 "uint8_t *ypred_ptr, ptrdiff_t y_stride,
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specialize vp9_d27_predictor_16x16
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specialize vp9_d27_predictor_16x16
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prototype void vp9_d45_predictor_16x16 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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prototype void vp9_d45_predictor_16x16 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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specialize vp9_d45_predictor_16x16
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specialize vp9_d45_predictor_16x16 ssse3
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prototype void vp9_d63_predictor_16x16 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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prototype void vp9_d63_predictor_16x16 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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specialize vp9_d63_predictor_16x16
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specialize vp9_d63_predictor_16x16
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@@ -164,7 +164,7 @@ prototype void vp9_d27_predictor_32x32 "uint8_t *ypred_ptr, ptrdiff_t y_stride,
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specialize vp9_d27_predictor_32x32
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specialize vp9_d27_predictor_32x32
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prototype void vp9_d45_predictor_32x32 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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prototype void vp9_d45_predictor_32x32 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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specialize vp9_d45_predictor_32x32
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specialize vp9_d45_predictor_32x32 ssse3
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prototype void vp9_d63_predictor_32x32 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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prototype void vp9_d63_predictor_32x32 "uint8_t *ypred_ptr, ptrdiff_t y_stride, uint8_t *yabove_row, uint8_t *yleft_col"
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specialize vp9_d63_predictor_32x32
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specialize vp9_d63_predictor_32x32
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@@ -10,6 +10,31 @@
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%include "third_party/x86inc/x86inc.asm"
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%include "third_party/x86inc/x86inc.asm"
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SECTION_RODATA
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pb_1: times 16 db 1
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pw_2: times 8 dw 2
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pb_7m1: times 8 db 7, -1
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pb_15: times 16 db 15
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sh_b01234577: db 0, 1, 2, 3, 4, 5, 7, 7
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sh_b12345677: db 1, 2, 3, 4, 5, 6, 7, 7
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sh_b23456777: db 2, 3, 4, 5, 6, 7, 7, 7, 0, 0, 0, 0, 0, 0, 0, 0
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sh_b0123456777777777: db 0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7
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sh_b1234567777777777: db 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
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sh_b2345677777777777: db 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
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sh_b2w01234577: db 0, -1, 1, -1, 2, -1, 3, -1, 4, -1, 5, -1, 7, -1, 7, -1
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sh_b2w12345677: db 1, -1, 2, -1, 3, -1, 4, -1, 5, -1, 6, -1, 7, -1, 7, -1
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sh_b2w23456777: db 2, -1, 3, -1, 4, -1, 5, -1, 6, -1, 7, -1, 7, -1, 7, -1
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sh_b2w01234567: db 0, -1, 1, -1, 2, -1, 3, -1, 4, -1, 5, -1, 6, -1, 7, -1
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sh_b2w12345678: db 1, -1, 2, -1, 3, -1, 4, -1, 5, -1, 6, -1, 7, -1, 8, -1
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sh_b2w23456789: db 2, -1, 3, -1, 4, -1, 5, -1, 6, -1, 7, -1, 8, -1, 9, -1
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sh_b2w89abcdef: db 8, -1, 9, -1, 10, -1, 11, -1, 12, -1, 13, -1, 14, -1, 15, -1
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sh_b2w9abcdeff: db 9, -1, 10, -1, 11, -1, 12, -1, 13, -1, 14, -1, 15, -1, 15, -1
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sh_b2wabcdefff: db 10, -1, 11, -1, 12, -1, 13, -1, 14, -1, 15, -1, 15, -1, 15, -1
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sh_b123456789abcdeff: db 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15
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sh_b23456789abcdefff: db 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15
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SECTION .text
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SECTION .text
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INIT_MMX ssse3
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INIT_MMX ssse3
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@@ -85,3 +110,182 @@ cglobal h_predictor_32x32, 2, 4, 3, dst, stride, line, left
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inc lineq
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inc lineq
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jnz .loop
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jnz .loop
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REP_RET
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REP_RET
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INIT_MMX ssse3
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cglobal d45_predictor_4x4, 3, 3, 4, dst, stride, above
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movq m0, [aboveq]
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pshufb m2, m0, [sh_b23456777]
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pshufb m1, m0, [sh_b01234577]
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pshufb m0, [sh_b12345677]
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pavgb m3, m2, m1
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pxor m2, m1
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pand m2, [pb_1]
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psubb m3, m2
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pavgb m0, m3
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; store 4 lines
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movd [dstq ], m0
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psrlq m0, 8
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movd [dstq+strideq], m0
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lea dstq, [dstq+strideq*2]
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psrlq m0, 8
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movd [dstq ], m0
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psrlq m0, 8
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movd [dstq+strideq], m0
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RET
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INIT_MMX ssse3
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cglobal d45_predictor_8x8, 3, 3, 4, dst, stride, above
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movq m0, [aboveq]
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mova m1, [sh_b12345677]
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DEFINE_ARGS dst, stride, stride3, line
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lea stride3q, [strideq*3]
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pshufb m2, m0, [sh_b23456777]
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pavgb m3, m2, m0
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pxor m2, m0
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pshufb m0, m1
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pand m2, [pb_1]
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psubb m3, m2
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pavgb m0, m3
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; store 4 lines
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movq [dstq ], m0
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pshufb m0, m1
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movq [dstq+strideq ], m0
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pshufb m0, m1
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movq [dstq+strideq*2], m0
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pshufb m0, m1
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movq [dstq+stride3q ], m0
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pshufb m0, m1
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lea dstq, [dstq+strideq*4]
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; store next 4 lines
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movq [dstq ], m0
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pshufb m0, m1
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movq [dstq+strideq ], m0
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pshufb m0, m1
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movq [dstq+strideq*2], m0
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pshufb m0, m1
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movq [dstq+stride3q ], m0
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RET
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INIT_XMM ssse3
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cglobal d45_predictor_16x16, 3, 5, 4, dst, stride, above, dst8, line
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mova m0, [aboveq]
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DEFINE_ARGS dst, stride, stride3, dst8, line
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lea stride3q, [strideq*3]
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lea dst8q, [dstq+strideq*8]
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mova m1, [sh_b123456789abcdeff]
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pshufb m2, m0, [sh_b23456789abcdefff]
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pavgb m3, m2, m0
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pxor m2, m0
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pshufb m0, m1
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pand m2, [pb_1]
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psubb m3, m2
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pavgb m0, m3
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; first 4 lines and first half of 3rd 4 lines
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mov lined, 2
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.loop:
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mova [dstq ], m0
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movhps [dst8q ], m0
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pshufb m0, m1
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mova [dstq +strideq ], m0
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movhps [dst8q+strideq ], m0
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pshufb m0, m1
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mova [dstq +strideq*2 ], m0
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movhps [dst8q+strideq*2 ], m0
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pshufb m0, m1
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mova [dstq +stride3q ], m0
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movhps [dst8q+stride3q ], m0
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pshufb m0, m1
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lea dstq, [dstq +strideq*4]
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lea dst8q, [dst8q+strideq*4]
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dec lined
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jnz .loop
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; bottom-right 8x8 block
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movhps [dstq +8], m0
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movhps [dstq+strideq +8], m0
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movhps [dstq+strideq*2+8], m0
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movhps [dstq+stride3q +8], m0
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lea dstq, [dstq+strideq*4]
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movhps [dstq +8], m0
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movhps [dstq+strideq +8], m0
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movhps [dstq+strideq*2+8], m0
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movhps [dstq+stride3q +8], m0
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RET
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INIT_XMM ssse3
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cglobal d45_predictor_32x32, 3, 5, 7, dst, stride, above, dst16, line
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mova m0, [aboveq]
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mova m4, [aboveq+16]
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DEFINE_ARGS dst, stride, stride3, dst16, line
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lea stride3q, [strideq*3]
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lea dst16q, [dstq +strideq*8]
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lea dst16q, [dst16q+strideq*8]
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mova m1, [sh_b123456789abcdeff]
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pshufb m2, m4, [sh_b23456789abcdefff]
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pavgb m3, m2, m4
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pxor m2, m4
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palignr m5, m4, m0, 1
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palignr m6, m4, m0, 2
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pshufb m4, m1
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pand m2, [pb_1]
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psubb m3, m2
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pavgb m4, m3
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pavgb m3, m0, m6
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pxor m0, m6
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pand m0, [pb_1]
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psubb m3, m0
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pavgb m5, m3
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; write 4x4 lines (and the first half of the second 4x4 lines)
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mov lined, 4
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.loop:
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mova [dstq ], m5
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mova [dstq +16], m4
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mova [dst16q ], m4
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palignr m3, m4, m5, 1
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pshufb m4, m1
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mova [dstq +strideq ], m3
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mova [dstq +strideq +16], m4
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mova [dst16q+strideq ], m4
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palignr m5, m4, m3, 1
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pshufb m4, m1
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mova [dstq +strideq*2 ], m5
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mova [dstq +strideq*2+16], m4
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mova [dst16q+strideq*2 ], m4
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palignr m3, m4, m5, 1
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pshufb m4, m1
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mova [dstq +stride3q ], m3
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mova [dstq +stride3q +16], m4
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mova [dst16q+stride3q ], m4
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palignr m5, m4, m3, 1
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pshufb m4, m1
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lea dstq, [dstq +strideq*4]
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lea dst16q, [dst16q+strideq*4]
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dec lined
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jnz .loop
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; write second half of second 4x4 lines
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mova [dstq +16], m4
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mova [dstq +strideq +16], m4
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mova [dstq +strideq*2+16], m4
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mova [dstq +stride3q +16], m4
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lea dstq, [dstq +strideq*4]
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mova [dstq +16], m4
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mova [dstq +strideq +16], m4
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mova [dstq +strideq*2+16], m4
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mova [dstq +stride3q +16], m4
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lea dstq, [dstq +strideq*4]
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mova [dstq +16], m4
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mova [dstq +strideq +16], m4
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mova [dstq +strideq*2+16], m4
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mova [dstq +stride3q +16], m4
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lea dstq, [dstq +strideq*4]
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mova [dstq +16], m4
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mova [dstq +strideq +16], m4
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mova [dstq +strideq*2+16], m4
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mova [dstq +stride3q +16], m4
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RET
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