Merge "vpx_dsp: vpx_get16x16var_avx2() cleanup"
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2c5478e383
@ -35,115 +35,76 @@ DECLARE_ALIGNED(32, static const uint8_t, bilinear_filters_avx2[512]) = {
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void vpx_get16x16var_avx2(const unsigned char *src_ptr, int source_stride,
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const unsigned char *ref_ptr, int recon_stride,
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unsigned int *SSE, int *Sum) {
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__m256i src, src_expand_low, src_expand_high, ref, ref_expand_low;
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__m256i ref_expand_high, madd_low, madd_high;
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unsigned int *sse, int *sum) {
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unsigned int i, src_2strides, ref_2strides;
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__m256i zero_reg = _mm256_setzero_si256();
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__m256i sum_ref_src = _mm256_setzero_si256();
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__m256i madd_ref_src = _mm256_setzero_si256();
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// processing two strides in a 256 bit register reducing the number
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// of loop stride by half (comparing to the sse2 code)
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// process two 16 byte locations in a 256 bit register
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src_2strides = source_stride << 1;
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ref_2strides = recon_stride << 1;
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for (i = 0; i < 8; i++) {
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src = _mm256_castsi128_si256(_mm_loadu_si128((__m128i const *)(src_ptr)));
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src = _mm256_inserti128_si256(
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src, _mm_loadu_si128((__m128i const *)(src_ptr + source_stride)), 1);
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ref = _mm256_castsi128_si256(_mm_loadu_si128((__m128i const *)(ref_ptr)));
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ref = _mm256_inserti128_si256(
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ref, _mm_loadu_si128((__m128i const *)(ref_ptr + recon_stride)), 1);
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// expanding to 16 bit each lane
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src_expand_low = _mm256_unpacklo_epi8(src, zero_reg);
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src_expand_high = _mm256_unpackhi_epi8(src, zero_reg);
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ref_expand_low = _mm256_unpacklo_epi8(ref, zero_reg);
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ref_expand_high = _mm256_unpackhi_epi8(ref, zero_reg);
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// src-ref
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src_expand_low = _mm256_sub_epi16(src_expand_low, ref_expand_low);
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src_expand_high = _mm256_sub_epi16(src_expand_high, ref_expand_high);
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// madd low (src - ref)
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madd_low = _mm256_madd_epi16(src_expand_low, src_expand_low);
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// add high to low
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src_expand_low = _mm256_add_epi16(src_expand_low, src_expand_high);
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// madd high (src - ref)
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madd_high = _mm256_madd_epi16(src_expand_high, src_expand_high);
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sum_ref_src = _mm256_add_epi16(sum_ref_src, src_expand_low);
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for (i = 0; i < 8; ++i) {
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const __m256i zero_reg = _mm256_setzero_si256();
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const __m256i src0 =
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_mm256_castsi128_si256(_mm_loadu_si128((__m128i const *)(src_ptr)));
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const __m256i src = _mm256_inserti128_si256(
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src0, _mm_loadu_si128((__m128i const *)(src_ptr + source_stride)), 1);
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const __m256i ref0 =
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_mm256_castsi128_si256(_mm_loadu_si128((__m128i const *)(ref_ptr)));
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const __m256i ref = _mm256_inserti128_si256(
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ref0, _mm_loadu_si128((__m128i const *)(ref_ptr + recon_stride)), 1);
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const __m256i src_lo = _mm256_unpacklo_epi8(src, zero_reg);
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const __m256i src_hi = _mm256_unpackhi_epi8(src, zero_reg);
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const __m256i ref_lo = _mm256_unpacklo_epi8(ref, zero_reg);
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const __m256i ref_hi = _mm256_unpackhi_epi8(ref, zero_reg);
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const __m256i diff_lo = _mm256_sub_epi16(src_lo, ref_lo);
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const __m256i diff_hi = _mm256_sub_epi16(src_hi, ref_hi);
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const __m256i madd_lo = _mm256_madd_epi16(diff_lo, diff_lo);
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const __m256i madd_hi = _mm256_madd_epi16(diff_hi, diff_hi);
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const __m256i src_ref_diff_sum = _mm256_add_epi16(diff_lo, diff_hi);
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sum_ref_src = _mm256_add_epi16(sum_ref_src, src_ref_diff_sum);
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// add high to low
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madd_ref_src =
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_mm256_add_epi32(madd_ref_src, _mm256_add_epi32(madd_low, madd_high));
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_mm256_add_epi32(madd_ref_src, _mm256_add_epi32(madd_lo, madd_hi));
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src_ptr += src_2strides;
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ref_ptr += ref_2strides;
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}
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{
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__m128i sum_res, madd_res;
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__m128i expand_sum_low, expand_sum_high, expand_sum;
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__m128i expand_madd_low, expand_madd_high, expand_madd;
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__m128i ex_expand_sum_low, ex_expand_sum_high, ex_expand_sum;
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const __m128i zero_reg = _mm_setzero_si128();
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// extract the low lane and add it to the high lane
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sum_res = _mm_add_epi16(_mm256_castsi256_si128(sum_ref_src),
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_mm256_extractf128_si256(sum_ref_src, 1));
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madd_res = _mm_add_epi32(_mm256_castsi256_si128(madd_ref_src),
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_mm256_extractf128_si256(madd_ref_src, 1));
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// padding each 2 bytes with another 2 zeroed bytes
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expand_sum_low =
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_mm_unpacklo_epi16(_mm256_castsi256_si128(zero_reg), sum_res);
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expand_sum_high =
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_mm_unpackhi_epi16(_mm256_castsi256_si128(zero_reg), sum_res);
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// shifting the sign 16 bits right
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expand_sum_low = _mm_srai_epi32(expand_sum_low, 16);
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expand_sum_high = _mm_srai_epi32(expand_sum_high, 16);
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expand_sum = _mm_add_epi32(expand_sum_low, expand_sum_high);
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// expand each 32 bits of the madd result to 64 bits
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expand_madd_low =
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_mm_unpacklo_epi32(madd_res, _mm256_castsi256_si128(zero_reg));
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expand_madd_high =
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_mm_unpackhi_epi32(madd_res, _mm256_castsi256_si128(zero_reg));
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expand_madd = _mm_add_epi32(expand_madd_low, expand_madd_high);
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ex_expand_sum_low =
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_mm_unpacklo_epi32(expand_sum, _mm256_castsi256_si128(zero_reg));
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ex_expand_sum_high =
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_mm_unpackhi_epi32(expand_sum, _mm256_castsi256_si128(zero_reg));
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ex_expand_sum = _mm_add_epi32(ex_expand_sum_low, ex_expand_sum_high);
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// shift 8 bytes eight
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madd_res = _mm_srli_si128(expand_madd, 8);
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sum_res = _mm_srli_si128(ex_expand_sum, 8);
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madd_res = _mm_add_epi32(madd_res, expand_madd);
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sum_res = _mm_add_epi32(sum_res, ex_expand_sum);
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*((int *)SSE) = _mm_cvtsi128_si32(madd_res);
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*((int *)Sum) = _mm_cvtsi128_si32(sum_res);
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const __m128i sum_ref_src_128 =
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_mm_add_epi16(_mm256_castsi256_si128(sum_ref_src),
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_mm256_extractf128_si256(sum_ref_src, 1));
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const __m128i madd_ref_src_128 =
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_mm_add_epi32(_mm256_castsi256_si128(madd_ref_src),
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_mm256_extractf128_si256(madd_ref_src, 1));
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// 16 -> 32 sign extended
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const __m128i sum_lo =
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_mm_srai_epi32(_mm_unpacklo_epi16(zero_reg, sum_ref_src_128), 16);
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// 16 -> 32 sign extended
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const __m128i sum_hi =
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_mm_srai_epi32(_mm_unpackhi_epi16(zero_reg, sum_ref_src_128), 16);
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const __m128i sum_hl = _mm_add_epi32(sum_lo, sum_hi);
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const __m128i madd_lo = _mm_unpacklo_epi32(madd_ref_src_128, zero_reg);
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const __m128i madd_hi = _mm_unpackhi_epi32(madd_ref_src_128, zero_reg);
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const __m128i madd = _mm_add_epi32(madd_lo, madd_hi);
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const __m128i ex_sum_lo = _mm_unpacklo_epi32(sum_hl, zero_reg);
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const __m128i ex_sum_hi = _mm_unpackhi_epi32(sum_hl, zero_reg);
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const __m128i ex_sum = _mm_add_epi32(ex_sum_lo, ex_sum_hi);
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*((int *)sse) =
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_mm_cvtsi128_si32(_mm_add_epi32(madd, _mm_srli_si128(madd, 8)));
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*((int *)sum) =
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_mm_cvtsi128_si32(_mm_add_epi32(ex_sum, _mm_srli_si128(ex_sum, 8)));
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}
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}
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static void get32x32var_avx2(const unsigned char *src_ptr, int source_stride,
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const unsigned char *ref_ptr, int recon_stride,
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unsigned int *SSE, int *Sum) {
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__m256i src, src_expand_low, src_expand_high, ref, ref_expand_low;
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__m256i ref_expand_high, madd_low, madd_high;
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unsigned int *sse, int *sum) {
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__m256i src, src_expand_lo, src_expand_hi, ref, ref_expand_lo;
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__m256i ref_expand_hi, madd_lo, madd_hi;
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unsigned int i;
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__m256i zero_reg = _mm256_setzero_si256();
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__m256i sum_ref_src = _mm256_setzero_si256();
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@ -156,30 +117,30 @@ static void get32x32var_avx2(const unsigned char *src_ptr, int source_stride,
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ref = _mm256_loadu_si256((__m256i const *)(ref_ptr));
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// expanding to 16 bit each lane
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src_expand_low = _mm256_unpacklo_epi8(src, zero_reg);
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src_expand_high = _mm256_unpackhi_epi8(src, zero_reg);
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src_expand_lo = _mm256_unpacklo_epi8(src, zero_reg);
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src_expand_hi = _mm256_unpackhi_epi8(src, zero_reg);
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ref_expand_low = _mm256_unpacklo_epi8(ref, zero_reg);
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ref_expand_high = _mm256_unpackhi_epi8(ref, zero_reg);
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ref_expand_lo = _mm256_unpacklo_epi8(ref, zero_reg);
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ref_expand_hi = _mm256_unpackhi_epi8(ref, zero_reg);
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// src-ref
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src_expand_low = _mm256_sub_epi16(src_expand_low, ref_expand_low);
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src_expand_high = _mm256_sub_epi16(src_expand_high, ref_expand_high);
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src_expand_lo = _mm256_sub_epi16(src_expand_lo, ref_expand_lo);
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src_expand_hi = _mm256_sub_epi16(src_expand_hi, ref_expand_hi);
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// madd low (src - ref)
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madd_low = _mm256_madd_epi16(src_expand_low, src_expand_low);
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madd_lo = _mm256_madd_epi16(src_expand_lo, src_expand_lo);
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// add high to low
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src_expand_low = _mm256_add_epi16(src_expand_low, src_expand_high);
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src_expand_lo = _mm256_add_epi16(src_expand_lo, src_expand_hi);
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// madd high (src - ref)
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madd_high = _mm256_madd_epi16(src_expand_high, src_expand_high);
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madd_hi = _mm256_madd_epi16(src_expand_hi, src_expand_hi);
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sum_ref_src = _mm256_add_epi16(sum_ref_src, src_expand_low);
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sum_ref_src = _mm256_add_epi16(sum_ref_src, src_expand_lo);
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// add high to low
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madd_ref_src =
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_mm256_add_epi32(madd_ref_src, _mm256_add_epi32(madd_low, madd_high));
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_mm256_add_epi32(madd_ref_src, _mm256_add_epi32(madd_lo, madd_hi));
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src_ptr += source_stride;
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ref_ptr += recon_stride;
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@ -187,7 +148,7 @@ static void get32x32var_avx2(const unsigned char *src_ptr, int source_stride,
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{
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__m256i expand_sum_low, expand_sum_high, expand_sum;
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__m256i expand_madd_low, expand_madd_high, expand_madd;
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__m256i expand_madd_lo, expand_madd_hi, expand_madd;
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__m256i ex_expand_sum_low, ex_expand_sum_high, ex_expand_sum;
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// padding each 2 bytes with another 2 zeroed bytes
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@ -201,10 +162,10 @@ static void get32x32var_avx2(const unsigned char *src_ptr, int source_stride,
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expand_sum = _mm256_add_epi32(expand_sum_low, expand_sum_high);
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// expand each 32 bits of the madd result to 64 bits
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expand_madd_low = _mm256_unpacklo_epi32(madd_ref_src, zero_reg);
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expand_madd_high = _mm256_unpackhi_epi32(madd_ref_src, zero_reg);
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expand_madd_lo = _mm256_unpacklo_epi32(madd_ref_src, zero_reg);
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expand_madd_hi = _mm256_unpackhi_epi32(madd_ref_src, zero_reg);
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expand_madd = _mm256_add_epi32(expand_madd_low, expand_madd_high);
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expand_madd = _mm256_add_epi32(expand_madd_lo, expand_madd_hi);
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ex_expand_sum_low = _mm256_unpacklo_epi32(expand_sum, zero_reg);
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ex_expand_sum_high = _mm256_unpackhi_epi32(expand_sum, zero_reg);
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@ -219,11 +180,11 @@ static void get32x32var_avx2(const unsigned char *src_ptr, int source_stride,
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sum_ref_src = _mm256_add_epi32(sum_ref_src, ex_expand_sum);
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// extract the low lane and the high lane and add the results
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*((int *)SSE) =
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*((int *)sse) =
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_mm_cvtsi128_si32(_mm256_castsi256_si128(madd_ref_src)) +
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_mm_cvtsi128_si32(_mm256_extractf128_si256(madd_ref_src, 1));
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*((int *)Sum) = _mm_cvtsi128_si32(_mm256_castsi256_si128(sum_ref_src)) +
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*((int *)sum) = _mm_cvtsi128_si32(_mm256_castsi256_si128(sum_ref_src)) +
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_mm_cvtsi128_si32(_mm256_extractf128_si256(sum_ref_src, 1));
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}
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}
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