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VP9->VPX in fdct function names

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Change-Id: I664dadad44b98a82a22e87a481b6ec596f272bd6
This commit is contained in:
Yaowu Xu
2016-01-20 15:52:53 -08:00
parent 9baa5c9973
commit 2334f51d5f
3 changed files with 13 additions and 13 deletions
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16
vp10/encoder/mips/msa/fdct4x4_msa.c
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@@ -67,24 +67,24 @@ void vp10_fht4x4_msa(const int16_t *input, int16_t *output, int32_t stride,
switch (tx_type) { switch (tx_type) {
case DCT_DCT: case DCT_DCT:
VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3); VPX_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3); VPX_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
break; break;
case ADST_DCT: case ADST_DCT:
VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3); VPX_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3); VPX_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
break; break;
case DCT_ADST: case DCT_ADST:
VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3); VPX_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3); VPX_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
break; break;
case ADST_ADST: case ADST_ADST:
VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3); VPX_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3); VPX_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
break; break;
default: default:
assert(0); assert(0);

8
vp10/encoder/mips/msa/fdct8x8_msa.c
View File

@@ -23,11 +23,11 @@ void vp10_fht8x8_msa(const int16_t *input, int16_t *output, int32_t stride,
switch (tx_type) { switch (tx_type) {
case DCT_DCT: case DCT_DCT:
VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7, VPX_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
in0, in1, in2, in3, in4, in5, in6, in7); in0, in1, in2, in3, in4, in5, in6, in7);
TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7,
in0, in1, in2, in3, in4, in5, in6, in7); in0, in1, in2, in3, in4, in5, in6, in7);
VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7, VPX_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
in0, in1, in2, in3, in4, in5, in6, in7); in0, in1, in2, in3, in4, in5, in6, in7);
break; break;
case ADST_DCT: case ADST_DCT:
@@ -35,11 +35,11 @@ void vp10_fht8x8_msa(const int16_t *input, int16_t *output, int32_t stride,
in0, in1, in2, in3, in4, in5, in6, in7); in0, in1, in2, in3, in4, in5, in6, in7);
TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7,
in0, in1, in2, in3, in4, in5, in6, in7); in0, in1, in2, in3, in4, in5, in6, in7);
VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7, VPX_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
in0, in1, in2, in3, in4, in5, in6, in7); in0, in1, in2, in3, in4, in5, in6, in7);
break; break;
case DCT_ADST: case DCT_ADST:
VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7, VPX_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
in0, in1, in2, in3, in4, in5, in6, in7); in0, in1, in2, in3, in4, in5, in6, in7);
TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7, TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7,
in0, in1, in2, in3, in4, in5, in6, in7); in0, in1, in2, in3, in4, in5, in6, in7);

2
vp10/encoder/mips/msa/fdct_msa.h
View File

@@ -81,7 +81,7 @@
out5 = -out5; \ out5 = -out5; \
} }
#define VP9_FADST4(in0, in1, in2, in3, out0, out1, out2, out3) { \ #define VPX_FADST4(in0, in1, in2, in3, out0, out1, out2, out3) { \
v4i32 s0_m, s1_m, s2_m, s3_m, constant_m; \ v4i32 s0_m, s1_m, s2_m, s3_m, constant_m; \
v4i32 in0_r_m, in1_r_m, in2_r_m, in3_r_m; \ v4i32 in0_r_m, in1_r_m, in2_r_m, in3_r_m; \
\ \