libyuv: update to r1305
MIPS build fixes https://code.google.com/p/webm/issues/detail?id=957 Change-Id: I9d53900af36d783c369b5dff27a7479cb94fd16b
This commit is contained in:
182
third_party/libyuv/source/rotate.cc
vendored
182
third_party/libyuv/source/rotate.cc
vendored
@@ -42,11 +42,7 @@ extern "C" {
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#endif
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#if !defined(LIBYUV_DISABLE_NEON) && !defined(__native_client__) && \
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(defined(__ARM_NEON__) || defined(LIBYUV_NEON))
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#define HAS_MIRRORROW_NEON
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void MirrorRow_NEON(const uint8* src, uint8* dst, int width);
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#define HAS_MIRRORROW_UV_NEON
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void MirrorUVRow_NEON(const uint8* src, uint8* dst_a, uint8* dst_b, int width);
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(defined(__ARM_NEON__) || defined(LIBYUV_NEON) || defined(__aarch64__))
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#define HAS_TRANSPOSE_WX8_NEON
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void TransposeWx8_NEON(const uint8* src, int src_stride,
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uint8* dst, int dst_stride, int width);
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@@ -55,7 +51,7 @@ void TransposeUVWx8_NEON(const uint8* src, int src_stride,
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uint8* dst_a, int dst_stride_a,
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uint8* dst_b, int dst_stride_b,
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int width);
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#endif // defined(__ARM_NEON__)
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#endif
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#if !defined(LIBYUV_DISABLE_MIPS) && !defined(__native_client__) && \
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defined(__mips__) && \
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@@ -194,31 +190,31 @@ static void TransposeUVWx8_SSE2(const uint8* src, int src_stride,
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convertloop:
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// Read in the data from the source pointer.
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// First round of bit swap.
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movdqa xmm0, [eax]
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movdqa xmm1, [eax + edi]
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movdqu xmm0, [eax]
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movdqu xmm1, [eax + edi]
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lea eax, [eax + 2 * edi]
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movdqa xmm7, xmm0 // use xmm7 as temp register.
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punpcklbw xmm0, xmm1
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punpckhbw xmm7, xmm1
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movdqa xmm1, xmm7
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movdqa xmm2, [eax]
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movdqa xmm3, [eax + edi]
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movdqu xmm2, [eax]
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movdqu xmm3, [eax + edi]
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lea eax, [eax + 2 * edi]
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movdqa xmm7, xmm2
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punpcklbw xmm2, xmm3
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punpckhbw xmm7, xmm3
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movdqa xmm3, xmm7
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movdqa xmm4, [eax]
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movdqa xmm5, [eax + edi]
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movdqu xmm4, [eax]
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movdqu xmm5, [eax + edi]
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lea eax, [eax + 2 * edi]
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movdqa xmm7, xmm4
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punpcklbw xmm4, xmm5
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punpckhbw xmm7, xmm5
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movdqa xmm5, xmm7
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movdqa xmm6, [eax]
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movdqa xmm7, [eax + edi]
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movdqu xmm6, [eax]
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movdqu xmm7, [eax + edi]
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lea eax, [eax + 2 * edi]
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movdqa [esp], xmm5 // backup xmm5
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movdqu [esp], xmm5 // backup xmm5
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neg edi
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movdqa xmm5, xmm6 // use xmm5 as temp register.
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punpcklbw xmm6, xmm7
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@@ -239,8 +235,8 @@ static void TransposeUVWx8_SSE2(const uint8* src, int src_stride,
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punpcklwd xmm4, xmm6
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punpckhwd xmm5, xmm6
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movdqa xmm6, xmm5
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movdqa xmm5, [esp] // restore xmm5
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movdqa [esp], xmm6 // backup xmm6
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movdqu xmm5, [esp] // restore xmm5
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movdqu [esp], xmm6 // backup xmm6
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movdqa xmm6, xmm5 // use xmm6 as temp register.
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punpcklwd xmm5, xmm7
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punpckhwd xmm6, xmm7
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@@ -251,7 +247,7 @@ static void TransposeUVWx8_SSE2(const uint8* src, int src_stride,
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punpckldq xmm0, xmm4
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punpckhdq xmm6, xmm4
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movdqa xmm4, xmm6
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movdqa xmm6, [esp] // restore xmm6
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movdqu xmm6, [esp] // restore xmm6
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movlpd qword ptr [edx], xmm0
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movhpd qword ptr [ebx], xmm0
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movlpd qword ptr [edx + esi], xmm4
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@@ -296,7 +292,8 @@ static void TransposeUVWx8_SSE2(const uint8* src, int src_stride,
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ret
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}
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}
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#elif !defined(LIBYUV_DISABLE_X86) && \
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#endif
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#if !defined(LIBYUV_DISABLE_X86) && \
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(defined(__i386__) || (defined(__x86_64__) && !defined(__native_client__)))
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#define HAS_TRANSPOSE_WX8_SSSE3
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static void TransposeWx8_SSSE3(const uint8* src, int src_stride,
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@@ -379,10 +376,8 @@ static void TransposeWx8_SSSE3(const uint8* src, int src_stride,
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"+r"(width) // %2
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: "r"((intptr_t)(src_stride)), // %3
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"r"((intptr_t)(dst_stride)) // %4
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: "memory", "cc"
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#if defined(__SSE2__)
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, "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"
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#endif
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: "memory", "cc",
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"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"
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);
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}
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@@ -411,31 +406,31 @@ void TransposeUVWx8_SSE2(const uint8* src, int src_stride,
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"mov 0x2c(%ecx),%ecx \n"
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"1: \n"
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"movdqa (%eax),%xmm0 \n"
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"movdqa (%eax,%edi,1),%xmm1 \n"
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"movdqu (%eax),%xmm0 \n"
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"movdqu (%eax,%edi,1),%xmm1 \n"
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"lea (%eax,%edi,2),%eax \n"
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"movdqa %xmm0,%xmm7 \n"
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"punpcklbw %xmm1,%xmm0 \n"
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"punpckhbw %xmm1,%xmm7 \n"
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"movdqa %xmm7,%xmm1 \n"
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"movdqa (%eax),%xmm2 \n"
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"movdqa (%eax,%edi,1),%xmm3 \n"
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"movdqu (%eax),%xmm2 \n"
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"movdqu (%eax,%edi,1),%xmm3 \n"
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"lea (%eax,%edi,2),%eax \n"
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"movdqa %xmm2,%xmm7 \n"
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"punpcklbw %xmm3,%xmm2 \n"
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"punpckhbw %xmm3,%xmm7 \n"
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"movdqa %xmm7,%xmm3 \n"
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"movdqa (%eax),%xmm4 \n"
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"movdqa (%eax,%edi,1),%xmm5 \n"
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"movdqu (%eax),%xmm4 \n"
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"movdqu (%eax,%edi,1),%xmm5 \n"
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"lea (%eax,%edi,2),%eax \n"
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"movdqa %xmm4,%xmm7 \n"
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"punpcklbw %xmm5,%xmm4 \n"
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"punpckhbw %xmm5,%xmm7 \n"
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"movdqa %xmm7,%xmm5 \n"
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"movdqa (%eax),%xmm6 \n"
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"movdqa (%eax,%edi,1),%xmm7 \n"
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"movdqu (%eax),%xmm6 \n"
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"movdqu (%eax,%edi,1),%xmm7 \n"
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"lea (%eax,%edi,2),%eax \n"
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"movdqa %xmm5,(%esp) \n"
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"movdqu %xmm5,(%esp) \n"
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"neg %edi \n"
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"movdqa %xmm6,%xmm5 \n"
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"punpcklbw %xmm7,%xmm6 \n"
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@@ -455,8 +450,8 @@ void TransposeUVWx8_SSE2(const uint8* src, int src_stride,
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"punpcklwd %xmm6,%xmm4 \n"
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"punpckhwd %xmm6,%xmm5 \n"
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"movdqa %xmm5,%xmm6 \n"
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"movdqa (%esp),%xmm5 \n"
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"movdqa %xmm6,(%esp) \n"
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"movdqu (%esp),%xmm5 \n"
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"movdqu %xmm6,(%esp) \n"
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"movdqa %xmm5,%xmm6 \n"
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"punpcklwd %xmm7,%xmm5 \n"
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"punpckhwd %xmm7,%xmm6 \n"
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@@ -465,7 +460,7 @@ void TransposeUVWx8_SSE2(const uint8* src, int src_stride,
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"punpckldq %xmm4,%xmm0 \n"
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"punpckhdq %xmm4,%xmm6 \n"
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"movdqa %xmm6,%xmm4 \n"
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"movdqa (%esp),%xmm6 \n"
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"movdqu (%esp),%xmm6 \n"
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"movlpd %xmm0,(%edx) \n"
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"movhpd %xmm0,(%ebx) \n"
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"movlpd %xmm4,(%edx,%esi,1) \n"
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@@ -514,7 +509,8 @@ void TransposeUVWx8_SSE2(const uint8* src, int src_stride,
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"ret \n"
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#endif
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);
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#elif !defined(LIBYUV_DISABLE_X86) && !defined(__native_client__) && \
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#endif
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#if !defined(LIBYUV_DISABLE_X86) && !defined(__native_client__) && \
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defined(__x86_64__)
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// 64 bit version has enough registers to do 16x8 to 8x16 at a time.
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#define HAS_TRANSPOSE_WX8_FAST_SSSE3
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@@ -525,38 +521,38 @@ static void TransposeWx8_FAST_SSSE3(const uint8* src, int src_stride,
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// First round of bit swap.
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".p2align 2 \n"
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"1: \n"
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"movdqa (%0),%%xmm0 \n"
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"movdqa (%0,%3),%%xmm1 \n"
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"movdqu (%0),%%xmm0 \n"
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"movdqu (%0,%3),%%xmm1 \n"
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"lea (%0,%3,2),%0 \n"
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"movdqa %%xmm0,%%xmm8 \n"
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"punpcklbw %%xmm1,%%xmm0 \n"
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"punpckhbw %%xmm1,%%xmm8 \n"
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"movdqa (%0),%%xmm2 \n"
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"movdqu (%0),%%xmm2 \n"
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"movdqa %%xmm0,%%xmm1 \n"
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"movdqa %%xmm8,%%xmm9 \n"
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"palignr $0x8,%%xmm1,%%xmm1 \n"
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"palignr $0x8,%%xmm9,%%xmm9 \n"
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"movdqa (%0,%3),%%xmm3 \n"
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"movdqu (%0,%3),%%xmm3 \n"
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"lea (%0,%3,2),%0 \n"
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"movdqa %%xmm2,%%xmm10 \n"
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"punpcklbw %%xmm3,%%xmm2 \n"
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"punpckhbw %%xmm3,%%xmm10 \n"
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"movdqa %%xmm2,%%xmm3 \n"
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"movdqa %%xmm10,%%xmm11 \n"
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"movdqa (%0),%%xmm4 \n"
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"movdqu (%0),%%xmm4 \n"
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"palignr $0x8,%%xmm3,%%xmm3 \n"
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"palignr $0x8,%%xmm11,%%xmm11 \n"
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"movdqa (%0,%3),%%xmm5 \n"
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"movdqu (%0,%3),%%xmm5 \n"
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"lea (%0,%3,2),%0 \n"
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"movdqa %%xmm4,%%xmm12 \n"
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"punpcklbw %%xmm5,%%xmm4 \n"
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"punpckhbw %%xmm5,%%xmm12 \n"
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"movdqa %%xmm4,%%xmm5 \n"
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"movdqa %%xmm12,%%xmm13 \n"
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"movdqa (%0),%%xmm6 \n"
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"movdqu (%0),%%xmm6 \n"
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"palignr $0x8,%%xmm5,%%xmm5 \n"
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"palignr $0x8,%%xmm13,%%xmm13 \n"
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"movdqa (%0,%3),%%xmm7 \n"
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"movdqu (%0,%3),%%xmm7 \n"
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"lea (%0,%3,2),%0 \n"
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"movdqa %%xmm6,%%xmm14 \n"
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"punpcklbw %%xmm7,%%xmm6 \n"
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@@ -666,29 +662,29 @@ static void TransposeUVWx8_SSE2(const uint8* src, int src_stride,
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// First round of bit swap.
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".p2align 2 \n"
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"1: \n"
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"movdqa (%0),%%xmm0 \n"
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"movdqa (%0,%4),%%xmm1 \n"
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"movdqu (%0),%%xmm0 \n"
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"movdqu (%0,%4),%%xmm1 \n"
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"lea (%0,%4,2),%0 \n"
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"movdqa %%xmm0,%%xmm8 \n"
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"punpcklbw %%xmm1,%%xmm0 \n"
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"punpckhbw %%xmm1,%%xmm8 \n"
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"movdqa %%xmm8,%%xmm1 \n"
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"movdqa (%0),%%xmm2 \n"
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"movdqa (%0,%4),%%xmm3 \n"
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"movdqu (%0),%%xmm2 \n"
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"movdqu (%0,%4),%%xmm3 \n"
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"lea (%0,%4,2),%0 \n"
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"movdqa %%xmm2,%%xmm8 \n"
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"punpcklbw %%xmm3,%%xmm2 \n"
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"punpckhbw %%xmm3,%%xmm8 \n"
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"movdqa %%xmm8,%%xmm3 \n"
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"movdqa (%0),%%xmm4 \n"
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"movdqa (%0,%4),%%xmm5 \n"
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"movdqu (%0),%%xmm4 \n"
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"movdqu (%0,%4),%%xmm5 \n"
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"lea (%0,%4,2),%0 \n"
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"movdqa %%xmm4,%%xmm8 \n"
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"punpcklbw %%xmm5,%%xmm4 \n"
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"punpckhbw %%xmm5,%%xmm8 \n"
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"movdqa %%xmm8,%%xmm5 \n"
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"movdqa (%0),%%xmm6 \n"
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"movdqa (%0,%4),%%xmm7 \n"
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"movdqu (%0),%%xmm6 \n"
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"movdqu (%0,%4),%%xmm7 \n"
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"lea (%0,%4,2),%0 \n"
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"movdqa %%xmm6,%%xmm8 \n"
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"punpcklbw %%xmm7,%%xmm6 \n"
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@@ -818,9 +814,7 @@ void TransposePlane(const uint8* src, int src_stride,
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}
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#endif
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#if defined(HAS_TRANSPOSE_WX8_FAST_SSSE3)
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if (TestCpuFlag(kCpuHasSSSE3) &&
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IS_ALIGNED(width, 16) &&
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IS_ALIGNED(src, 16) && IS_ALIGNED(src_stride, 16)) {
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if (TestCpuFlag(kCpuHasSSSE3) && IS_ALIGNED(width, 16)) {
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TransposeWx8 = TransposeWx8_FAST_SSSE3;
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}
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#endif
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@@ -883,29 +877,38 @@ void RotatePlane180(const uint8* src, int src_stride,
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void (*MirrorRow)(const uint8* src, uint8* dst, int width) = MirrorRow_C;
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void (*CopyRow)(const uint8* src, uint8* dst, int width) = CopyRow_C;
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#if defined(HAS_MIRRORROW_NEON)
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if (TestCpuFlag(kCpuHasNEON) && IS_ALIGNED(width, 16)) {
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MirrorRow = MirrorRow_NEON;
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if (TestCpuFlag(kCpuHasNEON)) {
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MirrorRow = MirrorRow_Any_NEON;
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if (IS_ALIGNED(width, 16)) {
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MirrorRow = MirrorRow_NEON;
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}
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}
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#endif
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#if defined(HAS_MIRRORROW_SSE2)
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if (TestCpuFlag(kCpuHasSSE2) && IS_ALIGNED(width, 16) &&
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IS_ALIGNED(src, 16) && IS_ALIGNED(src_stride, 16) &&
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IS_ALIGNED(dst, 16) && IS_ALIGNED(dst_stride, 16)) {
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MirrorRow = MirrorRow_SSE2;
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if (TestCpuFlag(kCpuHasSSE2)) {
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MirrorRow = MirrorRow_Any_SSE2;
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if (IS_ALIGNED(width, 16)) {
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MirrorRow = MirrorRow_SSE2;
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}
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}
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#endif
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#if defined(HAS_MIRRORROW_SSSE3)
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if (TestCpuFlag(kCpuHasSSSE3) && IS_ALIGNED(width, 16) &&
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IS_ALIGNED(src, 16) && IS_ALIGNED(src_stride, 16) &&
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IS_ALIGNED(dst, 16) && IS_ALIGNED(dst_stride, 16)) {
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MirrorRow = MirrorRow_SSSE3;
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if (TestCpuFlag(kCpuHasSSSE3)) {
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MirrorRow = MirrorRow_Any_SSSE3;
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if (IS_ALIGNED(width, 16)) {
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MirrorRow = MirrorRow_SSSE3;
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}
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}
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#endif
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#if defined(HAS_MIRRORROW_AVX2)
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if (TestCpuFlag(kCpuHasAVX2) && IS_ALIGNED(width, 32)) {
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MirrorRow = MirrorRow_AVX2;
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if (TestCpuFlag(kCpuHasAVX2)) {
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MirrorRow = MirrorRow_Any_AVX2;
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if (IS_ALIGNED(width, 32)) {
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MirrorRow = MirrorRow_AVX2;
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}
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}
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#endif
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// TODO(fbarchard): Mirror on mips handle unaligned memory.
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#if defined(HAS_MIRRORROW_MIPS_DSPR2)
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if (TestCpuFlag(kCpuHasMIPS_DSPR2) &&
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IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4) &&
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@@ -913,21 +916,14 @@ void RotatePlane180(const uint8* src, int src_stride,
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MirrorRow = MirrorRow_MIPS_DSPR2;
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}
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#endif
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#if defined(HAS_COPYROW_NEON)
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if (TestCpuFlag(kCpuHasNEON) && IS_ALIGNED(width, 32)) {
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CopyRow = CopyRow_NEON;
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}
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#endif
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#if defined(HAS_COPYROW_X86)
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if (TestCpuFlag(kCpuHasX86) && IS_ALIGNED(width, 4)) {
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CopyRow = CopyRow_X86;
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}
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#endif
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#if defined(HAS_COPYROW_SSE2)
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if (TestCpuFlag(kCpuHasSSE2) && IS_ALIGNED(width, 32) &&
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IS_ALIGNED(src, 16) && IS_ALIGNED(src_stride, 16) &&
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IS_ALIGNED(dst, 16) && IS_ALIGNED(dst_stride, 16)) {
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CopyRow = CopyRow_SSE2;
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if (TestCpuFlag(kCpuHasSSE2)) {
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CopyRow = IS_ALIGNED(width, 32) ? CopyRow_SSE2 : CopyRow_Any_SSE2;
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}
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#endif
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#if defined(HAS_COPYROW_AVX)
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if (TestCpuFlag(kCpuHasAVX)) {
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CopyRow = IS_ALIGNED(width, 64) ? CopyRow_AVX : CopyRow_Any_AVX;
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}
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#endif
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#if defined(HAS_COPYROW_ERMS)
|
||||
@@ -935,6 +931,11 @@ void RotatePlane180(const uint8* src, int src_stride,
|
||||
CopyRow = CopyRow_ERMS;
|
||||
}
|
||||
#endif
|
||||
#if defined(HAS_COPYROW_NEON)
|
||||
if (TestCpuFlag(kCpuHasNEON)) {
|
||||
CopyRow = IS_ALIGNED(width, 32) ? CopyRow_NEON : CopyRow_Any_NEON;
|
||||
}
|
||||
#endif
|
||||
#if defined(HAS_COPYROW_MIPS)
|
||||
if (TestCpuFlag(kCpuHasMIPS)) {
|
||||
CopyRow = CopyRow_MIPS;
|
||||
@@ -1010,13 +1011,13 @@ void TransposeUV(const uint8* src, int src_stride,
|
||||
if (TestCpuFlag(kCpuHasNEON)) {
|
||||
TransposeUVWx8 = TransposeUVWx8_NEON;
|
||||
}
|
||||
#elif defined(HAS_TRANSPOSE_UVWX8_SSE2)
|
||||
if (TestCpuFlag(kCpuHasSSE2) &&
|
||||
IS_ALIGNED(width, 8) &&
|
||||
IS_ALIGNED(src, 16) && IS_ALIGNED(src_stride, 16)) {
|
||||
#endif
|
||||
#if defined(HAS_TRANSPOSE_UVWX8_SSE2)
|
||||
if (TestCpuFlag(kCpuHasSSE2) && IS_ALIGNED(width, 8)) {
|
||||
TransposeUVWx8 = TransposeUVWx8_SSE2;
|
||||
}
|
||||
#elif defined(HAS_TRANSPOSE_UVWx8_MIPS_DSPR2)
|
||||
#endif
|
||||
#if defined(HAS_TRANSPOSE_UVWx8_MIPS_DSPR2)
|
||||
if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 2) &&
|
||||
IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) {
|
||||
TransposeUVWx8 = TransposeUVWx8_MIPS_DSPR2;
|
||||
@@ -1084,12 +1085,13 @@ void RotateUV180(const uint8* src, int src_stride,
|
||||
if (TestCpuFlag(kCpuHasNEON) && IS_ALIGNED(width, 8)) {
|
||||
MirrorRowUV = MirrorUVRow_NEON;
|
||||
}
|
||||
#elif defined(HAS_MIRRORROW_UV_SSSE3)
|
||||
if (TestCpuFlag(kCpuHasSSSE3) && IS_ALIGNED(width, 16) &&
|
||||
IS_ALIGNED(src, 16) && IS_ALIGNED(src_stride, 16)) {
|
||||
#endif
|
||||
#if defined(HAS_MIRRORROW_UV_SSSE3)
|
||||
if (TestCpuFlag(kCpuHasSSSE3) && IS_ALIGNED(width, 16)) {
|
||||
MirrorRowUV = MirrorUVRow_SSSE3;
|
||||
}
|
||||
#elif defined(HAS_MIRRORUVROW_MIPS_DSPR2)
|
||||
#endif
|
||||
#if defined(HAS_MIRRORUVROW_MIPS_DSPR2)
|
||||
if (TestCpuFlag(kCpuHasMIPS_DSPR2) &&
|
||||
IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) {
|
||||
MirrorRowUV = MirrorUVRow_MIPS_DSPR2;
|
||||
|
||||
Reference in New Issue
Block a user