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Merge "remove fldcw/fstcw from Win64 builds"

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This commit is contained in:
Johann Koenig 2018-03-23 13:23:58 +00:00 committed by Gerrit Code Review
commit 1000e07609
3 changed files with 16 additions and 42 deletions
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33
vpx_ports/float_control_word.asm
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@ -1,33 +0,0 @@
;
; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found
; in the file PATENTS. All contributing project authors may
; be found in the AUTHORS file in the root of the source tree.
;
%include "vpx_ports/x86_abi_support.asm"
section .text
%if LIBVPX_YASM_WIN64
global sym(vpx_winx64_fldcw) PRIVATE
sym(vpx_winx64_fldcw):
sub rsp, 8
mov [rsp], rcx ; win x64 specific
fldcw [rsp]
add rsp, 8
ret
global sym(vpx_winx64_fstcw) PRIVATE
sym(vpx_winx64_fstcw):
sub rsp, 8
fstcw [rsp]
mov rax, [rsp]
add rsp, 8
ret
%endif

4
vpx_ports/vpx_ports.mk
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@ -21,10 +21,6 @@ ifeq ($(ARCH_X86),yes)
PORTS_SRCS-$(HAVE_MMX) += emms_mmx.c PORTS_SRCS-$(HAVE_MMX) += emms_mmx.c
endif endif
ifeq ($(ARCH_X86_64),yes)
PORTS_SRCS-$(CONFIG_MSVS) += float_control_word.asm
endif
ifeq ($(ARCH_X86)$(ARCH_X86_64),yes) ifeq ($(ARCH_X86)$(ARCH_X86_64),yes)
PORTS_SRCS-yes += x86.h PORTS_SRCS-yes += x86.h
PORTS_SRCS-yes += x86_abi_support.asm PORTS_SRCS-yes += x86_abi_support.asm

21
vpx_ports/x86.h
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@ -295,11 +295,11 @@ static unsigned short x87_get_control_word(void) {
return mode; return mode;
} }
#elif ARCH_X86_64 #elif ARCH_X86_64
/* No fldcw intrinsics on Windows x64, punt to external asm */ // Unsupported on Win64:
extern void vpx_winx64_fldcw(unsigned short mode); // https://docs.microsoft.com/en-us/cpp/c-runtime-library/reference/control87-controlfp-control87-2
extern unsigned short vpx_winx64_fstcw(void); // _MCW_PC (Precision control) (Not supported on ARM or x64 platforms.)
#define x87_set_control_word vpx_winx64_fldcw static void x87_set_control_word(unsigned int mode) { (void)mode; }
#define x87_get_control_word vpx_winx64_fstcw static unsigned int x87_get_control_word(void) { return 0; }
#else #else
static void x87_set_control_word(unsigned short mode) { static void x87_set_control_word(unsigned short mode) {
__asm { fldcw mode } __asm { fldcw mode }
@ -313,6 +313,17 @@ static unsigned short x87_get_control_word(void) {
static INLINE unsigned int x87_set_double_precision(void) { static INLINE unsigned int x87_set_double_precision(void) {
unsigned int mode = x87_get_control_word(); unsigned int mode = x87_get_control_word();
// Intel 64 and IA-32 Architectures Developer's Manual: Vol. 1
// https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf
// 8.1.5.2 Precision Control Field
// Bits 8 and 9 (0x300) of the x87 FPU Control Word ("Precision Control")
// determine the number of bits used in floating point calculations. To match
// later SSE instructions restrict x87 operations to Double Precision (0x200).
// Precision PC Field
// Single Precision (24-Bits) 00B
// Reserved 01B
// Double Precision (53-Bits) 10B
// Extended Precision (64-Bits) 11B
x87_set_control_word((mode & ~0x300) | 0x200); x87_set_control_word((mode & ~0x300) | 0x200);
return mode; return mode;
} }