Merge "remove fldcw/fstcw from Win64 builds"
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commit
1000e07609
@ -1,33 +0,0 @@
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;
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; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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%include "vpx_ports/x86_abi_support.asm"
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section .text
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%if LIBVPX_YASM_WIN64
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global sym(vpx_winx64_fldcw) PRIVATE
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sym(vpx_winx64_fldcw):
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sub rsp, 8
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mov [rsp], rcx ; win x64 specific
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fldcw [rsp]
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add rsp, 8
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ret
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global sym(vpx_winx64_fstcw) PRIVATE
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sym(vpx_winx64_fstcw):
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sub rsp, 8
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fstcw [rsp]
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mov rax, [rsp]
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add rsp, 8
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ret
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%endif
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@ -21,10 +21,6 @@ ifeq ($(ARCH_X86),yes)
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PORTS_SRCS-$(HAVE_MMX) += emms_mmx.c
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endif
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ifeq ($(ARCH_X86_64),yes)
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PORTS_SRCS-$(CONFIG_MSVS) += float_control_word.asm
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endif
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ifeq ($(ARCH_X86)$(ARCH_X86_64),yes)
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PORTS_SRCS-yes += x86.h
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PORTS_SRCS-yes += x86_abi_support.asm
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@ -295,11 +295,11 @@ static unsigned short x87_get_control_word(void) {
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return mode;
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}
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#elif ARCH_X86_64
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/* No fldcw intrinsics on Windows x64, punt to external asm */
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extern void vpx_winx64_fldcw(unsigned short mode);
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extern unsigned short vpx_winx64_fstcw(void);
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#define x87_set_control_word vpx_winx64_fldcw
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#define x87_get_control_word vpx_winx64_fstcw
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// Unsupported on Win64:
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// https://docs.microsoft.com/en-us/cpp/c-runtime-library/reference/control87-controlfp-control87-2
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// _MCW_PC (Precision control) (Not supported on ARM or x64 platforms.)
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static void x87_set_control_word(unsigned int mode) { (void)mode; }
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static unsigned int x87_get_control_word(void) { return 0; }
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#else
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static void x87_set_control_word(unsigned short mode) {
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__asm { fldcw mode }
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@ -313,6 +313,17 @@ static unsigned short x87_get_control_word(void) {
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static INLINE unsigned int x87_set_double_precision(void) {
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unsigned int mode = x87_get_control_word();
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// Intel 64 and IA-32 Architectures Developer's Manual: Vol. 1
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// https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf
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// 8.1.5.2 Precision Control Field
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// Bits 8 and 9 (0x300) of the x87 FPU Control Word ("Precision Control")
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// determine the number of bits used in floating point calculations. To match
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// later SSE instructions restrict x87 operations to Double Precision (0x200).
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// Precision PC Field
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// Single Precision (24-Bits) 00B
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// Reserved 01B
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// Double Precision (53-Bits) 10B
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// Extended Precision (64-Bits) 11B
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x87_set_control_word((mode & ~0x300) | 0x200);
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return mode;
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}
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