2010-05-18 17:58:33 +02:00
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;
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; Copyright (c) 2010 The VP8 project authors. All Rights Reserved.
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;
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2010-06-04 22:19:40 +02:00
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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2010-05-18 17:58:33 +02:00
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;
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EXPORT |vp8_recon16x16mb_neon|
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ARM
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REQUIRE8
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PRESERVE8
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AREA ||.text||, CODE, READONLY, ALIGN=2
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; r0 unsigned char *pred_ptr,
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; r1 short *diff_ptr,
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; r2 unsigned char *dst_ptr,
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; r3 int ystride,
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; stack unsigned char *udst_ptr,
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; stack unsigned char *vdst_ptr
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|vp8_recon16x16mb_neon| PROC
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mov r12, #4 ;loop counter for Y loop
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recon16x16mb_loop_y
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vld1.u8 {q12, q13}, [r0]! ;load data from pred_ptr
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vld1.16 {q8, q9}, [r1]! ;load data from diff_ptr
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vld1.u8 {q14, q15}, [r0]!
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vld1.16 {q10, q11}, [r1]!
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vmovl.u8 q0, d24 ;modify Pred data from 8 bits to 16 bits
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vmovl.u8 q1, d25
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vmovl.u8 q2, d26
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vmovl.u8 q3, d27
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vmovl.u8 q4, d28
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vmovl.u8 q5, d29
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vmovl.u8 q6, d30
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vld1.16 {q12, q13}, [r1]!
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vmovl.u8 q7, d31
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vld1.16 {q14, q15}, [r1]!
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pld [r0]
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pld [r1]
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pld [r1, #64]
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vadd.s16 q0, q0, q8 ;add Diff data and Pred data together
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vadd.s16 q1, q1, q9
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vadd.s16 q2, q2, q10
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vadd.s16 q3, q3, q11
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vadd.s16 q4, q4, q12
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vadd.s16 q5, q5, q13
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vadd.s16 q6, q6, q14
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vadd.s16 q7, q7, q15
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vqmovun.s16 d0, q0 ;CLAMP() saturation
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vqmovun.s16 d1, q1
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vqmovun.s16 d2, q2
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vqmovun.s16 d3, q3
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vqmovun.s16 d4, q4
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vqmovun.s16 d5, q5
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vst1.u8 {q0}, [r2], r3 ;store result
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vqmovun.s16 d6, q6
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vst1.u8 {q1}, [r2], r3
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vqmovun.s16 d7, q7
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vst1.u8 {q2}, [r2], r3
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subs r12, r12, #1
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moveq r12, #2 ;loop counter for UV loop
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vst1.u8 {q3}, [r2], r3
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bne recon16x16mb_loop_y
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mov r3, r3, lsr #1 ;uv_stride = ystride>>1
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ldr r2, [sp] ;load upred_ptr
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recon16x16mb_loop_uv
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vld1.u8 {q12, q13}, [r0]! ;load data from pred_ptr
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vld1.16 {q8, q9}, [r1]! ;load data from diff_ptr
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vld1.u8 {q14, q15}, [r0]!
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vld1.16 {q10, q11}, [r1]!
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vmovl.u8 q0, d24 ;modify Pred data from 8 bits to 16 bits
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vmovl.u8 q1, d25
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vmovl.u8 q2, d26
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vmovl.u8 q3, d27
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vmovl.u8 q4, d28
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vmovl.u8 q5, d29
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vmovl.u8 q6, d30
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vld1.16 {q12, q13}, [r1]!
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vmovl.u8 q7, d31
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vld1.16 {q14, q15}, [r1]!
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vadd.s16 q0, q0, q8 ;add Diff data and Pred data together
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vadd.s16 q1, q1, q9
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vadd.s16 q2, q2, q10
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vadd.s16 q3, q3, q11
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vadd.s16 q4, q4, q12
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vadd.s16 q5, q5, q13
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vadd.s16 q6, q6, q14
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vqmovun.s16 d0, q0 ;CLAMP() saturation
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vadd.s16 q7, q7, q15
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vqmovun.s16 d1, q1
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vqmovun.s16 d2, q2
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vqmovun.s16 d3, q3
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vst1.u8 {d0}, [r2], r3 ;store result
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vqmovun.s16 d4, q4
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vst1.u8 {d1}, [r2], r3
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vqmovun.s16 d5, q5
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vst1.u8 {d2}, [r2], r3
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vqmovun.s16 d6, q6
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vst1.u8 {d3}, [r2], r3
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vqmovun.s16 d7, q7
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vst1.u8 {d4}, [r2], r3
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subs r12, r12, #1
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vst1.u8 {d5}, [r2], r3
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vst1.u8 {d6}, [r2], r3
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vst1.u8 {d7}, [r2], r3
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ldrne r2, [sp, #4] ;load vpred_ptr
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bne recon16x16mb_loop_uv
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bx lr
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ENDP
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END
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